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• PC case and PSU screw question....

  - by user32569

  Hi, I have maybe a funny one to ask.... To this Christmass I bought new PC. When I started to asseble it, I found that my case (Artic Cooling Silentium T11) has 12 screws for HDD, DVD etc, and 6 screws for the expansion cards. Well, first thing that surprised me was, why only 6 screws for expansion card, when case has actually 7 slots. And second, what are PSU screws supposed to some with? The PSU, Case or nothing? Becouse neighter PSU or Case had them. PSU is Evolve Storm 600W. Well, I know case and PSU are not some high end devices, but still, would it hurt them to add 1 screw for expansion cards and 4 for PSU? So, my question is, is this situation normall, or which one (Case or PSU) does normally screws come with? Thanks.

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• Click sound from computer when shut down

  - by user32569

  Hi, I build my new computer yesterday and I noticed, when computer is shut down, I mean the exact time its looses power from PSU, relativelly loud CLICK sound occurs. Please does anyone knows from where? I think MB, SSD, VGA, CPU nor coolers are not cousing this. I would guess maybe Samsung 1TB HDD (maybe when heads go back to LZ) or some hard safety switch or relay in PSU? Or just the MB speaker? (Yes, its actually installed). Do you have any experience with this? Thanks.

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• Harvard vs. Von Neumann architecture

  - by user32569

  Hi. Our teacher told us, that Harvard architecture is the most evolved and produced architecture today and towards future. but I thing becouse os massive averhead of x86 and Von Neumann nased ARM systems that actually Von Neumann is the most used architecture today. Yes, MCUs with Harvard are even more produced, but since they all have just minor purpose (compared to x86 and ARM based) that Von Neumann is actually the one. Or is it really Harvard? And second, I know this is strange question, but does any architecture combining both exists? to have separate memory for data and programs, therefore faster instruction processing, but still able to work with these as Von Neumann? To be able o load amd unload programs to program memory on the fly? Isnt this the way the x86 should have go? Or would there be some bottleneck that pure Von neumann solves? Thanks.

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• Articles of x386 and later CPU based systems

  - by user32569

  Hi there. I know this is hard question, and possibly not to be answered here, but if there is some article, or more you know about, please post a link. About books, its sad but many great computer books cannot be bought in my country. So, you can find many articles online, which says how memory was mapped back in pre x386 CPU. How there was explicit holes ready for MMIO BIOS, Video BIOS, etc. How there was A20 line for allowing higher memory access etc. Problem is, time changed. Today BIOSes are many times larger, and pure x86 16bit mode is used for booting and ROM flashing only. OS ignore BIOS as they access everything using drivers. And I just want to know, how it works today. I know not so specific question, but I read OS dev wiki, many articles, but all refering to days before massive usage of pure 32bit CPUs.

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• Does disabling BIOS shadowing increase free RAM space?

  - by user32569

  Hi, I know in these days this is very stupid question, but for study purposes. I read that when PC starts, CPU is set to read adress just under the 4GB. There should BIOS be mapped to by memory controller. My question is, in old days, had disabling BIOS shadowing actually freed some RAM for you? I mean, even when BIOS was not shadowed to RAM directly, still adresses for BIOS MMIO access were wasted. And when you cant adress it, its like there is no extra space gained.

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• Real RAM latency

  - by user32569

  Hi, very quick question. When I look for RAM timing, I got 2 different explanations on what is CAS latency. First states, its the time after command to read has been issued from CPU and data are send to data bus. Second says its time betwen column in memory layout has been activated. So, where is the truth? I mean, when I want to know total RAM latenci, in case 1, ot would be just CAS times one clock time. In second case, it would be CAS+other things like RAstoCAS and so times one clock time. Thanks.

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