from ARM DDI 01001, there is a term: process geometry, does it mean the chip size?

Caches and write buffers to improve average system performance are now commonplace in ARM® memory systems. Core clock rates have increased at a faster rate than memory access times over recent years. This factor, and smaller process geometries, the economics of on-chip memory, and system power constraints have encouraged the use of caches to meet growing system demands.

thanks.