Hello,

I want to generate fibonacci series using SBN in an OISC architecture. My initial approach is to implement it in assembly language first and then convert it to machine language. The first steps involve storing 0 and 1 in 2 registers and then subtract 1 from 0 and repeatedly subtract 1 in the consequent steps. Everytime it will generate a negative number and since its negative, it branches off and fetches the absolute value finding instruction.

Is my approach correct? My confusion in the meaning of OISC. Correct me if i'm wrong, if i perform a subtraction and then an absolute value finding, it means that that i'm using 2 instructions everytime. or is it that in the OISC processor both these instructions are done at the sametime which would mean that my approach is correct.

Please help.

thank you all