Benefit of using multiple SIMD instruction sets simultaneously

Posted by GenTiradentes on Stack Overflow See other posts from Stack Overflow or by GenTiradentes
Published on 2010-05-15T13:49:57Z Indexed on 2010/05/15 13:54 UTC
Read the original article Hit count: 468

Filed under:

sse

|

mmx

|

c

|

c++

|

simd

I'm writing a highly parallel application that's multithreaded. I've already got an SSE accelerated thread class written. If I were to write an MMX accelerated thread class, then run both at the same time (one SSE thread and one MMX thread per core) would the performance improve noticeably?

I would think that this setup would help hide memory latency, but I'd like to be sure before I start pouring time into it.

© Stack Overflow or respective owner

Related posts about sse

error A2070: invalid instruction operands IN SSE MASM64

as seen on Stack Overflow - Search for 'Stack Overflow'
when compiling this in ml64.exe 64bit (masm64) the SSE command give me an error what do i need to do to include the SSE commands in 64 bit? .code test PROC movlps [rdx], xmm7 ;;error A2070: invalid instruction operands ;//Inc in vec ptr add rsi, 16 movhlps xmm6, xmm7 movss [rdx+8], xmm6… >>> More
What's the difference between logical SSE intrinsics?

as seen on Stack Overflow - Search for 'Stack Overflow'
Hello, Is there any difference between logical SSE intrinsics for different types? For example if we take OR operation, there are three intrinsics: _mm_or_ps, _mm_or_pd and _mm_or_si128. My questions: Is there any difference between using one or another intrinsic (with appropriate type casting)… >>> More
OpenMP + SSE gives no speedup

as seen on Stack Overflow - Search for 'Stack Overflow'
Hi, My Professor found out this interesting experiment of 3D Linearly separable Kernel Convolution using SSE and OpenMP, and gave the task to me to benchmark the statistics on our system. The author claims a crazy 18 fold speedup from the serial approach! Might not be always, but we were expecting… >>> More
Combining prefixes in SSE

as seen on Stack Overflow - Search for 'Stack Overflow'
In SSE the prefixes 066h (operand size override) 0F2H (REPNE) and 0F3h (REPE) are part of the opcode. In non-SSE 066h switches between 32-bit (or 64-bit) and 16-bit operation. 0F2h and 0F3h are used for string operations. They can be combined so that 066h and 0F2h (or 0F3h) can be used in the… >>> More
Intrinsics program (SSE) - g++ - help needed

as seen on Stack Overflow - Search for 'Stack Overflow'
Hi all, This is the first time I am posting a question on stackoverflow, so please try and overlook any errors I may have made in formatting my question/code. But please do point the same out to me so I may be more careful. I was trying to write some simple intrinsics routines for the addition of… >>> More

Related posts about mmx

Stack usage with MMX intrinsics and Microsoft C++

as seen on Stack Overflow - Search for 'Stack Overflow'
I have an inline assembler loop that cumulatively adds elements from an int32 data array with MMX instructions. In particular, it uses the fact that the MMX registers can accommodate 16 int32s to calculate 16 different cumulative sums in parallel. I would now like to convert this piece of code to… >>> More
Concise SSE and MMX instruction reference with latencies and throughput

as seen on Stack Overflow - Search for 'Stack Overflow'
I am trying to optimize some arithmetic by using the MMX and SSE instruction sets with inline assembly. However, I have been unable to find good references for the timings and usages of these enhanced instruction sets. Could you please help me find references that contain information about the throughput… >>> More
MMX instructions for Iphone

as seen on Stack Overflow - Search for 'Stack Overflow'
Hi Does iphone processor ARMV6 supports MMX instructions? >>> More
Benefit of using multiple SIMD instruction sets simultaneously

as seen on Stack Overflow - Search for 'Stack Overflow'
I'm writing a highly parallel application that's multithreaded. I've already got an SSE accelerated thread class written. If I were to write an MMX accelerated thread class, then run both at the same time (one SSE thread and one MMX thread per core) would the performance improve noticeably? I would… >>> More
Common SIMD techniques

as seen on Stack Overflow - Search for 'Stack Overflow'
Hi! Where can I find information about common SIMD tricks? I have an instruction set and know, how to write non-tricky SIMD code, but I know, SIMD now is much more powerful. It can hold complex conditional branchless code. For example (ARMv6), the following sequence of instructions sets each byte… >>> More