When modeling a virtual circuit board, what is the best design pattern to check for cycles?
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Wallace Brown
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Published on 2012-11-02T14:52:19Z
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2012/11/02
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To make it simple assume you have only AND and OR gates. Each has two inputs and one output. The output of two inputs can be used as an input for the next gate For example:
A AND B -> E
C AND D -> F
E OR F -> G
Assuming an arbitrary number of gates, we want to check if the circuit ever connects back into itself at an earlier state? For example:
E AND F -> A
This should be illegal since it creates an endless cycle. What design pattern would best be able to check for these cycles?
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