Search Results

Search found 13619 results on 545 pages for 'memory mapped'.

Page 132/545 | < Previous Page | 128 129 130 131 132 133 134 135 136 137 138 139  | Next Page >

  • Why did Ubuntu suddenly get so slow?

    - by user101383
    12.10 has been slowing down mysteriously. Normally, in past versions, I can log in, open Firefox, and it will pop up within seconds. 12.10 is like that upon install too, though once I install my old apps, it gets very slow by Ubuntu standards. After login the hard drive will just make noise for a while before the OS will do anything. Hardware: enter description: Desktop Computer product: XPS 8300 () vendor: Dell Inc. serial: B6G2WR1 width: 64 bits capabilities: smbios-2.6 dmi-2.6 vsyscall32 configuration: boot=normal chassis=desktop uuid=44454C4C-3600-1047-8032-C2C04F575231 core description: Motherboard product: 0Y2MRG vendor: Dell Inc. physical id: 0 version: A00 serial: ..CN7360419G04VQ. slot: To Be Filled By O.E.M. *cpu description: CPU product: Intel(R) Core(TM) i7-2600 CPU @ 3.40GHz vendor: Intel Corp. physical id: 4 bus info: cpu@0 version: Intel(R) Core(TM) i7-2600 CPU @ 3.40GHz serial: To Be Filled By O.E.M. slot: CPU 1 size: 1600MHz capacity: 1600MHz width: 64 bits clock: 100MHz capabilities: x86-64 fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx lahf_lm ida arat epb xsaveopt pln pts dtherm tpr_shadow vnmi flexpriority ept vpid cpufreq configuration: cores=4 enabledcores=1 threads=2 *-cache:0 description: L1 cache physical id: 5 slot: L1-Cache size: 256KiB capacity: 256KiB capabilities: internal write-through unified *-cache:1 description: L2 cache physical id: 6 slot: L2-Cache size: 1MiB capacity: 1MiB capabilities: internal write-through unified *-cache:2 DISABLED description: L3 cache physical id: 7 slot: L3-Cache size: 8MiB capacity: 8MiB capabilities: internal write-back unified *-memory description: System Memory physical id: 20 slot: System board or motherboard size: 8GiB *-bank:0 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 0 serial: 7228183 slot: DIMM3 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:1 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 1 serial: 1E28183 slot: DIMM1 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:2 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 2 serial: 9E28183 slot: DIMM4 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:3 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: NT2GC64B88B0NF-CG vendor: Nanya physical id: 3 serial: 5527183 slot: DIMM2 size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-firmware description: BIOS vendor: Dell Inc. physical id: 0 version: A05 date: 09/21/2011 size: 64KiB capacity: 4032KiB capabilities: mca pci upgrade shadowing escd cdboot bootselect socketedrom edd int13floppy1200 int13floppy720 int13floppy2880 int5printscreen int9keyboard int14serial int17printer int10video acpi usb zipboot biosbootspecification *-pci description: Host bridge product: 2nd Generation Core Processor Family DRAM Controller vendor: Intel Corporation physical id: 100 bus info: pci@0000:00:00.0 version: 09 width: 32 bits clock: 33MHz *-pci:0 description: PCI bridge product: Xeon E3-1200/2nd Generation Core Processor Family PCI Express Root Port vendor: Intel Corporation physical id: 1 bus info: pci@0000:00:01.0 version: 09 width: 32 bits clock: 33MHz capabilities: pci pm msi pciexpress normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:40 ioport:e000(size=4096) memory:fe600000-fe6fffff ioport:d0000000(size=268435456) *-display description: VGA compatible controller product: Juniper [Radeon HD 5700 Series] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0 bus info: pci@0000:01:00.0 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi vga_controller bus_master cap_list rom configuration: driver=radeon latency=0 resources: irq:44 memory:d0000000-dfffffff memory:fe620000-fe63ffff ioport:e000(size=256) memory:fe600000-fe61ffff *-multimedia description: Audio device product: Juniper HDMI Audio [Radeon HD 5700 Series] vendor: Advanced Micro Devices [AMD] nee ATI physical id: 0.1 bus info: pci@0000:01:00.1 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi bus_master cap_list configuration: driver=snd_hda_intel latency=0 resources: irq:48 memory:fe640000-fe643fff *-communication description: Communication controller product: 6 Series/C200 Series Chipset Family MEI Controller #1 vendor: Intel Corporation physical id: 16 bus info: pci@0000:00:16.0 version: 04 width: 64 bits clock: 33MHz capabilities: pm msi bus_master cap_list configuration: driver=mei latency=0 resources: irq:45 memory:fe708000-fe70800f *-usb:0 description: USB controller product: 6 Series/C200 Series Chipset Family USB Enhanced Host Controller #2 vendor: Intel Corporation physical id: 1a bus info: pci@0000:00:1a.0 version: 05 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:16 memory:fe707000-fe7073ff *-multimedia description: Audio device product: 6 Series/C200 Series Chipset Family High Definition Audio Controller vendor: Intel Corporation physical id: 1b bus info: pci@0000:00:1b.0 version: 05 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list configuration: driver=snd_hda_intel latency=0 resources: irq:46 memory:fe700000-fe703fff *-pci:1 description: PCI bridge product: 6 Series/C200 Series Chipset Family PCI Express Root Port 1 vendor: Intel Corporation physical id: 1c bus info: pci@0000:00:1c.0 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:41 memory:fe500000-fe5fffff *-network description: Network controller product: BCM4313 802.11b/g/n Wireless LAN Controller vendor: Broadcom Corporation physical id: 0 bus info: pci@0000:02:00.0 version: 01 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list configuration: driver=bcma-pci-bridge latency=0 resources: irq:16 memory:fe500000-fe503fff *-pci:2 description: PCI bridge product: 6 Series/C200 Series Chipset Family PCI Express Root Port 4 vendor: Intel Corporation physical id: 1c.3 bus info: pci@0000:00:1c.3 version: b5 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:42 memory:fe400000-fe4fffff *-network description: Ethernet interface product: NetLink BCM57788 Gigabit Ethernet PCIe vendor: Broadcom Corporation physical id: 0 bus info: pci@0000:03:00.0 logical name: eth0 version: 01 serial: 18:03:73:e1:a7:71 size: 100Mbit/s capacity: 1Gbit/s width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list ethernet physical tp mii 10bt 10bt-fd 100bt 100bt-fd 1000bt 1000bt-fd autonegotiation configuration: autonegotiation=on broadcast=yes driver=tg3 driverversion=3.123 duplex=full firmware=sb ip=192.168.1.3 latency=0 link=yes multicast=yes port=MII speed=100Mbit/s resources: irq:47 memory:fe400000-fe40ffff *-usb:1 description: USB controller product: 6 Series/C200 Series Chipset Family USB Enhanced Host Controller #1 vendor: Intel Corporation physical id: 1d bus info: pci@0000:00:1d.0 version: 05 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:23 memory:fe706000-fe7063ff *-isa description: ISA bridge product: H67 Express Chipset Family LPC Controller vendor: Intel Corporation physical id: 1f bus info: pci@0000:00:1f.0 version: 05 width: 32 bits clock: 33MHz capabilities: isa bus_master cap_list configuration: latency=0 *-storage description: SATA controller product: 6 Series/C200 Series Chipset Family SATA AHCI Controller vendor: Intel Corporation physical id: 1f.2 bus info: pci@0000:00:1f.2 version: 05 width: 32 bits clock: 66MHz capabilities: storage msi pm ahci_1.0 bus_master cap_list configuration: driver=ahci latency=0 resources: irq:43 ioport:f070(size=8) ioport:f060(size=4) ioport:f050(size=8) ioport:f040(size=4) ioport:f020(size=32) memory:fe705000-fe7057ff *-serial UNCLAIMED description: SMBus product: 6 Series/C200 Series Chipset Family SMBus Controller vendor: Intel Corporation physical id: 1f.3 bus info: pci@0000:00:1f.3 version: 05 width: 64 bits clock: 33MHz configuration: latency=0 resources: memory:fe704000-fe7040ff ioport:f000(size=32) *-scsi:0 physical id: 1 logical name: scsi0 capabilities: emulated *-disk description: ATA Disk product: Hitachi HUA72201 vendor: Hitachi physical id: 0.0.0 bus info: scsi@0:0.0.0 logical name: /dev/sda version: JP4O serial: JPW9J0HD21BTZC size: 931GiB (1TB) capabilities: partitioned partitioned:dos configuration: ansiversion=5 sectorsize=512 signature=000641dc *-volume:0 description: EXT4 volume vendor: Linux physical id: 1 bus info: scsi@0:0.0.0,1 logical name: /dev/sda1 logical name: / version: 1.0 serial: 4e3d91b7-fd38-4f44-a9e9-ba3c39b926ec size: 585GiB capacity: 585GiB capabilities: primary journaled extended_attributes large_files huge_files dir_nlink recover extents ext4 ext2 initialized configuration: created=2012-10-21 16:26:50 filesystem=ext4 lastmountpoint=/ modified=2012-10-29 18:12:08 mount.fstype=ext4 mount.options=rw,relatime,errors=remount-ro,data=ordered mounted=2012-10-29 18:12:08 state=mounted *-volume:1 description: Extended partition physical id: 2 bus info: scsi@0:0.0.0,2 logical name: /dev/sda2 size: 7823MiB capacity: 7823MiB capabilities: primary extended partitioned partitioned:extended *-logicalvolume description: Linux swap / Solaris partition physical id: 5 logical name: /dev/sda5 capacity: 7823MiB capabilities: nofs *-volume:2 description: Windows NTFS volume physical id: 3 bus info: scsi@0:0.0.0,3 logical name: /dev/sda3 version: 3.1 serial: 84a92aae-347b-7940-a2d1-f4745b885ef2 size: 337GiB capacity: 337GiB capabilities: primary bootable ntfs initialized configuration: clustersize=4096 created=2012-10-21 18:43:39 filesystem=ntfs modified_by_chkdsk=true mounted_on_nt4=true resize_log_file=true state=dirty upgrade_on_mount=true *-scsi:1 physical id: 2 logical name: scsi1 capabilities: emulated *-cdrom description: DVD-RAM writer product: DVDRWBD DH-12E3S vendor: PLDS physical id: 0.0.0 bus info: scsi@1:0.0.0 logical name: /dev/cdrom logical name: /dev/cdrw logical name: /dev/dvd logical name: /dev/dvdrw logical name: /dev/sr0 version: MD11 capabilities: removable audio cd-r cd-rw dvd dvd-r dvd-ram configuration: ansiversion=5 status=nodisc *-scsi:2 physical id: 3 bus info: usb@2:1.8 logical name: scsi6 capabilities: emulated scsi-host configuration: driver=usb-storage *-disk:0 description: SCSI Disk physical id: 0.0.0 bus info: scsi@6:0.0.0 logical name: /dev/sdb configuration: sectorsize=512 *-disk:1 description: SCSI Disk physical id: 0.0.1 bus info: scsi@6:0.0.1 logical name: /dev/sdc configuration: sectorsize=512 *-disk:2 description: SCSI Disk physical id: 0.0.2 bus info: scsi@6:0.0.2 logical name: /dev/sdd configuration: sectorsize=512 *-disk:3 description: SCSI Disk product: MS/MS-Pro vendor: Generic- physical id: 0.0.3 bus info: scsi@6:0.0.3 logical name: /dev/sde version: 1.03 serial: 3 capabilities: removable configuration: sectorsize=512 *-medium physical id: 0 logical name: /dev/sde

    Read the article

  • Why lock-free data structures just aren't lock-free enough

    - by Alex.Davies
    Today's post will explore why the current ways to communicate between threads don't scale, and show you a possible way to build scalable parallel programming on top of shared memory. The problem with shared memory Soon, we will have dozens, hundreds and then millions of cores in our computers. It's inevitable, because individual cores just can't get much faster. At some point, that's going to mean that we have to rethink our architecture entirely, as millions of cores can't all access a shared memory space efficiently. But millions of cores are still a long way off, and in the meantime we'll see machines with dozens of cores, struggling with shared memory. Alex's tip: The best way for an application to make use of that increasing parallel power is to use a concurrency model like actors, that deals with synchronisation issues for you. Then, the maintainer of the actors framework can find the most efficient way to coordinate access to shared memory to allow your actors to pass messages to each other efficiently. At the moment, NAct uses the .NET thread pool and a few locks to marshal messages. It works well on dual and quad core machines, but it won't scale to more cores. Every time we use a lock, our core performs an atomic memory operation (eg. CAS) on a cell of memory representing the lock, so it's sure that no other core can possibly have that lock. This is very fast when the lock isn't contended, but we need to notify all the other cores, in case they held the cell of memory in a cache. As the number of cores increases, the total cost of a lock increases linearly. A lot of work has been done on "lock-free" data structures, which avoid locks by using atomic memory operations directly. These give fairly dramatic performance improvements, particularly on systems with a few (2 to 4) cores. The .NET 4 concurrent collections in System.Collections.Concurrent are mostly lock-free. However, lock-free data structures still don't scale indefinitely, because any use of an atomic memory operation still involves every core in the system. A sync-free data structure Some concurrent data structures are possible to write in a completely synchronization-free way, without using any atomic memory operations. One useful example is a single producer, single consumer (SPSC) queue. It's easy to write a sync-free fixed size SPSC queue using a circular buffer*. Slightly trickier is a queue that grows as needed. You can use a linked list to represent the queue, but if you leave the nodes to be garbage collected once you're done with them, the GC will need to involve all the cores in collecting the finished nodes. Instead, I've implemented a proof of concept inspired by this intel article which reuses the nodes by putting them in a second queue to send back to the producer. * In all these cases, you need to use memory barriers correctly, but these are local to a core, so don't have the same scalability problems as atomic memory operations. Performance tests I tried benchmarking my SPSC queue against the .NET ConcurrentQueue, and against a standard Queue protected by locks. In some ways, this isn't a fair comparison, because both of these support multiple producers and multiple consumers, but I'll come to that later. I started on my dual-core laptop, running a simple test that had one thread producing 64 bit integers, and another consuming them, to measure the pure overhead of the queue. So, nothing very interesting here. Both concurrent collections perform better than the lock-based one as expected, but there's not a lot to choose between the ConcurrentQueue and my SPSC queue. I was a little disappointed, but then, the .NET Framework team spent a lot longer optimising it than I did. So I dug out a more powerful machine that Red Gate's DBA tools team had been using for testing. It is a 6 core Intel i7 machine with hyperthreading, adding up to 12 logical cores. Now the results get more interesting. As I increased the number of producer-consumer pairs to 6 (to saturate all 12 logical cores), the locking approach was slow, and got even slower, as you'd expect. What I didn't expect to be so clear was the drop-off in performance of the lock-free ConcurrentQueue. I could see the machine only using about 20% of available CPU cycles when it should have been saturated. My interpretation is that as all the cores used atomic memory operations to safely access the queue, they ended up spending most of the time notifying each other about cache lines that need invalidating. The sync-free approach scaled perfectly, despite still working via shared memory, which after all, should still be a bottleneck. I can't quite believe that the results are so clear, so if you can think of any other effects that might cause them, please comment! Obviously, this benchmark isn't realistic because we're only measuring the overhead of the queue. Any real workload, even on a machine with 12 cores, would dwarf the overhead, and there'd be no point worrying about this effect. But would that be true on a machine with 100 cores? Still to be solved. The trouble is, you can't build many concurrent algorithms using only an SPSC queue to communicate. In particular, I can't see a way to build something as general purpose as actors on top of just SPSC queues. Fundamentally, an actor needs to be able to receive messages from multiple other actors, which seems to need an MPSC queue. I've been thinking about ways to build a sync-free MPSC queue out of multiple SPSC queues and some kind of sign-up mechanism. Hopefully I'll have something to tell you about soon, but leave a comment if you have any ideas.

    Read the article

  • In 10.10, USB 3.0 PCI Express card recognized by lspci but not lsusb or dmesg. How to fix?

    - by Paul
    Asus N PC, runs 10.10 x86_64 The Asus N comes with 4 usb 2.0 ports, each labelled 2.0 on the case. Attempting to add two usb 3.0 ports to be provided by a generic usb 3.0 pci express card installed in the pci expres slot. The new card says usb 3.0 and has the blue ports. The card is installed into the laptop unpowered, then the laptop is powered on and boots normally. Nothing happens when a USB 3.0 flash drive is inserted into the usb 3.0 port. uname -a Linux drpaulbrewer-N90SV 2.6.35.8 #1 SMP Fri Jan 14 15:54:11 EST 2011 x86_64 GNU/Linux lspci -v 00:00.0 Host bridge: Silicon Integrated Systems [SiS] 671MX Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64 Kernel modules: sis-agp 00:01.0 PCI bridge: Silicon Integrated Systems [SiS] PCI-to-PCI bridge (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 0000d000-0000dfff Memory behind bridge: fa000000-fdefffff Prefetchable memory behind bridge: 00000000d0000000-00000000dfffffff Capabilities: [d0] Express Root Port (Slot+), MSI 00 Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit- Capabilities: [f4] Power Management version 2 Capabilities: [70] Subsystem: Silicon Integrated Systems [SiS] PCI-to-PCI bridge Kernel driver in use: pcieport 00:02.0 ISA bridge: Silicon Integrated Systems [SiS] SiS968 [MuTIOL Media IO] (rev 01) Flags: bus master, medium devsel, latency 0 00:02.5 IDE interface: Silicon Integrated Systems [SiS] 5513 [IDE] (rev 01) (prog-if 80 [Master]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 128 I/O ports at 01f0 [size=8] I/O ports at 03f4 [size=1] I/O ports at 0170 [size=8] I/O ports at 0374 [size=1] I/O ports at ffe0 [size=16] Capabilities: [58] Power Management version 2 Kernel driver in use: pata_sis 00:03.0 USB Controller: Silicon Integrated Systems [SiS] USB 1.1 Controller (rev 0f) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 20 Memory at f9fff000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00:03.1 USB Controller: Silicon Integrated Systems [SiS] USB 1.1 Controller (rev 0f) (prog-if 10 [OHCI]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 21 Memory at f9ffe000 (32-bit, non-prefetchable) [size=4K] Kernel driver in use: ohci_hcd 00:03.3 USB Controller: Silicon Integrated Systems [SiS] USB 2.0 Controller (prog-if 20 [EHCI]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 22 Memory at f9ffd000 (32-bit, non-prefetchable) [size=4K] Capabilities: [50] Power Management version 2 Kernel driver in use: ehci_hcd 00:04.0 Ethernet controller: Silicon Integrated Systems [SiS] 191 Gigabit Ethernet Adapter (rev 02) Subsystem: ASUSTeK Computer Inc. Device 11f5 Flags: bus master, medium devsel, latency 0, IRQ 19 Memory at f9ffcc00 (32-bit, non-prefetchable) [size=128] I/O ports at cc00 [size=128] Capabilities: [40] Power Management version 2 Kernel driver in use: sis190 Kernel modules: sis190 00:05.0 IDE interface: Silicon Integrated Systems [SiS] SATA Controller / IDE mode (rev 03) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: ASUSTeK Computer Inc. Device 1b27 Flags: bus master, medium devsel, latency 64, IRQ 17 I/O ports at c800 [size=8] I/O ports at c400 [size=4] I/O ports at c000 [size=8] I/O ports at bc00 [size=4] I/O ports at b800 [size=16] I/O ports at b400 [size=128] Capabilities: [58] Power Management version 2 Kernel driver in use: sata_sis Kernel modules: sata_sis 00:06.0 PCI bridge: Silicon Integrated Systems [SiS] PCI-to-PCI bridge (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 Memory behind bridge: fdf00000-fdffffff Capabilities: [b0] Subsystem: Silicon Integrated Systems [SiS] Device 0004 Capabilities: [c0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [d0] Express Root Port (Slot+), MSI 00 Capabilities: [f4] Power Management version 2 Kernel driver in use: pcieport 00:07.0 PCI bridge: Silicon Integrated Systems [SiS] PCI-to-PCI bridge (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=03, subordinate=06, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: fe000000-febfffff Prefetchable memory behind bridge: 00000000f6000000-00000000f8ffffff Capabilities: [b0] Subsystem: Silicon Integrated Systems [SiS] Device 0004 Capabilities: [c0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Capabilities: [d0] Express Root Port (Slot+), MSI 00 Capabilities: [f4] Power Management version 2 Kernel driver in use: pcieport 00:0f.0 Audio device: Silicon Integrated Systems [SiS] Azalia Audio Controller Subsystem: ASUSTeK Computer Inc. Device 17b3 Flags: bus master, medium devsel, latency 0, IRQ 18 Memory at f9ff4000 (32-bit, non-prefetchable) [size=16K] Capabilities: [50] Power Management version 2 Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 01:00.0 VGA compatible controller: nVidia Corporation G96 [GeForce GT 130M] (rev a1) (prog-if 00 [VGA controller]) Subsystem: ASUSTeK Computer Inc. Device 2021 Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fc000000 (32-bit, non-prefetchable) [size=16M] Memory at d0000000 (64-bit, prefetchable) [size=256M] Memory at fa000000 (64-bit, non-prefetchable) [size=32M] I/O ports at dc00 [size=128] [virtual] Expansion ROM at fde80000 [disabled] [size=512K] Capabilities: [60] Power Management version 3 Capabilities: [68] MSI: Enable- Count=1/1 Maskable- 64bit+ Capabilities: [78] Express Endpoint, MSI 00 Capabilities: [b4] Vendor Specific Information: Len=14 <?> Kernel driver in use: nvidia Kernel modules: nvidia-current, nouveau, nvidiafb 02:00.0 Network controller: Atheros Communications Inc. AR928X Wireless Network Adapter (PCI-Express) (rev 01) Subsystem: Device 1a3b:1067 Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at fdff0000 (64-bit, non-prefetchable) [size=64K] Capabilities: [40] Power Management version 2 Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit- Capabilities: [60] Express Legacy Endpoint, MSI 00 Capabilities: [90] MSI-X: Enable- Count=1 Masked- Kernel driver in use: ath9k Kernel modules: ath9k 03:00.0 USB Controller: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03) (prog-if 30) Flags: bus master, fast devsel, latency 0, IRQ 10 Memory at febfe000 (64-bit, non-prefetchable) [size=8K] Capabilities: [50] Power Management version 3 Capabilities: [70] MSI: Enable- Count=1/8 Maskable- 64bit+ Capabilities: [90] MSI-X: Enable- Count=8 Masked- Capabilities: [a0] Express Endpoint, MSI 00 lsusb Bus 003 Device 002: ID 0b05:1751 ASUSTek Computer, Inc. BT-253 Bluetooth Adapter Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 002 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 001 Device 004: ID 0bda:0158 Realtek Semiconductor Corp. USB 2.0 multicard reader Bus 001 Device 002: ID 04f2:b071 Chicony Electronics Co., Ltd 2.0M UVC Webcam / CNF7129 Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub dmesg trying to post dmesg exceeded the stackexchange posting limit of 30K... but nothing there is usb 3.0

    Read the article

  • iPhone: CGPDFPageRef & CGPDFPageRelease memory leak and cryptic error message

    - by carloe
    Could someone tell me why the code below outputs "missing or invalid MediaBox" in the console? The code works fine if I remove CGPDFPageRelease(page);, but then my app starts leaking like crazy. -(CGSize)dimensionOfPageAtIndex:(int)index { CGPDFPageRef page = CGPDFDocumentGetPage(pdf, index); CGRect tempRect = CGPDFPageGetBoxRect(page, kCGPDFBleedBox); CGSize tempSize = CGSizeMake(tempRect.size.width, tempRect.size.height); CGPDFPageRelease(page); return tempSize; } I also have this code in my app, and releasing the pageref here works just fine... -(UIImage *)pageAtIndex:(NSInteger)pageNumber withWidth:(CGFloat)width andHeight:(CGFloat)height { if((pageNumber>0) && (pageNumber<=pageCount)) { CGFloat scaleRatio; // multiplier by which the PDF Page will be scaled UIGraphicsBeginImageContext(CGSizeMake(width, height)); CGContextRef context = UIGraphicsGetCurrentContext(); CGPDFPageRef page = CGPDFDocumentGetPage(pdf, pageNumber); CGRect pageRect = CGPDFPageGetBoxRect(page, kCGPDFBleedBox); //Figure out the orientation of the PDF page and set the scaleRatio accordingly if(pageRect.size.width/pageRect.size.height < 1.0) { scaleRatio = height/pageRect.size.height; } else { scaleRatio = width/pageRect.size.width; } //Calculate the offset to center the image CGFloat xOffset = 0.0; CGFloat yOffset = height; if(pageRect.size.width*scaleRatio<width) { xOffset = (width/2)-(pageRect.size.width*scaleRatio/2); } else { yOffset = height-((height/2)-(pageRect.size.height*scaleRatio/2)); } CGContextTranslateCTM(context, xOffset, yOffset); CGContextScaleCTM(context, 1.0, -1.0); CGContextSaveGState(context); CGAffineTransform pdfTransform = CGPDFPageGetDrawingTransform(page, kCGPDFBleedBox, CGRectMake(0, 0, pageRect.size.width, pageRect.size.height), 0, true); pdfTransform = CGAffineTransformScale(pdfTransform, scaleRatio, scaleRatio); CGContextConcatCTM(context, pdfTransform); CGContextDrawPDFPage(context, page); CGContextRestoreGState(context); UIImage *tempImage = UIGraphicsGetImageFromCurrentImageContext(); CGContextRelease(context); CGPDFPageRelease(page); return tempImage; } return NO; }

    Read the article

  • Report Viewer - Out Of Memory Exception

    - by Garcia Julien
    Hi, i'v got a problem with the Report Viewer form .NET 2008. I'ave to get Some 100000 Records for my company for a year dump report. The problem is i get the OutOfMemory Exception on the design of report. Do you know how can i fix it? I get only the column i need and i use a Dataset to display. Thanks Julien

    Read the article

  • AccessViolationException, attempted to read or write protected memory

    - by Malfist
    I'm using a dll that contains unsafe code for interacting with specific hardware, and I'm trying to use it from C#, but I keep getting an AccessViolationException. What's causing it, and how can I fix it? namespace FingerPrint { public unsafe partial class Form1 : Form { [DllImport("MyDll.dll")] public static extern int DoesExist(); public unsafe Form1() { InitializeComponent(); MessageBox.Show(DoesExist() + ""); } } }

    Read the article

  • UIAlertView -show causing a memory leak

    - by Erik
    I'm relatively new to iPhone Development, so this may be my fault, but it goes against what I've seen. :) I think that I'm creating a UIAlertView that lives just in this vaccuum of the 'if' statement. NSData *data = [NSURLConnection sendSynchronousRequest:request returningResponse:&response error:&error]; if(!data) { // Add an alert UIAlertView *alert = [[UIAlertView alloc] initWithTitle:@"Error" message:@"Unable to contact server" delegate:nil cancelButtonTitle:@"Ok" otherButtonTitles:nil]; NSLog(@"retain count before show: %i", alert.retainCount); [alert show]; NSLog(@"retain count before release: %i", alert.retainCount); [alert release]; NSLog(@"retain count after release: %i", alert.retainCount); return nil; } However, the console logs baffle me. retain count before show: 1 retain count before release: 6 retain count after release: 5 I've tried also adding: alert = nil; after the release. That makes the retain count 0, but I still show a leak. And if it helps, the leak's Responsible Frame is UIKeyboardInputManagerClassForInputMode. I'm also using OS 4 Beta 3. So anyone have any ideas how a local UIAlertView's retain count would increment itself by 5 when calling -show? Thanks for your help!

    Read the article

  • Access Violation Using memcpy or Assignment to an Array in a Struct

    - by Synetech inc.
    Hi, I wrote a program last night that worked just fine but when I refactored it today to make it more extensible, I ended up with a problem. The original version had a hard-coded array of bytes. After some processing, some bytes were written into the array and then some more processing was done. To avoid hard-coding the pattern, I put the array in a structure so that I could add some related data and create an array of them. However now, I cannot write to the array in the structure. Here’s a pseudo-code example: main() { char pattern[]="\x32\x33\x12\x13\xba\xbb"; PrintData(pattern); pattern[2]='\x65'; PrintData(pattern); } That one works but this one does not: struct ENTRY { char* pattern; int somenum; }; main() { ENTRY Entries[] = { {"\x32\x33\x12\x13\xba\xbb\x9a\xbc", 44} , {"\x12\x34\x56\x78", 555} }; PrintData(Entries[0].pattern); Entries[0].pattern[2]='\x65'; //0xC0000005 exception!!! :( PrintData(Entries[0].pattern); } The second version causes an access violation exception on the assignment. I’m sure it’s because the second version allocates memory differently, but I’m starting to get a headache trying to figure out what’s what or how to get fix this. (I’m currently working around it by dynamically allocating a buffer of the same size as the pattern array, copying the pattern to the new buffer, making the changes to the buffer, using the buffer in the place of the pattern array, and then trying to remember to free the—temporary—buffer.) (Specifically, the original version cast the pattern array—+offset—to a DWORD* and assigned a DWORD constant to it to overwrite the four target bytes. The new version cannot do that since the length of the source is unknown—may not be four bytes—so it uses memcpy instead. I’ve checked and re-checked and have made sure that the pointers to memcpy are correct, but I still get an access violation. I use memcpy instead of str(n)cpy because I am using plain chars (as an array of bytes), not Unicode chars and ignoring the null-terminator. Using an assignment as above causes the same problem.) Any ideas? Thanks a lot.

    Read the article

  • EXC_BAD_ACCESS error on a UITableView with ARC?

    - by Arnaud Drizard
    I am building a simple app with a custom bar tab which loads the content of the ViewController from a UITableView located in another ViewController. However, every time I try to scroll on the tableview, I get an exc_bad_access error. I enabled NSzombies and guard malloc to get more info on the issue. In the console I get: "message sent to deallocated instance 0x19182f20" and after profiling I get: # Address Category Event Type RefCt Timestamp Size Responsible Library Responsible Caller 56 0x19182f20 FirstTabBarViewController Zombie -1 00:16.613.309 0 UIKit -[UIScrollView(UIScrollViewInternal) _scrollViewWillBeginDragging] Here is a bit of the code of the ViewController in which the error occurs: .h file: #import <UIKit/UIKit.h> #import "DataController.h" @interface FirstTabBarViewController : UIViewController <UITableViewDelegate, UITableViewDataSource> { IBOutlet UITableView* tabBarTable; } @property (strong, nonatomic) IBOutlet UIView *mainView; @property (strong, nonatomic) IBOutlet UITableView *tabBarTable; @property (nonatomic, strong) DataController *messageDataController; @end .m file: #import "FirstTabBarViewController.h" #import "DataController.h" @interface FirstTabBarViewController () @end @implementation FirstTabBarViewController @synthesize tabBarTable=_tabBarTable; - (id)initWithNibName:(NSString *)nibNameOrNil bundle:(NSBundle *)nibBundleOrNil { self = [super initWithNibName:nibNameOrNil bundle:nibBundleOrNil]; if (self) { // Custom initialization } return self; } - (void)viewDidLoad { [super viewDidLoad]; } - (void)didReceiveMemoryWarning { [super didReceiveMemoryWarning]; // Dispose of any resources that can be recreated. } - (void)awakeFromNib { [super awakeFromNib]; self.messageDataController=[[DataController alloc] init]; } - (NSInteger)numberOfSectionsInTableView:(UITableView *)tableView { return 1; } - (NSInteger) tableView:(UITableView *)tableView numberOfRowsInSection:(NSInteger)section{ return [self.messageDataController countOfList]; } - (UITableViewCell *)tableView:(UITableView *)tableView cellForRowAtIndexPath:(NSIndexPath *)indexPath { static NSString *CellIdentifier = @"mainCell"; UITableViewCell *cell = [tableView dequeueReusableCellWithIdentifier:CellIdentifier]; if (cell == nil){ cell = [[UITableViewCell alloc] initWithStyle:UITableViewCellStyleDefault reuseIdentifier:CellIdentifier]; }; NSString *expenseAtIndex = [self.messageDataController objectInListAtIndex:indexPath.row]; [[cell textLabel] setText:expenseAtIndex]; return cell; } - (BOOL)tableView:(UITableView *)tableView canEditRowAtIndexPath:(NSIndexPath *)indexPath { // Return NO if you do not want the specified item to be editable. return NO; } @end This FirstTabBarViewController is loaded in the MainViewController with the following custom segue: #import "customTabBarSegue.h" #import "MainViewController.h" @implementation customTabBarSegue -(void) perform { MainViewController *src= (MainViewController *) [self sourceViewController]; UIViewController *dst=(UIViewController *)[self destinationViewController]; for (UIView *view in src.placeholderView.subviews){ [view removeFromSuperview]; } src.currentViewController =dst; [src.placeholderView addSubview:dst.view]; } @end The Datacontroller class is just a simple NSMutableArray containing strings. I am using ARC so I don't understand where the memory management error comes from. Does anybody have a clue? Any help much appreciated ;) Thanks!!

    Read the article

  • ASP.NET MVC 2 UpdateModel() is not updating values in memory or database

    - by campbelt
    Hello, I am new to MVC, and so am working through the NerdDinner tutorial, here. In particular, I'm running into problems with the use of the UpdateModel method, which is explained in the part five of that tutorial. The problem is, when I try to edit the value of a dinner object using the UpdateModel method, the values do not get updated, and no exceptions are thrown. Oddly, I am not having any trouble with the Create or Delete features that are illustrated in the tutorial. Only the update feature isn't working. Below, I have included the Controller code that I am using, as well as the view markup, which is contained in both an aspx View file and an ascx Partial View file. Here is the code inside my Controller, called DinnerController.cs: // // GET: /Dinners/Edit/2 [Authorize] public ActionResult Edit(int id) { Dinner dinner = dinnerRepository.GetDinner(id); return View(new DinnerFormViewModel(dinner)); } // // POST: /Dinners/Edit/2 [AcceptVerbs(HttpVerbs.Post), Authorize] public ActionResult Edit(int id, FormCollection formValues) { Dinner dinner = dinnerRepository.GetDinner(id); try { UpdateModel(dinner); var x = ViewData.GetModelStateErrors(); // <-- to catch other ModelState errors dinnerRepository.Save(); return RedirectToAction("Details", new { id = dinner.DinnerID }); } catch { ModelState.AddRuleViolations(dinner.GetRuleViolations()); return View(new DinnerFormViewModel(dinner)); } } The line with the comment "to catch other ModelState errors" was added after reading a possible solution from another StackOverflow thread, here: http://stackoverflow.com/questions/1461283/asp-net-mvc-updatemodel-not-updating-but-not-throwing-error Unfortunately, that solution didn't help me. Here is the corresponding markup in my Dinners/Edit.aspx View: <asp:Content ID="Main" ContentPlaceHolderID="MainContent" runat="server"> <h2>Edit Dinner</h2> <% Html.RenderPartial("DinnerForm"); %> </asp:Content> Here is the corresponding markup in my DinnerForm.ascx Partial View. This Partial View file is also used by the Create feature, which is working fine: <%=Html.ValidationSummary("Please correct the errors and try again.") %> <% using (Html.BeginForm()) { %> <fieldset> <p> <label for="Title">Dinner Title:</label> <%=Html.TextBoxFor(model => Model.Dinner.Title)%> <%=Html.ValidationMessage("Title", "*") %> </p> <p> <label for="EventDate">EventDate:</label> <%=Html.TextBoxFor(model => Model.Dinner.EventDate, new { value = String.Format("{0:g}", Model.Dinner.EventDate) })%> <%=Html.ValidationMessage("EventDate", "*") %> </p> <p> <label for="Description">Description:</label> <%=Html.TextBoxFor(model => Model.Dinner.Description)%> <%=Html.ValidationMessage("Description", "*")%> </p> <p> <label for="Address">Address:</label> <%=Html.TextBoxFor(model => Model.Dinner.Address)%> <%=Html.ValidationMessage("Address", "*") %> </p> <p> <label for="Country">Country:</label> <%=Html.DropDownListFor(model => Model.Dinner.Country, Model.Countries)%> <%=Html.ValidationMessage("Country", "*") %> </p> <p> <label for="ContactPhone">ContactPhone #:</label> <%=Html.TextBoxFor(model => Model.Dinner.ContactPhone)%> <%=Html.ValidationMessage("ContactPhone", "*") %> </p> <p> <label for="Latitude">Latitude:</label> <%=Html.TextBoxFor(model => Model.Dinner.Latitude)%> <%=Html.ValidationMessage("Latitude", "*") %> </p> <p> <label for="Longitude">Longitude:</label> <%=Html.TextBoxFor(model => Model.Dinner.Longitude)%> <%=Html.ValidationMessage("Longitude", "*") %> </p> <p> <input type="submit" value="Save"/> </p> </fieldset> <% } %> In any case, I've been hitting away at this for hours, and I'm out of ideas. So, I'm hoping someone here can help nudge me in the right direction, in order to figure out what I'm doing wrong.

    Read the article

  • Memory efficient way of inserting an array of objects with Core Data

    - by randombits
    I'm working on a piece of code for an iPhone application that fetches a bunch of data from a server and builds objects from it on the client. It ends up creating roughly 40,000 objects. They aren't displayed to the user, I just need to create instances of NSManagedObject and store them to persistent storage. Am I wrong in thinking that the only way to do this is to create a single object, then save the context? is it best to create the objects all at once, then somehow save them to the context after they're created and stored in some set or array? If so, can one show some example code for how this is done or point me in the direction to code where this is done? The objects themselves are relatively straight forward models with string or integer attributes and don't contain any complex relationships.

    Read the article

  • SQLCEException was unhandled: Internal Error: Cannot open the shared memory region

    - by dwaz
    I am trying to do a TableAdapter.Fill(dataTable) and it fails with the above error. Here is the code in Zenware.DataSet.Designer.cs [global::System.Diagnostics.DebuggerNonUserCodeAttribute()] [global::System.ComponentModel.DataObjectMethodAttribute(global::System.ComponentModel.DataObjectMethodType.Fill, true)] public virtual int Fill(ZenwareDataSet.BatchPDADataTable dataTable) { this.Adapter.SelectCommand = this.CommandCollection[0]; if ((this.ClearBeforeFill == true)) { dataTable.Clear(); } int returnValue = this.Adapter.Fill(dataTable); // <---Fails here. return returnValue; } This is generated code. Maybe there is something that I need to change? I am wondering if my app has multiple connections to the database. What can this be? Thanks for any help you can provide. Windows Mobile 6.1 device (Trimble Juno SB) SQLServerCompact 3.5 Service Pack 2 Microsoft .NET CF 3.5

    Read the article

  • Load PDF from Memory ASP.Net

    - by Sandhurst
    I am using ITextSharp to generate pdf on the fly and then saving it to disk and display it using Frame. The Frame has an attribute called src where I pass the generated file name. This all is working fine what I want to achieve is passing the generated pdf file to Frame without saving it to disk. HtmlToPdfBuilder builder = new HtmlToPdfBuilder(PageSize.LETTER); HtmlPdfPage first = builder.AddPage(); //import an entire sheet builder.ImportStylesheet(Request.PhysicalApplicationPath + "CSS\\Stylesheet.css"); string coupon = CreateCoupon(); first.AppendHtml(coupon); byte[] file = builder.RenderPdf(); File.WriteAllBytes(Request.PhysicalApplicationPath+"final.pdf", file); printable.Attributes["src"] = "final.pdf";

    Read the article

  • Memory management / ownership question?

    - by fuzzygoat
    Do I have this right ... // Reactor.h @property(nonatomic, retain) NSMutableArray *reactorCore; // Reactor.m [self setReactorCore:[NSKeyedUnarchiver unarchiveObjectWithFile:[self dataFilePath]]]; ... -(void)dealloc { [reactorCore release]; [super dealloc]; } I am pretty sure I am doing this right (but just wanted to check). By my way of thinking NSKeyedUnarchiver returns an object it owns, I am then taking ownership via the @property, later I release reactorCore and all is good?

    Read the article

  • adjacency list creation , out of Memory error

    - by p1
    Hello , I am trying to create an adjacency list to store a graph.The implementation works fine while storing 100,000 records. However,when I tried to store around 1million records I ran into OutofMemory Error : Exception in thread "main" java.lang.OutOfMemoryError: Java heap space at java.util.Arrays.copyOfRange(Arrays.java:3209) at java.lang.String.(String.java:215) at java.io.BufferedReader.readLine(BufferedReader.java:331) at java.io.BufferedReader.readLine(BufferedReader.java:362) at liarliar.main(liarliar.java:39) Following is my implementation HashMap<String,ArrayList<String>> adj = new HashMap<String,ArrayList<String>>(num); while ((str = in.readLine()) != null) { StringTokenizer Tok = new StringTokenizer(str); name = (String) Tok.nextElement(); cnt = Integer.valueOf(Tok.nextToken()); ArrayList<String> templist = new ArrayList<String>(cnt); while(cnt>0) { templist.add(in.readLine()); cnt--; } adj.put(name,templist); } //done creating a adjacency list I am wondering, if there is any better way to implement the adjacency list. Also, I know number of nodes right in the begining and , in the future I flatten the list as I visit nodes. Any suggestions ? Thanks

    Read the article

  • Create PDF in memory instead of physical file

    - by acadia
    How do one create PDF in memorystream instead of physical file using itextsharp. The code below is creating actual pdf file. Instead how can I create a byte[] and store it in the byte[] so that I can return it through a function using iTextSharp.text; using iTextSharp.text.pdf; Document doc = new Document(iTextSharp.text.PageSize.LETTER, 10, 10, 42, 35); PdfWriter wri = PdfWriter.GetInstance(doc, new FileStream("c:\\Test11.pdf", FileMode.Create)); doc.Open();//Open Document to write Paragraph paragraph = new Paragraph("This is my first line using Paragraph."); Phrase pharse = new Phrase("This is my second line using Pharse."); Chunk chunk = new Chunk(" This is my third line using Chunk."); doc.Add(paragraph); doc.Add(pharse); doc.Add(chunk); doc.Close(); //Close document

    Read the article

  • How do i have 4GB of video memory with a 1GB video card?

    - by Tomas Spc Yaczik
    I ran the direct X diagnostic tool to take a look at my graphics capabilities and its telling me that the approximate video memory is clocked in at 4096MB. That doesn't make any sense, how is that possible? The only things that i can think of were that DirectX was inaccurate so i looked at the graphics statistics of my computer on CPU-Z which was included with the motherboard and that's telling me i have "negative" 1988MB. Not only is that not 4096MB, but its giving me a negative number and i know for a fact that you can't have a negative amount of memory???!!! The only things i can think of that would be amplifying my video memory output is the PCIe 3.0 bus, or that the motherboard is somehow including the on board video chip set with the video card which only then is only 2GB of video memory, which still has to be being amplified by something. Any suggestions?

    Read the article

  • Create PDF in memory instead of physical file using C#

    - by acadia
    Hello, How do one create PDF in memorystream instead of physical file using itextsharp. The code below is creating actual pdf file. Instead how can I create a byte[] and store it in the byte[] so that I can return it through a function using iTextSharp.text; using iTextSharp.text.pdf; Document doc = new Document(iTextSharp.text.PageSize.LETTER, 10, 10, 42, 35); PdfWriter wri = PdfWriter.GetInstance(doc, new FileStream("c:\\Test11.pdf", FileMode.Create)); doc.Open();//Open Document to write Paragraph paragraph = new Paragraph("This is my first line using Paragraph."); Phrase pharse = new Phrase("This is my second line using Pharse."); Chunk chunk = new Chunk(" This is my third line using Chunk."); doc.Add(paragraph); doc.Add(pharse); doc.Add(chunk); doc.Close(); //Close document

    Read the article

  • argv Memory Allocation

    - by Joshua Green
    I was wondering if someone could tell me what I am doing wrong that I get this Unhandled Exception error message: 0xC0000005: Access violation reading location 0x0000000c. with a green pointer pointing at my first Prolog code (fid_t): Here is my header file: class UserTaskProlog { public: UserTaskProlog( ArRobot* r ); ~UserTaskProlog( ); protected: int cycles; char* argv[ 1 ]; term_t tf; term_t tx; term_t goal_term; functor_t goal_functor; ArRobot* robot; void logTask( ); }; And here is my main code: UserTaskProlog::UserTaskProlog( ArRobot* r ) : robot( r ), robotTaskFunc( this, &UserTaskProlog::logTask ) { cycles = 0; argv[ 0 ] = "libpl.dll"; argv[ 1 ] = NULL; PL_initialise( 1, argv ); PlCall( "consult( 'myPrologFile.pl' )" ); robot->addSensorInterpTask( "UserTaskProlog", 50, &robotTaskFunc ); } UserTaskProlog::~UserTaskProlog( ) { robot->remSensorInterpTask( &robotTaskFunc ); } void UserTaskProlog::logTask( ) { cycles++; fid_t fid = PL_open_foreign_frame( ); tf = PL_new_term_ref( ); PL_put_integer( tf, 5 ); tx = PL_new_term_ref( ); goal_term = PL_new_term_ref( ); goal_functor = PL_new_functor( PL_new_atom( "factorial" ), 2 ); PL_cons_functor( goal_term, goal_functor, tf, tx ); int fact; if ( PL_call( goal_term, NULL ) ) { PL_get_integer( tx, &fact ); cout << fact << endl; } PL_discard_foreign_frame( fid ); } int main( int argc, char** argv ) { ArRobot robot; ArArgumentParser argParser( &argc, argv ); UserTaskProlog talk( &robot ); } Thank you,

    Read the article

  • daynamic 2d array in c++ and memory leaks

    - by SepiDev
    Hi guys, i wrote this code, it runs ok, but when i check it under Valgrind it catches 2 problems, since i can not interpret valgrind's messages i will appreciate if anyone explain me more and tell me where is the problem!!! here is the code: #include <iostream> #define width 70000 #define height 10000 using namespace std; int main(void) { int** pint; pint = new int*[height]; for(int i = 0; i < height; i++) pint[i] = new int[width]; for(int i = 0; i < height; i++){ delete[] pint[i]; pint[i] = NULL; } delete[] pint; pint = NULL; return 1; }

    Read the article

  • how can we find that this processor supports how much memory?????

    - by Zia ur Rahman
    I have just started the Assembly language programming and in the first lecture our teacher told us about intel 8080 and intel 8085 and he said there was 64k memory with these processor. Now i want to know that how we find this amount of memory with specific processor, for example i have a processor 1.8 Ghz , now how i can find out the amount of memory that can be used with this processor. what i am trying to ask is tell me the method how we can find out this amount of memory?

    Read the article

< Previous Page | 128 129 130 131 132 133 134 135 136 137 138 139  | Next Page >