Generate all project dependencies in a single file using gcc -MM flag
- by Jabez
Hi all,
I want to generate a single dependency file which consists of all the dependencies of source files using gcc -M flags through Makefile. I googled for this solution but, all the solutions mentioned are for generating multiple deps files for multiple objects.
DEPS = make.dep
$(OBJS): $(SOURCES)
@$(CC) -MM $(SOURCEs) > $(DEPS)
@mv -f $(DEPS) $(DEPS).tmp
@sed -e 's|.$@:|$@:|' < $(DEPS).tmp > $(DEPS)
@sed -e 's/.*://' -e 's/\\$$//' < $(DEPS).tmp | fmt -1 | \
sed -e 's/^ *//' -e 's/$$/:/' >> $(DEPS)
@rm -f $(DEPS).tmp
But it is not working properly. Please tell me where i'm making the mistake.
