How the SPARC T4 Processor Optimizes Throughput Capacity: A Case Study
- by Ruud
This white paper demonstrates the architected latency hiding features of Oracle’s UltraSPARC
T2+ and SPARC T4 processors
That is the first sentence from this technical white paper, but what does it exactly mean?
Let's consider a very simple example, the computation of a = b + c. This boils down to the following (pseudo-assembler)…