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  • Using an array in embedded x86 assembly??

    - by Mark V.
    Hey all I have a method (C++) that returns a character and takes an array of characters as its parameters. I'm messing with assembly for the first time and just trying to return the first character of the array in the dl register. Here's what I have so far: char returnFirstChar(char arrayOfLetters[]) { char max; __asm { push eax push ebx push ecx push edx mov dl, 0 mov eax, arrayOfLetters[0] xor edx, edx mov dl, al mov max, dl pop edx pop ecx pop ebx pop eax } return max; } For some reason this method returns a ? Any idea whats going on? Thanks

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  • x86 assembler question

    - by b-gen-jack-o-neill
    Hi, I have 2 simple, but maybe tricky questions. Let´s say I have assembler instruction: MOV EAX,[ebx+6*7] - what I am curious is, does this instruction really actually translates into opcode as it stands,so computation of code in brackets is encoded into opcode, or is this just pseudo intruction for compiler, not CPU, so that compiler before computes the value in brackets using add mul and so, store outcome in some reg and than uses MOV EAX,reg with computed value? Just to be clear, I know the output will be the same. I am interested in execution. Second is about LEA instruction. I know what it does, but I am more interested wheather its real instruction, so compiles does not further change it, just make it into opcode as it stands, or just pseudo code for compiler to, again, first compute adress and than store it.

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  • x86 Assembly Question about outputting

    - by jdea
    My code looks like this _declspec(naked) void f(unsigned int input,unsigned int *output) { __asm{ push dword ptr[esp+4] call factorial pop ecx mov [output], eax //copy result ret } } __declspec(naked) unsigned int factorial(unsigned int n) { __asm{ push esi mov esi, dword ptr [esp+8] cmp esi, 1 jg RECURSE mov eax, 1 jmp END RECURSE: dec esi push esi call factorial pop esi inc esi mul esi END: pop esi ret } } Its a factorial function and I'm trying to output the answer after it recursively calculates the number that was passed in But what I get returned as an output is the same large number I keep getting Not sure about what is wrong with my output, by I also see this error CXX0030: Error: expression cannot be evaluated Thanks!

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  • an x86 question

    - by wide
    i'm working for my exam. i didn't resolved this question. does anyone help me? assume that there are two block, BLOCK1 AND BLOCK2. every block has 50 bytes. write a program to add BLOCK1 with BLOCK2 , and store result to BLOCK2 using LODS, STOS and LOOP etc. assembly commands?

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  • x86 assembly question

    - by kevin
    This is my assembly program which is just a function to swap *x *y. So first argument from main is address of x which is in 8(%ebp) and second one is address of y is in 12(%ebp). The program does swap x and y. I need 7 lines for doing this. can you make it 6 lines and there is a condition you can use only %eax, %ecx, and %edx 3 registers. I think about it so much, but I can't make it 6 lines. There must be a way, isn't it? This might be not a big deal, but if there is a way to get it in 6lines I want to know. movl 8(%ebp), %eax movl (%eax), %ecx movl 12(%ebp), %edx movl (%edx), %eax movl %ecx, (%edx) movl 8(%ebp), %ecx movl %eax, (%ecx)

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  • Change an array's value in x86 assembly (embedded in C++)

    - by VV
    I am messing around with assembly for the first time, and can't seem to change the index values of an array. Here's the method I am working on int ascending_sort( char arrayOfLetters[], int arraySize ) { char temp; __asm { //??? } } And these are what I tried mov temp, 'X' mov al, temp mov arrayOfLetters[0], al And this gave me an error C2415: improper operand type so I tried mov temp, 'X' mov al, temp mov BYTE PTR arrayOfLetters[0], al This complied, but it didn't change the array...

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  • Call/Ret in x86 assembly embedded in C++

    - by SP658
    This is probably trivial, but for some reason I can't it to work. Its supposed to be a simple function that changes the last byte of a dword to 'AA' (10101010), but nothing happens when I call the function. It just returns my original dword __declspec(naked) long function(unsigned long inputDWord, unsigned long *outputDWord) { _asm{ mov ebx, dword ptr[esp+4] push ebx call SET_AA pop ebx mov eax, dword ptr[esp+8] mov dword ptr[eax], ebx } } __declspec(naked) unsigned long SET_AA( unsigned long inputDWord ) { __asm{ mov eax, [esp+4] mov al, 0xAA ret } }

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  • How to make a C program that can run x86 hex codes

    - by Iowa15
    I have an array of hex codes that translate into assembly instructions and I want to create program in C that can execute these. unsigned char rawData[5356] = { 0x4C, 0x01, 0x0A, 0x00, 0x00, 0x00, 0x00, 0x00, 0x64, 0x0C, 0x00, 0x00, 0x3D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x01, 0x2E, 0x74, 0x65, 0x78, 0x74, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xB4, 0x05, 0x00, 0x00, 0xA4, 0x01, 0x00, 0x00, 0x68, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x61, 0x00, 0x00, 0x00, 0x20, 0x00, 0x30, 0x60, 0x2E, 0x64, 0x61, 0x74, 0x61, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x00, 0x30, 0xC0, 0x2E, 0x62, 0x73, 0x73, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x30, 0xC0, 0x2F, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x58, 0x07, 0x00, 0x00, 0x32, 0x0C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x20, 0x10, 0x30, 0x60, 0x2F, 0x33, 0x32, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x6C, 0x07, 0x00, 0x00,...and so on

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  • x86 and Memory Addressing

    - by IM
    I've been reading up on memory models in an assembly book I picked up and I have a question or two. Let's say that the address bus has 32 lines, the data bus has 32 lines and the CPU is 32-bit (for simplicity). Now if the CPU makes a read request and sends the 32bit address, but only needs 8 bits, all 32 bits come back anyway? Also, the addresses in memory are still addressed per byte correct? So fetching one byte would bring back 0000 0001 to address 0000 0004? Thanks in advance

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  • x86 Assembly - printf doesn't print without "\n"

    - by Bitani
    So I'm confused. I'm going through the book "Programming from the Ground Up" and am working with using libraries. printf is working just fine so long as I include a "\n" in the string, but without it it will print absolutely nothing. Any idea why this happens? Code: .section .data my_str: .ascii "Jimmy Joe is %d years old!\n\0" my_num: .long 76 .section .text .globl _start _start: pushl my_num pushl $my_str call printf movl $1, %eax movl $0, %ebx int $0x80 Also, when I use -m elf_i386 for 32-bit mode and -dynamic-linker /lib/ld-linux.so.2 -lc to link, I get the warning ld: skipping incompatible /usr/lib64/libc.so when searching for -lc If that makes any difference, or if anybody has any suggestions as to how to have it load the 32-bit library directly. Thanks!

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  • just x86 assembly question~~!!

    - by kevin
    this is my assembly program which is just a function to swap *x *y. so first argument from main is address of x which is in 8(%ebp) and second one is address of y is in 12(%ebp). the program does swap x and y. I need 7 lines for doing this. can you make it 6 lines and there is a condition you can use only %eax,%ecx, and %edx 3 registers. I think about it so much.. but.. I can't make it 6 lines...there must be a way.. isn't it? this might be not a big deal.. but if there is a way to get it in 6lines. I want to know.. if you know the way~ help me~ plz~ thank you and have a good and nice day~ movl 8(%ebp), %eax movl (%eax), %ecx movl 12(%ebp), %edx movl (%edx), %eax movl %ecx, (%edx) movl 8(%ebp), %ecx movl %eax, (%ecx)

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  • x86 linux - how to create custom malloc with address hint

    - by nandu
    Hi, I want to create a custom malloc which allocates memory blocks within a given address range. I am writing a pthreads application in which threads are bound to unique cores on a many-core machine. The memory controllers are statically mapped, so that certain range of addresses on main memory are electrically closer to a core. I want to minimize the latency of communication between cores and main memory by allocating thread memory on these "closer" regions. Any ideas would be most appreciated. Thank you! Nandu

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  • Open x86 'SOFTWARE' registry key on an x64 machine in C#

    - by Lance May
    I am trying to read the 32-bit HKLM\SOFTWARE registry key from a 64-bit (C#) application. This, of course, keeps redirecting my view to HKLM\SOFTWARE\Wow6432Node. According to what I've found this is doable, but I can't seem to find a .NET example anywhere. I just need to read; not write. Anyone ran across this before?

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  • reading keyboard input without "consuming" it in x86 assembly

    - by Bob
    Ok so here the deal: I have an assignment regarding DOS and interrupts: I need to write a sort of key-logger function that can be called from C code. what it means is a c program would call an assembly function called startlog that would indicate to start logging the keys pressed until a function called endlog is called. the logging should work like this: write the ascii value of any key pressed without disturbing the C code between startlog and endlog, meaning that if the C code also needs to read the input (let's say by scanf, it would work ok). I managed to write the logger by changing the interrupt vector 9th entry (interrupt for keyboard press) to a function I wrote that writes the values to a file, and it works fine. however the C code does not get the input. Basically what i did is read the key pressed using int 21h, however after reading the ascii value it is "consumed" so I need a way to either simulate the key press again or read the value without "consuming" it so next time a key is read it reads the same key. (I described the code in english because it is long and clumsy assembly code)

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  • First Step Towards Rapid Enterprise Application Deployment

    - by Antoinette O'Sullivan
    Take Oracle VM Server for x86 training as a first step towards deploying enterprise applications rapidly. You have a choice between the following instructor-led training: Oracle VM with Oracle VM Server for x86 1-day Seminar. Take this course from your own desk on one of the 300 events on the schedule. This seminar tells you how to build a virtualization platform using the Oracle VM Manager and Oracle VM Server for x86 and to sustain the deployment of highly configurable, inter-connected virtual machines. Oracle VM Administration: Oracle VM Server for x86 3-day hands on course. This course teaches you how to build a virtualization platform using the Oracle VM Manager and Oracle VM Server for x86. You learn how deploy and manage highly configurable, inter-connected virtual machines. The course teaches you how to install and configure Oracle VM Server for x86 as well as details of network and storage configuration, pool and repository creation, and virtual machine management.Take this course from your own desk on one of the 450 events on the schedule. You can also take this course in an Oracle classroom on one of the following events:  Location  Date  Delivery Language  Istanbul, Turkey  12 November 2012  Turkish  Wellington, New Zealand  10 Dec 2012  English  Roseveille, United States  19 November 2012  English  Warsaw, Poland  17 October 2012  Polish  Paris, France  17 October 2012  French  Paris, France  21 November 2012  French  Dusseldorfm Germany  5 November 2012  German For more information on Oracle's Virtualization courses see http://oracle.com/education/vm

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  • P6 Architecture - Register renaming aside, does the limited user registers result in more ops spent

    - by mrjoltcola
    I'm studying JIT design with regard to dynamic languages VM implementation. I haven't done much Assembly since the 8086/8088 days, just a little here or there, so be nice if I'm out of sorts. As I understand it, the x86 (IA-32) architecture still has the same basic limited register set today that it always did, but the internal register count has grown tremendously, but these internal registers are not generally available and are used with register renaming to achieve parallel pipelining of code that otherwise could not be parallelizable. I understand this optimization pretty well, but my feeling is, while these optimizations help in overall throughput and for parallel algorithms, the limited register set we are still stuck with results in more register spilling overhead such that if x86 had double, or quadruple the registers available to us, there may be significantly less push/pop opcodes in a typical instruction stream? Or are there other processor optmizations that also optimize this away that I am unaware of? Basically if I've a unit of code that has 4 registers to work with for integer work, but my unit has a dozen variables, I've got potentially a push/pop for every 2 or so instructions. Any references to studies, or better yet, personal experiences?

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  • Oracle's Sun x86 Server Product Launch Webcast, April 10th

    - by Larry Wake
    On April 10th, 2012, Oracle will host a webcast to discuss its new generation of x86 servers. Register today Topics covered will include: Enhanced virtualization for consolidation and improved server utilization Reduced licensing costs with 0.5 core factors for Oracle per core-priced software Unparalleled reliability and availability for enterprise environments Increased visibility and efficiency with Oracle Enterprise Manager Ops Center and expert 24/7 support Ongoing protection for your existing software and training investments Live Webcast:The Industry's Best x86 Platform for Running Oracle Enterprise Applications Tuesday, April 10, 2012 9:00 AM PDT 40 minutes including Q&A 

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  • Easiest/Best Way to Learn the x86 Instruction Set?

    - by mudge
    I would like to learn the x86 Instruction Set Architecture. I don't meaning learning an assembly for x86. I want to understand the machine code baby. The reason is that I would like to write an assembler for x86. Then I want to write a compiler that compiles to that assembly. I know that there are the Intel manuals and AMD manuals that cover the x86 instruction set. But those are very large and dense. I'm wondering if there is a more approachable (possibly tutorial) approach to learning the x86 instruction set architecture.

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  • What about Programmer "Invisible" registers?

    - by claws
    These are "Programmer Visible" x86-64 registers: What about the invisible registers? Just now I learned that MMU registers, Interrupt Descriptor Table (IDT) uses these invisible registers. I'm learning these things in the hard way. Is there any resource (book/documentation/etc) that gives me the complete picture at once? I am aware of the programmer visible registers and comfortable in programming with them. I just want to learn about invisible registers and their functionality. I want to get a complete picture. Where can I get this info?

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  • Ops Center 12c - Update - Provisioning Solaris on x86 Using a Card-Based NIC

    - by scottdickson
    Last week, I posted a blog describing how to use Ops Center to provision Solaris over the network via a NIC on a card rather than the built-in NIC.  Really, that was all about how to install Solaris on a SPARC system.  This week, we'll look at how to do the same thing for an x86-based server. Really, the overall process is exactly the same, at least for Solaris 11, with only minor updates. We will focus on Solaris 11 for this blog.  Once I verify that the same approach works for Solaris 10, I will provide another update. Booting Solaris 11 on x86 Just as before, in order to configure the server for network boot across a card-based NIC, it is necessary to declare the asset to associate the additional MACs with the server.  You likely will need to access the server console via the ILOM to figure out the MAC and to get a good idea of the network instance number.  The simplest way to find both of these is to start a network boot using the desired NIC and see where it appears in the list of network interfaces and what MAC is used when it tries to boot.  Go to the ILOM for the server.  Reset the server and start the console.  When the BIOS loads, select the boot menu, usually with Ctrl-P.  This will give you a menu of devices to boot from, including all of the NICs.  Select the NIC you want to boot from.  Its position in the list is a good indication of what network number Solaris will give the device. In this case, we want to boot from the 5th interface (GB_4, net4).  Pick it and start the boot processes.  When it starts to boot, you will see the MAC address for the interface Once you have the network instance and the MAC, go through the same process of declaring the asset as in the SPARC case.  This associates the additional network interface with the server.. Creating an OS Provisioning Plan The simplest way to do the boot via an alternate interface on an x86 system is to do a manual boot.  Update the OS provisioning profile as in the SPARC case to reflect the fact that we are booting from a different interface.  Update, in this case, the network boot device to be GB_4/net4, or the device corresponding to your network instance number.  Configure the profile to support manual network boot by checking the box for manual boot in the OS Provisioning profile. Booting the System Once you have created a profile and plan to support booting from the additional NIC, we are ready to install the server. Again, from the ILOM, reset the system and start the console.  When the BIOS loads, select boot from the Boot Menu as above.  Select the network interface from the list as before and start the boot process.  When the grub bootloader loads, the default boot image is the Solaris Text Installer.  On the grub menu, select Automated Installer and Ops Center takes over from there. Lessons The key lesson from all of this is that Ops Center is a valuable tool for provisioning servers whether they are connected via built-in network interfaces or via high-speed NICs on cards.  This is great news for modern datacenters using converged network infrastructures.  The process works for both SPARC and x86 Solaris installations.  And it's easy and repeatable.

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  • How can I convert convert docx or wordml xml files to xsl-fo?

    - by Jon Pastore
    I've been looking for a method to convert docx or wordml xml to xsl-fo. I read this post: http://stackoverflow.com/questions/156683/what-is-the-best-xslt-engine-for-perl but I'm having exceptional problems getting apache-fop going. I was able to download the bins and run it locally but the formatting was a little off and it didn't maintain the headers and footers or section 1 or section 3 (17 page doc 3 sections) it also overlapped the text over the outline numbers and did not maintain the font used. trying a more simple test caused fop to fail completely. I would like to find a way to create a PDF that is at least close to 100% accurate reproduction of the original doc.

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  • Adding relative path for an external graphic in a XSL document?

    - by Pran
    Hi, first of, I don't know much about XSL. I am using a app called DITA to generate pdfs. One of the things it requires is an overwrite of an xsl file; to add custom styling. I am trying to add an external graphic using a relative path. It doesn't work, unless I supply the full path. Does not work: <fo:block text-align="center" width="100%"> <fo:external-graphic src="../../images/logo.png"/> </fo:block> Does work: <fo:block text-align="center" width="100%"> <fo:external-graphic src="/absolute/path/to/images/logo.png"/> </fo:block> I looked on the web, it said to use "file:image.png" and other website said to use "url(image.png)", but neither worked. What am I doing wrong?

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