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  • Installed 4GB memory but Windows XP 32 bit only reporting 2GB?

    - by AnthonyWJones
    I've just taken an existing XP Pro 32 bit system that had only 0.5GB of memory installed and maxed it out to 4GB. The BIOS reports the 4GB ram however when XP is booted and I look at the computer properties only 2GB of RAM is reported. Can anyone explain this? Before we go up any blind allys the /3GB switch is not the answer here, I have no need for a single process to use more the 2GB of memory. I'm wondering if the the 32 bit XP Pro is deliberately limited to 2GB. I seem to remember seeing an excellent table on a Microsoft site listing all the various SKUs of Windows and what each one was limited to. However I can't seem to find that table now.

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  • Installed 4GB memory but Windows XP 32 bit only reporting 2GB?

    - by AnthonyWJones
    I've just taken an existing XP Pro 32 bit system that had only 0.5GB of memory installed and maxed it out to 4GB. The BIOS reports the 4GB ram however when XP is booted and I look at the computer properties only 2GB of RAM is reported. Can anyone explain this? Before we go up any blind allys the /3GB switch is not the answer here, I have no need for a single process to use more the 2GB of memory. I'm wondering if the the 32 bit XP Pro is deliberately limited to 2GB. I seem to remember seeing an excellent table on a Microsoft site listing all the various SKUs of Windows and what each one was limited to. However I can't seem to find that table now.

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  • Linux mdadm software RAID 6 - does it support bit corruption recovery?

    - by user101203
    Wikipedia says "RAID 2 is the only standard RAID level, other than some implementations of RAID 6, which can automatically recover accurate data from single-bit corruption in data." Does anyone know if the RAID 6 mdadm implementation in Linux is one such implementation that can automatically detect and recover from single-bit data corruption. This pertains to CentOS / Red Hat 6 if those are different from other versions. I tried searching online but didn't have much luck. With SATA error rates being 1 in 1E14 bits, and a 2TB SATA disk containing 1.6E13 bits, this is especially relevant to preventing data corruption. Thanks!

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  • Initializing SD card in SPI issues

    - by Sembazuru
    Sorry for the length of this question, but I thought it best to show as much detail to fend of questions asking if I had done A when I had already done A... ;-) I've had a look at the "micro-SD card initialization using SPI interface" thread and didn't see any answers that matched my issue (i.e. things I haven't already tried). I have a similar issue where I'm trying to access a SD card through a micro-controller's SPI interface (specifically an HC908). I've tried following the flow charts in the Physical Layer Simplified Specification v2.00 and it seems to initialize correctly on Transcend 1GB & 2GB and an AE&C 1GB card. But I'm having problems on 3 other random cards from my stash of old cards that I've used on my camera. My code is all HC908 assembler. I scoped out the SPI clock line and during initialization it's running about 350kHz (the only speed multiplier that the HC908 supplies at my low MCU clock speed that falls within the 100-400kHz window). Here are the results of the three cards that aren't completing my initialization routine (all done consecutively w/o changing any code or timing parameters): Canon 16Meg card (labeled as SD): Set card select high Send 80 SPI clock cycles (done by writing 0xFF 10 times) Set card select low Send CMD0 [0x400000000095] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x01 (indicates idle) Send CMD8 [0x48000001AA87] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x05 (idle and illegal command) Because illegal command set local flag to indicate v1 or MMC card Send CMD58 [0x7A00000000FD] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x05 (idle and illegal command) because illegal command branch to error routine Send CMD13 [0x4D000000000D] (show status buffer) and Loop up to 8 times waiting for high bit on response to go low R1= 0x05 (idle and illegal command) Is the illegal command flag stuck? Should I be doing something after CMD8 to clear that flag? SanDisk UltraII 256Meg Set card select high Send 80 SPI clock cycles (done by writing 0xFF 10 times) Set card select low Send CMD0 [0x400000000095] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x01 (idle) Send CMD8 [0x48000001AA87] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x05 (idle and illegal command) Because illegal command set local flag to indicate v1 or MMC card Send CMD58 [0x7A00000000FD] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x01 (idle) Send 0xFF 4 times to read OCR OCR = 0xFFFFFFFF Send CMD55 [0x770000000065] (1st part of ACMD41) and Loop up to 8 times waiting for high bit on response to go low R1 = 0x01 (idle) Send CMD41 [0x6900000000E5] (2nd part of ACMD41) and Loop up to 8 times waiting for high bit on response to go low R1 = 0x05 (idle and illegal command) Because illegal command, assume card is MMC Send CMD1 [0x4100000000F9] (for MMC) and Loop up to 8 times waiting for high bit on response to go low R1 = 0x05 (idle and illegal command) Repeat the CMD1 50 times (my arbitrary number to wait until idle clears) Every R1 response is 0x05 (idle and illegal command) Why is OCR all F? Doesn't seem proper at all. Also, why does ACMD41 and CMD1 respond illegal command? Is CMD1 failing because the card is waiting for a valid ACMD after the CMD55 even with the illegal command response? SanDisk ExtremeIII 2G: Set card select high Send 80 SPI clock cycles (done by writing 0xFF 10 times) Set card select low Send CMD0 [0x400000000095] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x01 (idle) Send CMD8 [0x40000001AA87] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x7F (??? My loop shows the responses for each iteration and I got 0xFF 0xFF 0xC1 0x7F... is the card getting out of sync?) Send CMD58 [0x7A00000000FD] and Loop up to 8 times waiting for high bit on response to go low R1 = 0x01 (idle and back in sync) Send 0xFF 4 times to read OCR OCR = 0x00FF80 Send CMD55 [0x770000000065] (1st part of ACMD41) and Loop up to 8 times waiting for high bit on response to go low R1 = 0x5F (??? loop responses are 0xFF 0xFF 0xF0 0x5F... again out of sync?) Send CMD41 [0x6900000000E5] (2nd part of ACMD41) and Loop up to 8 times waiting for high bit on response to go low R1 = 0x05 (idle and illegal command, but back in sync???) Because illegal command, assume card is MMC Send CMD1 [0x4100000000F9] (for MMC) and Loop up to 8 times waiting for high bit on response to go low R1 = 0x7F (??? loop responses are 0xFF 0xFF 0xC1 0x7F... again out of sync?) Repeat CMD1 and Loop up to 8 times waiting for high bit on response to go low R1 = 0x01 (idle) Repeat CMD1 and Loop up to 8 times waiting for high bit on response to go low R1 = 0x7F (??? loop responses are 0xFF 0xFF 0xC1 0x7F... again out of sync?) Repeat CMD1 and Loop up to 8 times waiting for high bit on response to go low R1 = 0x00 (out of idle) Send CMD9 [0x4900000000AF] (get CSD) and Loop up to 8 times waiting for high bit on response to go low R1 = 0x3F (??? loop responses are 0xFF 0xFF 0xC1 0x3F... again out of sync?) Code craps out because Illegal command bit is high. WTF is wrong with that card? Sometimes in sync, other times not. (The above pattern is repeatable.) I've scoped this one out and I'm not seeing any rogue clock cycles going through between MOSI/MISO transfers. Anyone have any clues? Need any more info? Thanx in advance for spending the time to read through all of this.

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  • C: 8x8 -> 16 bit multiply precision guaranteed by integer promotions?

    - by craig-blome
    I'm trying to figure out if the C Standard (C90, though I'm working off Derek Jones' annotated C99 book) guarantees that I will not lose precision multiplying two unsigned 8-bit values and storing to a 16-bit result. An example statement is as follows: unsigned char foo; unsigned int foo_u16 = foo * 10; Our Keil 8051 compiler (v7.50 at present) will generate a MUL AB instruction which stores the MSB in the B register and the LSB in the accumulator. If I cast foo to a unsigned int first: unsigned int foo_u16 = (unsigned int)foo * 10; then the compiler correctly decides I want a unsigned int there and generates an expensive call to a 16x16 bit integer multiply routine. I would like to argue beyond reasonable doubt that this defensive measure is not necessary. As I read the integer promotions described in 6.3.1.1, the effect of the first line shall be as if foo and 10 were promoted to unsigned int, the multiplication performed, and the result stored as unsigned int in foo_u16. If the compiler knows an instruction that does 8x8-16 bit multiplications without loss of precision, so much the better; but the precision is guaranteed. Am I reading this correctly? Best regards, Craig Blome

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  • Compile for mixed platform (32, 64) and reference a 32 or 64 bit DLL resolved at runtime

    - by Nigel Aston
    Using VS2010 under windows 32 or 64 bit. Our C# app calls a 3rd party DLL (managed) that interfaces to an unmanaged DLL. The 3rd party DLL API appears identical in 32 or 64 bit although underneath it links to a 32 or 64 bit unmanaged DLL. We want our C# app to run on either 32 or 64 bit OS, ideally it will auto detect the OS and load the appropriate 32rd party DLL - via a simple factory class which tests the Enviroment. So the neatest solution would be a runtime folder containing: OurApp.exe 3rdParty32.DLL 3rdPartyUnmanaged32.DLL 3rdParty64.DLL 3rdPartyUnmanaged64.DLL However, the interface for the managed 3rdParty 32 and 64 dll is identical so both cannot be referenced within the same VS2010 project: when adding the second the warning triangle is shown and it does not get referenced. Is my only answer to create two extra library DLL projects to reference the 3rdParty 32 and 64 Dlls? So I would end up with this project arrangement: Project 1: Builds OurApp.exe, dynamically creates an object for project2 or project3. Project 2: Builds OurApp32.DLL which references 3rdParty32.dll Project 3: Builds OurApp64.DLL which references 3rdParty64.dll

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  • NetBeans Development 7 - Windows 7 64-bit … JNI native calls ... a how to guide

    - by CirrusFlyer
    I provide this for you to hopefully save you some time and pain. As part of my expereince in getting to know NB Development v7 on my Windows 64-bit workstation I found another frustrating adventure in trying to get the JNI (Java Native Interface) abilities up and working in my project. As such, I am including a brief summary of steps required (as all the documentation I found was completely incorrect for these versions of Windows and NetBeans on how to do JNI). It took a couple of days of experimentation and reviewing every webpage I could find that included these technologies as keyword searches. Yuk!! Not fun. To begin, as NetBeans Development is "all about modules" if you are reading this you probably have a need for one, or more, of your modules to perform JNI calls. Most of what is available on this site or the Internet in general (not to mention the help file in NB7) is either completely wrong for these versions, or so sparse as to be essentially unuseful to anyone other than a JNI expert. Here is what you are looking for ... the "cut to the chase" - "how to guide" to get a JNI call up and working on your NB7 / Windows 64-bit box. 1) From within your NetBeans Module (not the host appliation) declair your native method(s) and make sure you can compile the Java source without errors. Example: package org.mycompanyname.nativelogic; public class NativeInterfaceTest { static { try { if (System.getProperty( "os.arch" ).toLowerCase().equals( "amd64" ) ) System.loadLibrary( <64-bit_folder_name_on_file_system>/<file_name.dll> ); else System.loadLibrary( <32-bit_folder_name_on_file_system>/<file_name.dll> ); } catch (SecurityException se) {} catch (UnsatisfieldLinkError ule) {} catch (NullPointerException npe) {} } public NativeInterfaceTest() {} native String echoString(String s); } Take notice to the fact that we only load the Assembly once (as it's in a static block), because othersise you will throw exceptions if attempting to load it again. Also take note of our single (in this example) native method titled "echoString". This is the method that our C / C++ application is going to implement, then via the majic of JNI we'll call from our Java code. 2) If using a 64-bit version of Windows (which we are here) we need to open a 64-bit Visual Studio Command Prompt (versus the standard 32-bit version), and execute the "vcvarsall" BAT file, along with an "amd64" command line argument, to set the environment up for 64-bit tools. Example: <path_to_Microsoft_Visual_Studio_10.0>/VC/vcvarsall.bat amd64 Take note that you can use any version of the C / C++ compiler from Microsoft you wish. I happen to have Visual Studio 2005, 2008, and 2010 installed on my box so I chose to use "v10.0" but any that support 64-bit development will work fine. The other important aspect here is the "amd64" param. 3) In the Command Prompt change drives \ directories on your computer so that you are at the root of the fully qualified Class location on the file system that contains your native method declairation. Example: The fully qualified class name for my natively declair method is "org.mycompanyname.nativelogic.NativeInterfaceTest". As we successfully compiled our Java in Step 1 above, we should find it contained in our NetBeans Module something similar to the following: "/build/classes/org/mycompanyname/nativelogic/NativeInterfaceTest.class" We need to make sure our Command Prompt sets, as the current directly, "/build/classes" because of our next step. 4) In this step we'll create our C / C++ Header file that contains the JNI required statments. Type the following in the Command Prompt: javah -jni org.mycompanyname.nativelogic.NativeInterfaceTest and hit enter. If you receive any kind of error that states this is an unrecognized command that simply means your Windows computer does not know the PATH to that command (it's in your /bin folder). Either run the command from there, or include the fully qualified path name when invoking this application, or set your computer's PATH environmental variable to include that path in its search. This should produce a file called "org_mycompanyname_nativelogic_NativeInterfaceTest.h" ... a C Header file. I'd make a copy of this in case you need a backup later. 5) Edit the NativeInterfaceTest.h header file and include an implementation for the echoString() method. Example: JNIEXPORT jstring JNICALL Java_org_mycompanyname_nativelogic_NativeInterfaceTest_echoString (JNIEnv *env, jobject jobj, jstring js) { return((*env)->NewStringUTF(env, "My JNI is up and working after lots of research")); } Notice how you can't simply return a normal Java String (because you're in C at the moment). You have to tell the passed in JVM variable to create a Java String for you that will be returned back. Check out the following Oracle web page for other data types and how to create them for JNI purposes. 6) Close and Save your changes to the Header file. Now that you've added an implementation to the Header change the file extention from ".h" to ".c" as it's now a C source code file that properly implements the JNI required interface. Example: NativeInterfaceTest.c 7) We need to compile the newly created source code file and Link it too. From within the Command Prompt type the following: cl /I"path_to_my_jdks_include_folder" /I"path_to_my_jdks_include_win32_folder" /D:AMD64=1 /LD NativeInterfaceTest.c /FeNativeInterfaceTest.dll /link /machine:x64 Example: cl /I"D:/Program Files/Java/jdk1.6.0_21/include" /I"D:/Program Files/java/jdk1.6.0_21/include/win32" /D:AMD64=1 /LD NativeInterfaceTest.c /FeNativeInterfaceTest.dll /link /machine:x64 Notice the quotes around the paths to the 'include" and 'include/win32' folders is required because I have spaces in my folder names ... 'Program Files'. You can include them if you have no spaces without problems, but they are mandatory if you have spaces when using a command prompt. This will generate serveral files, but it's the DLL we're interested in. This is what the System.loadLirbary() java method is looking for. 8) Congratuations! You're at the last step. Simply take the DLL Assembly and paste it at the following location: <path_of_NetBeansProjects_folder>/<project_name>/<module_name>/build/cluster/modules/lib/x64 Note that you'll probably have to create the "lib" and "x64" folders. Example: C:\Users\<user_name>\Documents\NetBeansProjects\<application_name>\<module_name>\build\cluster\modules\lib\x64\NativeInterfaceTest.dll Java code ... notice how we don't inlude the ".dll" file extension in the loadLibrary() call? System.loadLibrary( "/x64/NativeInterfaceTest" ); Now, in your Java code you can create a NativeInterfaceTest object and call the echoString() method and it will return the String value you typed in the NativeInterfaceTest.c source code file. Hopefully this will save you the brain damage I endured trying to figure all this out on my own. Good luck and happy coding!

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  • Database platform migration from Windows-32bit to Linux-64bit

    - by [email protected]
    We have a customer which have all they core business database on RAC over Windows OS. Last year they were affected by a virus that destroyed the registry and all their RAC environments were "OUT OF ORDER", the result, thousand people on vacation for a day.They were distrustful about Linux and after came an agreement to migrate their Enterprise Manager from Windows to Linux (OMS and Repository). How we did demonstrate how powerful and easy is RMAN to migrate databases across platforms.Fist of check of target platform is available from sourceSQL> select platform_name from v$db_transportable_platform;PLATFORM_NAME-----------------------------------------------------------Microsoft Windows IA (32-bit)Linux IA (32-bit)HP Tru64 UNIXLinux IA (64-bit)HP Open VMSMicrosoft Windows IA (64-bit)Linux 64-bit for AMDMicrosoft Windows 64-bit for AMDSolaris Operating System (x86)Check database object as directories that can change across platforms, also check external tables.Startup source database in read only modeRun the following RMAN ScriptRMAN> connect target / RMAN> convert database on target platform convert script 'c:/temp/convert_grid.rman'transport script 'c:/TEMP/transporta_grid.sql' new database 'gridbd' format 'c:/temp/gridmydb%U' db_file_name_convert 'C:\oracle\oradata\grid','/oracle/gridbd/data2/data';(Notice tha path change on db_file_name_convert)Move from source to target:PfileNew scriptsexternal table filesbfilesdata filesCheck pfile, and ensure that the paths are OKCreate temporary control file to connect rmanExecute the RMAN scriptRMAN> connect target / RMAN> @/home/oracle/pboixeda/win2lnx.rmanShutdown the instance and remove temporary control filesRecreate controlfile/s, take care about the used paths.Execute the transport script, transporta_grid.sqlDue we were moving from a 32-bit architecture to a 64-bit architecture, there is bug reported in 386990.1 note, we had to recreate OLAP , check the note for more details. Alter or Recreate all necessary objects Launch utlrpAfter this experience with Linux they are on the way to migrate all their RAC from 10gR2 on Windows to 11gR2 Linux 64 bit.Hope it helps

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  • Optimizing Solaris 11 SHA-1 on Intel Processors

    - by danx
    SHA-1 is a "hash" or "digest" operation that produces a 160 bit (20 byte) checksum value on arbitrary data, such as a file. It is intended to uniquely identify text and to verify it hasn't been modified. Max Locktyukhin and others at Intel have improved the performance of the SHA-1 digest algorithm using multiple techniques. This code has been incorporated into Solaris 11 and is available in the Solaris Crypto Framework via the libmd(3LIB), the industry-standard libpkcs11(3LIB) library, and Solaris kernel module sha1. The optimized code is used automatically on systems with a x86 CPU supporting SSSE3 (Intel Supplemental SSSE3). Intel microprocessor architectures that support SSSE3 include Nehalem, Westmere, Sandy Bridge microprocessor families. Further optimizations are available for microprocessors that support AVX (such as Sandy Bridge). Although SHA-1 is considered obsolete because of weaknesses found in the SHA-1 algorithm—NIST recommends using at least SHA-256, SHA-1 is still widely used and will be with us for awhile more. Collisions (the same SHA-1 result for two different inputs) can be found with moderate effort. SHA-1 is used heavily though in SSL/TLS, for example. And SHA-1 is stronger than the older MD5 digest algorithm, another digest option defined in SSL/TLS. Optimizations Review SHA-1 operates by reading an arbitrary amount of data. The data is read in 512 bit (64 byte) blocks (the last block is padded in a specific way to ensure it's a full 64 bytes). Each 64 byte block has 80 "rounds" of calculations (consisting of a mixture of "ROTATE-LEFT", "AND", and "XOR") applied to the block. Each round produces a 32-bit intermediate result, called W[i]. Here's what each round operates: The first 16 rounds, rounds 0 to 15, read the 512 bit block 32 bits at-a-time. These 32 bits is used as input to the round. The remaining rounds, rounds 16 to 79, use the results from the previous rounds as input. Specifically for round i it XORs the results of rounds i-3, i-8, i-14, and i-16 and rotates the result left 1 bit. The remaining calculations for the round is a series of AND, XOR, and ROTATE-LEFT operators on the 32-bit input and some constants. The 32-bit result is saved as W[i] for round i. The 32-bit result of the final round, W[79], is the SHA-1 checksum. Optimization: Vectorization The first 16 rounds can be vectorized (computed in parallel) because they don't depend on the output of a previous round. As for the remaining rounds, because of step 2 above, computing round i depends on the results of round i-3, W[i-3], one can vectorize 3 rounds at-a-time. Max Locktyukhin found through simple factoring, explained in detail in his article referenced below, that the dependencies of round i on the results of rounds i-3, i-8, i-14, and i-16 can be replaced instead with dependencies on the results of rounds i-6, i-16, i-28, and i-32. That is, instead of initializing intermediate result W[i] with: W[i] = (W[i-3] XOR W[i-8] XOR W[i-14] XOR W[i-16]) ROTATE-LEFT 1 Initialize W[i] as follows: W[i] = (W[i-6] XOR W[i-16] XOR W[i-28] XOR W[i-32]) ROTATE-LEFT 2 That means that 6 rounds could be vectorized at once, with no additional calculations, instead of just 3! This optimization is independent of Intel or any other microprocessor architecture, although the microprocessor has to support vectorization to use it, and exploits one of the weaknesses of SHA-1. Optimization: SSSE3 Intel SSSE3 makes use of 16 %xmm registers, each 128 bits wide. The 4 32-bit inputs to a round, W[i-6], W[i-16], W[i-28], W[i-32], all fit in one %xmm register. The following code snippet, from Max Locktyukhin's article, converted to ATT assembly syntax, computes 4 rounds in parallel with just a dozen or so SSSE3 instructions: movdqa W_minus_04, W_TMP pxor W_minus_28, W // W equals W[i-32:i-29] before XOR // W = W[i-32:i-29] ^ W[i-28:i-25] palignr $8, W_minus_08, W_TMP // W_TMP = W[i-6:i-3], combined from // W[i-4:i-1] and W[i-8:i-5] vectors pxor W_minus_16, W // W = (W[i-32:i-29] ^ W[i-28:i-25]) ^ W[i-16:i-13] pxor W_TMP, W // W = (W[i-32:i-29] ^ W[i-28:i-25] ^ W[i-16:i-13]) ^ W[i-6:i-3]) movdqa W, W_TMP // 4 dwords in W are rotated left by 2 psrld $30, W // rotate left by 2 W = (W >> 30) | (W << 2) pslld $2, W_TMP por W, W_TMP movdqa W_TMP, W // four new W values W[i:i+3] are now calculated paddd (K_XMM), W_TMP // adding 4 current round's values of K movdqa W_TMP, (WK(i)) // storing for downstream GPR instructions to read A window of the 32 previous results, W[i-1] to W[i-32] is saved in memory on the stack. This is best illustrated with a chart. Without vectorization, computing the rounds is like this (each "R" represents 1 round of SHA-1 computation): RRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRRR With vectorization, 4 rounds can be computed in parallel: RRRRRRRRRRRRRRRRRRRR RRRRRRRRRRRRRRRRRRRR RRRRRRRRRRRRRRRRRRRR RRRRRRRRRRRRRRRRRRRR Optimization: AVX The new "Sandy Bridge" microprocessor architecture, which supports AVX, allows another interesting optimization. SSSE3 instructions have two operands, a input and an output. AVX allows three operands, two inputs and an output. In many cases two SSSE3 instructions can be combined into one AVX instruction. The difference is best illustrated with an example. Consider these two instructions from the snippet above: pxor W_minus_16, W // W = (W[i-32:i-29] ^ W[i-28:i-25]) ^ W[i-16:i-13] pxor W_TMP, W // W = (W[i-32:i-29] ^ W[i-28:i-25] ^ W[i-16:i-13]) ^ W[i-6:i-3]) With AVX they can be combined in one instruction: vpxor W_minus_16, W, W_TMP // W = (W[i-32:i-29] ^ W[i-28:i-25] ^ W[i-16:i-13]) ^ W[i-6:i-3]) This optimization is also in Solaris, although Sandy Bridge-based systems aren't widely available yet. As an exercise for the reader, AVX also has 256-bit media registers, %ymm0 - %ymm15 (a superset of 128-bit %xmm0 - %xmm15). Can %ymm registers be used to parallelize the code even more? Optimization: Solaris-specific In addition to using the Intel code described above, I performed other minor optimizations to the Solaris SHA-1 code: Increased the digest(1) and mac(1) command's buffer size from 4K to 64K, as previously done for decrypt(1) and encrypt(1). This size is well suited for ZFS file systems, but helps for other file systems as well. Optimized encode functions, which byte swap the input and output data, to copy/byte-swap 4 or 8 bytes at-a-time instead of 1 byte-at-a-time. Enhanced the Solaris mdb(1) and kmdb(1) debuggers to display all 16 %xmm and %ymm registers (mdb "$x" command). Previously they only displayed the first 8 that are available in 32-bit mode. Can't optimize if you can't debug :-). Changed the SHA-1 code to allow processing in "chunks" greater than 2 Gigabytes (64-bits) Performance I measured performance on a Sun Ultra 27 (which has a Nehalem-class Xeon 5500 Intel W3570 microprocessor @3.2GHz). Turbo mode is disabled for consistent performance measurement. Graphs are better than words and numbers, so here they are: The first graph shows the Solaris digest(1) command before and after the optimizations discussed here, contained in libmd(3LIB). I ran the digest command on a half GByte file in swapfs (/tmp) and execution time decreased from 1.35 seconds to 0.98 seconds. The second graph shows the the results of an internal microbenchmark that uses the Solaris libpkcs11(3LIB) library. The operations are on a 128 byte buffer with 10,000 iterations. The results show operations increased from 320,000 to 416,000 operations per second. Finally the third graph shows the results of an internal kernel microbenchmark that uses the Solaris /kernel/crypto/amd64/sha1 module. The operations are on a 64Kbyte buffer with 100 iterations. third graph shows the results of an internal kernel microbenchmark that uses the Solaris /kernel/crypto/amd64/sha1 module. The operations are on a 64Kbyte buffer with 100 iterations. The results show for 1 kernel thread, operations increased from 410 to 600 MBytes/second. For 8 kernel threads, operations increase from 1540 to 1940 MBytes/second. Availability This code is in Solaris 11 FCS. It is available in the 64-bit libmd(3LIB) library for 64-bit programs and is in the Solaris kernel. You must be running hardware that supports Intel's SSSE3 instructions (for example, Intel Nehalem, Westmere, or Sandy Bridge microprocessor architectures). The easiest way to determine if SSSE3 is available is with the isainfo(1) command. For example, nehalem $ isainfo -v $ isainfo -v 64-bit amd64 applications sse4.2 sse4.1 ssse3 popcnt tscp ahf cx16 sse3 sse2 sse fxsr mmx cmov amd_sysc cx8 tsc fpu 32-bit i386 applications sse4.2 sse4.1 ssse3 popcnt tscp ahf cx16 sse3 sse2 sse fxsr mmx cmov sep cx8 tsc fpu If the output also shows "avx", the Solaris executes the even-more optimized 3-operand AVX instructions for SHA-1 mentioned above: sandybridge $ isainfo -v 64-bit amd64 applications avx xsave pclmulqdq aes sse4.2 sse4.1 ssse3 popcnt tscp ahf cx16 sse3 sse2 sse fxsr mmx cmov amd_sysc cx8 tsc fpu 32-bit i386 applications avx xsave pclmulqdq aes sse4.2 sse4.1 ssse3 popcnt tscp ahf cx16 sse3 sse2 sse fxsr mmx cmov sep cx8 tsc fpu No special configuration or setup is needed to take advantage of this code. Solaris libraries and kernel automatically determine if it's running on SSSE3 or AVX-capable machines and execute the correctly-tuned code for that microprocessor. Summary The Solaris 11 Crypto Framework, via the sha1 kernel module and libmd(3LIB) and libpkcs11(3LIB) libraries, incorporated a useful SHA-1 optimization from Intel for SSSE3-capable microprocessors. As with other Solaris optimizations, they come automatically "under the hood" with the current Solaris release. References "Improving the Performance of the Secure Hash Algorithm (SHA-1)" by Max Locktyukhin (Intel, March 2010). The source for these SHA-1 optimizations used in Solaris "SHA-1", Wikipedia Good overview of SHA-1 FIPS 180-1 SHA-1 standard (FIPS, 1995) NIST Comments on Cryptanalytic Attacks on SHA-1 (2005, revised 2006)

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  • External usb 3.0 hard drive is not recognised when plugged into usb 3 port (ubuntu natty 64 bit).

    - by kimangroo
    I have an Iomega Prestige Portable External Hard Drive 1TB USB 3.0. It works fine on windows 7 as a usb 3.0 drive. It isn't detected on ubuntu natty 64bit, 2.6.38-8-generic. fdisk -l cannot see it at all: Disk /dev/sda: 500.1 GB, 500107862016 bytes 255 heads, 63 sectors/track, 60801 cylinders Units = cylinders of 16065 * 512 = 8225280 bytes Sector size (logical/physical): 512 bytes / 512 bytes I/O size (minimum/optimal): 512 bytes / 512 bytes Disk identifier: 0x1bed746b Device Boot Start End Blocks Id System /dev/sda1 1 1689 13560832 27 Unknown /dev/sda2 * 1689 1702 102400 7 HPFS/NTFS /dev/sda3 1702 19978 146805760 7 HPFS/NTFS /dev/sda4 19978 60802 327914497 5 Extended /dev/sda5 25555 60802 283120640 7 HPFS/NTFS /dev/sda6 19978 23909 31571968 83 Linux /dev/sda7 23909 25555 13218816 82 Linux swap / Solaris Partition table entries are not in disk order lsusb can see it: Bus 003 Device 003: ID 059b:0070 Iomega Corp. Bus 003 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub Bus 002 Device 004: ID 05fe:0011 Chic Technology Corp. Browser Mouse Bus 002 Device 003: ID 0a12:0001 Cambridge Silicon Radio, Ltd Bluetooth Dongle (HCI mode) Bus 002 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 001 Device 005: ID 0489:e00f Foxconn / Hon Hai Bus 001 Device 004: ID 0c45:64b5 Microdia Bus 001 Device 003: ID 08ff:168f AuthenTec, Inc. Bus 001 Device 002: ID 8087:0024 Intel Corp. Integrated Rate Matching Hub Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub And dmesg | grep -i xhci (I may have unplugged the drive and plugged it back in again after booting): [ 1.659060] pci 0000:04:00.0: xHCI HW did not halt within 2000 usec status = 0x0 [ 11.484971] xhci_hcd 0000:04:00.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18 [ 11.484997] xhci_hcd 0000:04:00.0: setting latency timer to 64 [ 11.485002] xhci_hcd 0000:04:00.0: xHCI Host Controller [ 11.485064] xhci_hcd 0000:04:00.0: new USB bus registered, assigned bus number 3 [ 11.636149] xhci_hcd 0000:04:00.0: irq 18, io mem 0xc5400000 [ 11.636241] xhci_hcd 0000:04:00.0: irq 43 for MSI/MSI-X [ 11.636246] xhci_hcd 0000:04:00.0: irq 44 for MSI/MSI-X [ 11.636251] xhci_hcd 0000:04:00.0: irq 45 for MSI/MSI-X [ 11.636256] xhci_hcd 0000:04:00.0: irq 46 for MSI/MSI-X [ 11.636261] xhci_hcd 0000:04:00.0: irq 47 for MSI/MSI-X [ 11.639654] xHCI xhci_add_endpoint called for root hub [ 11.639655] xHCI xhci_check_bandwidth called for root hub [ 11.956366] usb 3-1: new SuperSpeed USB device using xhci_hcd and address 2 [ 12.001073] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 12.007059] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 12.012932] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 12.018922] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 12.049139] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 12.056754] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 12.131607] xhci_hcd 0000:04:00.0: WARN no SS endpoint bMaxBurst [ 12.179717] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 12.686876] xhci_hcd 0000:04:00.0: WARN: babble error on endpoint [ 12.687058] xhci_hcd 0000:04:00.0: WARN Set TR Deq Ptr cmd invalid because of stream ID configuration [ 12.687152] xhci_hcd 0000:04:00.0: ERROR Transfer event for disabled endpoint or incorrect stream ring [ 43.330737] usb 3-1: reset SuperSpeed USB device using xhci_hcd and address 2 [ 43.422579] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 43.422658] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff88014669af00 [ 43.422665] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff88014669af40 [ 43.422671] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff88014669af80 [ 43.422677] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff88014669afc0 [ 43.531159] xhci_hcd 0000:04:00.0: WARN no SS endpoint bMaxBurst [ 125.160248] xhci_hcd 0000:04:00.0: WARN no SS endpoint bMaxBurst [ 903.766466] usb 3-1: new SuperSpeed USB device using xhci_hcd and address 3 [ 903.807789] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 903.813530] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 903.819400] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 903.825104] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 903.855067] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 903.862314] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 903.862597] xhci_hcd 0000:04:00.0: WARN no SS endpoint bMaxBurst [ 903.913211] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 904.424416] xhci_hcd 0000:04:00.0: WARN: babble error on endpoint [ 904.424599] xhci_hcd 0000:04:00.0: WARN Set TR Deq Ptr cmd invalid because of stream ID configuration [ 904.424700] xhci_hcd 0000:04:00.0: ERROR Transfer event for disabled endpoint or incorrect stream ring [ 935.139021] usb 3-1: reset SuperSpeed USB device using xhci_hcd and address 3 [ 935.226075] xhci_hcd 0000:04:00.0: WARN: short transfer on control ep [ 935.226140] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff880148186b00 [ 935.226148] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff880148186b40 [ 935.226153] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff880148186b80 [ 935.226159] xhci_hcd 0000:04:00.0: xHCI xhci_drop_endpoint called with disabled ep ffff880148186bc0 [ 935.343339] xhci_hcd 0000:04:00.0: WARN no SS endpoint bMaxBurst I thought it might be that the firmware wasn't compatible with linux or something, but when booting a live image of partedmagic, (2.6.38.4-pmagic), the drive was detected fine, I could mount it and got usb 3.0 speeds (at least they double the speeds I got from plugging same drive in usb 2 ports). dmesg in partedmagic did say something about no SuperSpeed endpoint which was an error I saw in a previous dmesg of ubuntu: Jun 27 15:49:02 (none) user.info kernel: [ 2.978743] xhci_hcd 0000:04:00.0: PCI INT A -> GSI 18 (level, low) -> IRQ 18 Jun 27 15:49:02 (none) user.debug kernel: [ 2.978771] xhci_hcd 0000:04:00.0: setting latency timer to 64 Jun 27 15:49:02 (none) user.info kernel: [ 2.978781] xhci_hcd 0000:04:00.0: xHCI Host Controller Jun 27 15:49:02 (none) user.info kernel: [ 2.978856] xhci_hcd 0000:04:00.0: new USB bus registered, assigned bus number 3 Jun 27 15:49:02 (none) user.info kernel: [ 3.089458] xhci_hcd 0000:04:00.0: irq 18, io mem 0xc5400000 Jun 27 15:49:02 (none) user.debug kernel: [ 3.089541] xhci_hcd 0000:04:00.0: irq 42 for MSI/MSI-X Jun 27 15:49:02 (none) user.debug kernel: [ 3.089544] xhci_hcd 0000:04:00.0: irq 43 for MSI/MSI-X Jun 27 15:49:02 (none) user.debug kernel: [ 3.089546] xhci_hcd 0000:04:00.0: irq 44 for MSI/MSI-X Jun 27 15:49:02 (none) user.debug kernel: [ 3.089548] xhci_hcd 0000:04:00.0: irq 45 for MSI/MSI-X Jun 27 15:49:02 (none) user.debug kernel: [ 3.089550] xhci_hcd 0000:04:00.0: irq 46 for MSI/MSI-X Jun 27 15:49:02 (none) user.warn kernel: [ 3.092857] usb usb3: No SuperSpeed endpoint companion for config 1 interface 0 altsetting 0 ep 129: using minimum values Jun 27 15:49:02 (none) user.info kernel: [ 3.092864] usb usb3: New USB device found, idVendor=1d6b, idProduct=0003 Jun 27 15:49:02 (none) user.info kernel: [ 3.092866] usb usb3: New USB device strings: Mfr=3, Product=2, SerialNumber=1 Jun 27 15:49:02 (none) user.info kernel: [ 3.092867] usb usb3: Product: xHCI Host Controller Jun 27 15:49:02 (none) user.info kernel: [ 3.092869] usb usb3: Manufacturer: Linux 2.6.38.4-pmagic xhci_hcd Jun 27 15:49:02 (none) user.info kernel: [ 3.092870] usb usb3: SerialNumber: 0000:04:00.0 Jun 27 15:49:02 (none) user.debug kernel: [ 3.092961] xHCI xhci_add_endpoint called for root hub Jun 27 15:49:02 (none) user.debug kernel: [ 3.092963] xHCI xhci_check_bandwidth called for root hub Well I have no idea what's going wrong, and I haven't had much luck from google and the forums so far. A number of unanswered threads with people with similar error messages and problems only. Hopefully someone here can help or point me in the right direction?!

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  • How to install the latest version of google earth on ubuntu 12.10 64-bit?

    - by user114769
    Chris here with a huge problem with the Google earth latest version. Gosh.. whenever I try to lunch the app this comes out. I'v Tried this web site nothing worked: (THANK YOU SO MUCH FOR EVEN READING THIS. MAY YOU GUYS HAVE A NICE DAY. christopher@christopher-E4300:~$ google-earth Google Earth has caught signal 11. We apologize for the inconvenience, but Google Earth has crashed. This is a bug in the program, and should never happen under normal circumstances. A bug report and debugging data have been written to this text file: /home/christopher/.googleearth/crashlogs/crashlog-50cbd67e.txt Please include this file if you submit a bug report to Google. https://help.ubuntu.com/community/GoogleEarth#Installing_the_.deb_file_downloaded_from_the_Google_Earth_Website Here is the content of /home/christopher/.googleearth/crashlogs/crashlog-50cbd67e.txt Major Version 7 Minor Version 0 Build Number 0001 Build Date Oct 29 2012 Build Time 19:13:39 OS Type 3 OS Major Version 3 OS Minor Version 5 OS Build Version 0 OS Patch Version 0 Crash Signal 11 Crash Time 1355535998 Up Time 0.789556 Stacktrace from glibc: ./libgoogleearth_free.so(+0x1e9cfb)[0xf757dcfb] ./libgoogleearth_free.so(+0x1e9f43)[0xf757df43] [0xf7726400]

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  • Deluge bit torrent. No incoming connections?

    - by mark kirby
    Hi I keep getting a no incoming connections on my Deluge. I know this is a pretty common problem from Google, but I have posted here to see if any one knows why this happens. I have port forwarded my router and set Deluge to the correct port range. Is this just a bug ? It does not seem to affect the speed so I obviously do have incoming connections and Transmission says the ports are open. So I guess my question is why is this happening ?

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  • I have Ubuntu Server 11.10 64-bit . Updates were working but now fails every time after apt-get update

    - by jason pate
    This is what I get when I try to run apt-get update Err http: //security.ubuntu.com oneiric-security InRelease Err http: //us.archive.ubuntu.com oneiric InRelease Err http: //security.ubuntu.com oneiric-security Release.gpg Temporary failure resolving 'security.ubuntu.com' Err http: //us.archive.ubuntu.com oneiric-updates InRelease Err http: //us.archive.ubuntu.com oneiric Release.gpg Temporary failure resolving 'us.archive.ubuntu.com' Err http: //us.archive.ubuntu.com oneiric-updates Release.gpg Temporary failure resolving 'us.archive.ubuntu.com' Reading package lists... Done W: Failed to fetch http: //us.archive.ubuntu.com/ubuntu/dists/oneiric/InRelease W: Failed to fetch http: //us.archive.ubuntu.com/ubuntu/dists/oneiric-updates/InRelease W: Failed to fetch http: //security.ubuntu.com/ubuntu/dists/oneiric-security/InRelease W: Failed to fetch http: //security.ubuntu.com/ubuntu/dists/oneiric-security/Release.gpg Temporary failure resolving 'security.ubuntu.com' W: Failed to fetch http: //us.archive.ubuntu.com/ubuntu/dists/oneiric/Release.gpg Temporary failure resolving 'us.archive.ubuntu.com' W: Failed to fetch http: //us.archive.ubuntu.com/ubuntu/dists/oneiric-updates/Release.gpg Temporary failure resolving 'us.archive.ubuntu.com' W: Some index files failed to download. They have been ignored, or old ones used instead.

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  • In-House Generated Certificates Supported for Signing E-Business Suite JAR Files

    - by Elke Phelps (Oracle Development)
    The E-Business Suite uses Java Archive (JAR) files to deliver certain types of E-Business Suite content desktop clients.  Previously we announced the support of securing JAR files with 3072-bit certificates signed by a third-party Certificate Authority (CA).  We now support securing JAR files with in-house generated certificates.  The new steps to use an in-house Certificate Authority for securing JAR files are provided in: Enhanced Signing of Oracle E-Business Suite JAR Files (Note 1207184.1) This enhancement is great news for those of you familiar with the warning that is triggered when using a self-signed certificate.  As a result of supporting self-signed certificates, the following warning can be avoided: Oracle E-Business Suite Release 12 Certified Platforms Linux x86 (Oracle Linux 4, 5) Linux x86 (RHEL 3, 4, 5) Linux x86 (SLES 9, 10) Linux x86-64 (Oracle Linux 4, 5) Linux x86-64 (RHEL 4, 5) Linux x86-64 (SLES 9, 10)  Oracle Solaris on SPARC (64-bit) (8, 9, 10) IBM AIX on Power Systems (64-bit) (5.3, 6.1) IBM Linux on System z** (RHEL 5, SLES 9, SLES 10) HP-UX Itanium (11.23, 11.31) HP-UX PA-RISC (64-bit) (11.11, 11.23, 11.31) Microsoft Windows Server (32-bit) (2003, 2008 for EBS 12.1 only) Oracle E-Business Suite Release 11i Certified Platforms Linux x86 (Oracle Enterprise Linux 4, 5) Linux x86 (RHEL 3, 4, 5) Linux x86 (SLES 8, 9, 10) Linux x86 (Asianux 1.0) Oracle Solaris on SPARC (64-bit) (8, 9, 10) IBM AIX on Power Systems (64-bit) (5.3, 6.1) HP-UX PA-RISC (64-bit) (11.11, 11.23, 11.31) HP Tru64 (5.1b) Microsoft Windows Server (32-bit) (2000, 2003) References Enhanced Signing of Oracle E-Business Suite JAR Files (Note 1207184.1) Related Articles Two New Options for Signing E-Business Suite JAR Files Now Available What Are the Minimum Desktop Requirements for EBS? Internet Explorer 9 Certified with Oracle E-Business Suite

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  • Feeling a bit... under-challenged in my university course

    - by Corey
    I'm currently a sophomore at my university, majoring in Computer Science. Obviously, there are some programming courses as part of my curriculum. However, I'm feeling very underwhelmed by its progress. I've self-taught myself a lot and like to code in my spare time as a hobby. I'm currently in Computer Science II. I never took CS 1 because it seemed rather basic -- I asked someone in the department if they would override my CS 1 requirement if I passed their final (which I did with flying colors). Anyway, the class is going by quite slowly. It seems like the rest of the class has a hard time understanding some basic concepts, which the professor needs to keep going over to help them understand. Is this normal? Looking at the class schedule, I seem to know everything except for one or two things near the very end of the semester. Is there a different perspective I can look at this through so it doesn't seem so boring?

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  • Why doesn't Wolfram Workbench work on 64-bit Ubuntu?

    - by Ian Hincks
    I have downloaded the shell script (Workbench_2.0.0_LINUX.sh), I have run it as root with it giving no complaints, relevant looking files have appeared in /usr/local/Wolfram/WolframWorkbench/2.0/ and it has created the executable "WolframWorkbench" in /usr/local/bin. However, when I run WolframWorkbench from terminal it spits out /usr/local/bin/WolframWorkbench: 46: exec: /usr/local/Wolfram/WolframWorkbench/2.0/WolframWorkbench: not found That file does indeed exist, and is executable. I have also tried running it directly, and I have also tried running the /usr/local/Wolfram/WolframWorkbench/2.0/Executables/WolframWorkbench too. Is there something I'm missing? (I am running Ubuntu 12.04 64bit with openjdk7)

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  • Ubuntu 12.04 LTS 64 bit. Logitech m510 mouse not working!

    - by Alonso
    When I run lsusb, this shows up: Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 003 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 004 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 005 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 006 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 007 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 008 Device 001: ID 1d6b:0001 Linux Foundation 1.1 root hub Bus 006 Device 004: ID 046d:c52b Logitech, Inc. Unifying Receiver I have followed and done all of the stuff in: Ubuntu cannot detect my Logitech Wireless m510 mouse? Yet my mouse still fails to work!!! When trying to install HIDpoint this appears after entering Y: libpng does not exist libtiff does not exist Gathering System information and generating a log Launching HIDPoint Installer ./hidpointsetup: error while loading shared libraries: libpng.so.3: cannot open shared object file: No such file or directory What can I do to fix this?

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  • Sendmail on ubuntu 12.04 64 bit connection times out?

    - by adam
    Okay i get the following error message: to=<[email protected]>, ctladdr=<www-data@adam-linux> (33/33), delay=2+08:20:35, xdelay=00:00:00, mailer=esmtp, pri=25590437, relay=adamziolkowski.com., dsn=4.0.0, stat=Deferred: Connection timed out with adamziolkowski.com. I'm guessing to make sendmail work. I have to change the default outgoing port number to 465 because comcast blocks port 25. Any ideas? What could be causing this error?

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  • Database Mail and SMO are indeed supported on 64-bit, Standard Edition instances of SQL Server 2012

    - by Argenis
      This is something that comes up rather regularly at forums, so I decided to create a quick post to make sure that folks out there can feel better about SQL Server 2012. If you read this Web article, “Features Supported By Editions of SQL Server 2012” as of time of writing this post, you will see that the article points out that these two features are not supported on x64 Standard Edition. This is NOT correct. It is most definitely a documentation bug – one that unfortunately has caused some customers to sit on a waiting pattern before upgrading to SQL Server 2012. Database Mail and SMO indeed work and are fully supported on SQL Server 2012 Standard Edition x64 instances. These features work as they should. I have contacted the documentation teams internally to make sure that this is reflected on next releases of said Web article.

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  • Wine 1.4. Cannot install vcrun6 on Ubuntu Studio 12.04.1 64 bit

    - by ABOBA
    Cannot install vcrun6. I tried to do it with winetricks and manually (download vcredist.exe and install), but nothing. Launching in terminal gives the following _user@_user-machine:~$ WINEPREFIX="/home/_user/.wine" wine "C:/vcredist.exe" fixme:setupapi:SetupDefaultQueueCallbackW notification 262144 params 32f63c,0 err:setupapi:SetupDefaultQueueCallbackW copy error 0 L"C:\\users\\_user\\Temp\\IXP000.TMP\\comcat.dll" -> L"C:\\windows\\system32\\comcat.dll" fixme:setupapi:SetupDefaultQueueCallbackW notification 262144 params 32f63c,0 err:setupapi:SetupDefaultQueueCallbackW copy error 0 L"C:\\users\\_user\\Temp\\IXP000.TMP\\msvcrt.dll" -> L"C:\\windows\\system32\\msvcrt.dll" fixme:setupapi:SetupDefaultQueueCallbackW notification 262144 params 32f63c,0 err:setupapi:SetupDefaultQueueCallbackW copy error 0 L"C:\\users\\_user\\Temp\\IXP000.TMP\\oleaut32.dll" -> L"C:\\windows\\system32\\oleaut32.dll" fixme:setupapi:SetupDefaultQueueCallbackW notification 262144 params 32f63c,0 err:setupapi:SetupDefaultQueueCallbackW copy error 0 L"C:\\users\\_user\\Temp\\IXP000.TMP\\olepro32.dll" -> L"C:\\windows\\system32\\olepro32.dll" fixme:setupapi:SetupDefaultQueueCallbackW notification 262144 params 32f63c,0 err:setupapi:SetupDefaultQueueCallbackW copy error 0 L"C:\\users\\_user\\Temp\\IXP000.TMP\\stdole2.tlb" -> L"C:\\windows\\system32\\stdole2.tlb" The distribution is Ubuntu Studio 12.04.1 64bit Thanks in advance

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  • Boolean 'NOT' in T-SQL not working on 'bit' datatype?

    - by Joannes Vermorel
    Trying to perform a single boolean NOT operation, it appears that under MS SQL Server 2005, the following block does not work DECLARE @MyBoolean bit; SET @MyBoolean = 0; SET @MyBoolean = NOT @MyBoolean; SELECT @MyBoolean; Instead, I am getting more successful with DECLARE @MyBoolean bit; SET @MyBoolean = 0; SET @MyBoolean = 1 - @MyBoolean; SELECT @MyBoolean; Yet, this looks a bit a twisted way to express something as simple as a negation. Am I missing something?

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  • Can Microsoft store three-valued fields in a single bit?

    - by fenomas
    I'm completely ignorant of SQL/databases, but I was chatting with a friend who does a lot of database work about how some databases use a "boolean" field that can take a value of NULL in addition to true and false. Regarding this, he made a comment along these lines: "To Microsoft's credit, they have never referred to that kind of field as a boolean, they just call it a bit. And it's a true bit - if you have eight or fewer bit fields in a record, it only requires one byte to store them all." Naturally that seems impossible to me - if the field can hold three values you're not going to fit eight of them into a byte. My friend agreed that it seemed odd, but begged ignorance of the low-level internals and said that so far as he knew, such fields can hold three values when viewed from the SQL side, and it does work out to require a byte of storage. I imagine one of us has a wire crossed. Can anyone explain what's really going on here?

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