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  • I have a Segmentation fault (core dumped) when using strcpy, malloc, and struct

    - by malsh002
    Okay, when I run this code, I have a segmentation fault #include<stdio.h> #include<stdlib.h> #include<string.h> #define MAX 64 struct example { char *name; }; int main() { struct example *s = malloc (MAX); strcpy(s->name ,"Hello World!!"); return !printf("%s\n", s->name); } the terminal output: alshamlan@alshamlan-VGN-CR520E:/tmp/interview$ make q1 cc -Wall -g q1.c -o q1 alshamlan@alshamlan-VGN-CR520E:/tmp/interview$ ./q1 Segmentation fault (core dumped) alshamlan@alshamlan-VGN-CR520E:/tmp/interview$ gedit q1.c Can someone explain what's going on? thanks.

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  • Linux e1000e (Intel networking driver) problems galore, where do I start?

    - by Evan Carroll
    I'm currently having a major problem with e1000e (not working at all) in Ubuntu Maverick (1.0.2-k4), after resume I'm getting a lot of stuff in dmesg: [ 9085.820197] e1000e 0000:02:00.0: PCI INT A disabled [ 9089.907756] e1000e: Intel(R) PRO/1000 Network Driver - 1.0.2-k4 [ 9089.907762] e1000e: Copyright (c) 1999 - 2009 Intel Corporation. [ 9089.907797] e1000e 0000:02:00.0: Disabling ASPM L1 [ 9089.907827] e1000e 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 9089.907857] e1000e 0000:02:00.0: setting latency timer to 64 [ 9089.908529] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9089.908922] e1000e 0000:02:00.0: Disabling ASPM L0s [ 9089.908954] e1000e 0000:02:00.0: (unregistered net_device): PHY reset is blocked due to SOL/IDER session. [ 9090.024625] e1000e 0000:02:00.0: eth0: (PCI Express:2.5GB/s:Width x1) 00:0a:e4:3e:ce:74 [ 9090.024630] e1000e 0000:02:00.0: eth0: Intel(R) PRO/1000 Network Connection [ 9090.024712] e1000e 0000:02:00.0: eth0: MAC: 2, PHY: 2, PBA No: 005302-003 [ 9090.109492] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9090.164219] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X and, a bunch of [ 2128.005447] e1000e 0000:02:00.0: eth0: Detected Hardware Unit Hang: [ 2128.005452] TDH <89> [ 2128.005454] TDT <27> [ 2128.005456] next_to_use <27> [ 2128.005458] next_to_clean <88> [ 2128.005460] buffer_info[next_to_clean]: [ 2128.005463] time_stamp <6e608> [ 2128.005465] next_to_watch <8a> [ 2128.005467] jiffies <6f929> [ 2128.005469] next_to_watch.status <0> [ 2128.005471] MAC Status <80080703> [ 2128.005473] PHY Status <796d> [ 2128.005475] PHY 1000BASE-T Status <4000> [ 2128.005477] PHY Extended Status <3000> [ 2128.005480] PCI Status <10> I decided to compile the latest stable e1000e to 1.2.17, now I'm getting: [ 9895.678050] e1000e: Intel(R) PRO/1000 Network Driver - 1.2.17-NAPI [ 9895.678055] e1000e: Copyright(c) 1999 - 2010 Intel Corporation. [ 9895.678098] e1000e 0000:02:00.0: Disabling ASPM L1 [ 9895.678129] e1000e 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 9895.678162] e1000e 0000:02:00.0: setting latency timer to 64 [ 9895.679136] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9895.679160] e1000e 0000:02:00.0: Disabling ASPM L0s [ 9895.679192] e1000e 0000:02:00.0: (unregistered net_device): PHY reset is blocked due to SOL/IDER session. [ 9895.791758] e1000e 0000:02:00.0: eth0: (PCI Express:2.5GB/s:Width x1) 00:0a:e4:3e:ce:74 [ 9895.791766] e1000e 0000:02:00.0: eth0: Intel(R) PRO/1000 Network Connection [ 9895.791850] e1000e 0000:02:00.0: eth0: MAC: 3, PHY: 2, PBA No: 005302-003 [ 9895.892464] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9895.948175] e1000e 0000:02:00.0: irq 44 for MSI/MSI-X [ 9895.949111] ADDRCONF(NETDEV_UP): eth0: link is not ready [ 9895.954694] e1000e: eth0 NIC Link is Up 10 Mbps Full Duplex, Flow Control: RX/TX [ 9895.954703] e1000e 0000:02:00.0: eth0: 10/100 speed: disabling TSO [ 9895.955157] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 9906.832056] eth0: no IPv6 routers present With 1.2.20 I get: [ 9711.525465] e1000e: Intel(R) PRO/1000 Network Driver - 1.2.20-NAPI [ 9711.525472] e1000e: Copyright(c) 1999 - 2010 Intel Corporation. [ 9711.525521] e1000e 0000:02:00.0: Disabling ASPM L1 [ 9711.525554] e1000e 0000:02:00.0: PCI INT A -> GSI 16 (level, low) -> IRQ 16 [ 9711.525586] e1000e 0000:02:00.0: setting latency timer to 64 [ 9711.526460] e1000e 0000:02:00.0: irq 45 for MSI/MSI-X [ 9711.526487] e1000e 0000:02:00.0: Disabling ASPM L0s [ 9711.526523] e1000e 0000:02:00.0: (unregistered net_device): PHY reset is blocked due to SOL/IDER session. [ 9711.639763] e1000e 0000:02:00.0: eth0: (PCI Express:2.5GB/s:Width x1) 00:0a:e4:3e:ce:74 [ 9711.639771] e1000e 0000:02:00.0: eth0: Intel(R) PRO/1000 Network Connection [ 9711.639854] e1000e 0000:02:00.0: eth0: MAC: 3, PHY: 2, PBA No: 005302-003 [ 9712.060770] e1000e 0000:02:00.0: irq 45 for MSI/MSI-X [ 9712.116195] e1000e 0000:02:00.0: irq 45 for MSI/MSI-X [ 9712.117098] ADDRCONF(NETDEV_UP): eth0: link is not ready [ 9712.122684] e1000e: eth0 NIC Link is Up 100 Mbps Full Duplex, Flow Control: RX/TX [ 9712.122693] e1000e 0000:02:00.0: eth0: 10/100 speed: disabling TSO [ 9712.123142] ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready [ 9722.920014] eth0: no IPv6 routers present But, I'm still getting these [ 9982.992851] PCI Status <10> [ 9984.993602] e1000e 0000:02:00.0: eth0: Detected Hardware Unit Hang: [ 9984.993606] TDH <5d> [ 9984.993608] TDT <6b> [ 9984.993611] next_to_use <6b> [ 9984.993613] next_to_clean <5b> [ 9984.993615] buffer_info[next_to_clean]: [ 9984.993617] time_stamp <24da80> [ 9984.993619] next_to_watch <5d> [ 9984.993621] jiffies <24f200> [ 9984.993624] next_to_watch.status <0> [ 9984.993626] MAC Status <80080703> [ 9984.993628] PHY Status <796d> [ 9984.993630] PHY 1000BASE-T Status <4000> [ 9984.993632] PHY Extended Status <3000> [ 9984.993635] PCI Status <10> [ 9986.001047] e1000e 0000:02:00.0: eth0: Reset adapter [ 9986.176202] e1000e: eth0 NIC Link is Up 10 Mbps Full Duplex, Flow Control: RX/TX [ 9986.176211] e1000e 0000:02:00.0: eth0: 10/100 speed: disabling TSO I'm not sure where to start troubleshooting this. Any ideas? Here is the result of ethtool -d eth0 MAC Registers ------------- 0x00000: CTRL (Device control register) 0x18100248 Endian mode (buffers): little Link reset: reset Set link up: 1 Invert Loss-Of-Signal: no Receive flow control: enabled Transmit flow control: enabled VLAN mode: disabled Auto speed detect: disabled Speed select: 1000Mb/s Force speed: no Force duplex: no 0x00008: STATUS (Device status register) 0x80080703 Duplex: full Link up: link config TBI mode: disabled Link speed: 10Mb/s Bus type: PCI Express Port number: 0 0x00100: RCTL (Receive control register) 0x04048002 Receiver: enabled Store bad packets: disabled Unicast promiscuous: disabled Multicast promiscuous: disabled Long packet: disabled Descriptor minimum threshold size: 1/2 Broadcast accept mode: accept VLAN filter: enabled Canonical form indicator: disabled Discard pause frames: filtered Pass MAC control frames: don't pass Receive buffer size: 2048 0x02808: RDLEN (Receive desc length) 0x00001000 0x02810: RDH (Receive desc head) 0x00000001 0x02818: RDT (Receive desc tail) 0x000000F0 0x02820: RDTR (Receive delay timer) 0x00000000 0x00400: TCTL (Transmit ctrl register) 0x3103F0FA Transmitter: enabled Pad short packets: enabled Software XOFF Transmission: disabled Re-transmit on late collision: enabled 0x03808: TDLEN (Transmit desc length) 0x00001000 0x03810: TDH (Transmit desc head) 0x00000000 0x03818: TDT (Transmit desc tail) 0x00000000 0x03820: TIDV (Transmit delay timer) 0x00000008 PHY type: IGP2 and ethtool -c eth0 Coalesce parameters for eth0: Adaptive RX: off TX: off stats-block-usecs: 0 sample-interval: 0 pkt-rate-low: 0 pkt-rate-high: 0 rx-usecs: 3 rx-frames: 0 rx-usecs-irq: 0 rx-frames-irq: 0 tx-usecs: 0 tx-frames: 0 tx-usecs-irq: 0 tx-frames-irq: 0 rx-usecs-low: 0 rx-frame-low: 0 tx-usecs-low: 0 tx-frame-low: 0 rx-usecs-high: 0 rx-frame-high: 0 tx-usecs-high: 0 tx-frame-high: 0 Here is also the lspci -vvv for this controller 02:00.0 Ethernet controller: Intel Corporation 82573L Gigabit Ethernet Controller Subsystem: Lenovo ThinkPad X60s Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 64 bytes Interrupt: pin A routed to IRQ 45 Region 0: Memory at ee000000 (32-bit, non-prefetchable) [size=128K] Region 2: I/O ports at 2000 [size=32] Capabilities: [c8] Power Management version 2 Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=1 PME- Capabilities: [d0] MSI: Enable+ Count=1/1 Maskable- 64bit+ Address: 00000000fee0300c Data: 415a Capabilities: [e0] Express (v1) Endpoint, MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us ExtTag- AttnBtn- AttnInd- PwrInd- RBE- FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop+ MaxPayload 128 bytes, MaxReadReq 512 bytes DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr+ TransPend- LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <128ns, L1 <64us ClockPM+ Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk+ ExtSynch- ClockPM+ AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- Capabilities: [100 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- AERCap: First Error Pointer: 14, GenCap- CGenEn- ChkCap- ChkEn- Capabilities: [140 v1] Device Serial Number 00-0a-e4-ff-ff-3e-ce-74 Kernel driver in use: e1000e Kernel modules: e1000e I filed a bug on this upstream, still no idea how to get more useful information. Here is a the result of the running that script EEPROM FIX UPDATE $ sudo bash fixeep-82573-dspd.sh eth0 eth0: is a "82573L Gigabit Ethernet Controller" This fixup is applicable to your hardware Your eeprom is up to date, no changes were made Do I still need to do anything? Also here is my EEPROM dump $ sudo ethtool -e eth0 Offset Values ------ ------ 0x0000 00 0a e4 3e ce 74 30 0b b2 ff 51 00 ff ff ff ff 0x0010 53 00 03 02 6b 02 7e 20 aa 17 9a 10 86 80 df 80 0x0020 00 00 00 20 54 7e 00 00 14 00 da 00 04 00 00 27 0x0030 c9 6c 50 31 3e 07 0b 04 8b 29 00 00 00 f0 02 0f 0x0040 08 10 00 00 04 0f ff 7f 01 4d ff ff ff ff ff ff 0x0050 14 00 1d 00 14 00 1d 00 af aa 1e 00 00 00 1d 00 0x0060 00 01 00 40 1f 12 07 40 ff ff ff ff ff ff ff ff 0x0070 ff ff ff ff ff ff ff ff ff ff ff ff ff ff 4a e0 I'd also like to note that I used eth0 every day for years and until recently never had an issue.

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  • What games work well on MacBook Pro (i7/GeForce GT 330M) within VMWare Fusion?

    - by webworm
    I have a 15" MacBook Pro (2.66 i7 with 8 GB RAM) with the GeForce GT 330M 512 MB graphics card. I use it primarily for development (Mac/Web/Windows) though I would like to play the occasional game with my son who uses a desktop PC system at home. I prefer to use VMWare Fusion for virtualization rather than BootCamp for a number of reasons. Heat/Fan issues with i7 under BootCamp Prefer to retain virtual machine as single file rather than dedicated partition (easier to move a nd backup) I have heard that Windows support of the GeForce GT 330 in BootCamp is not all that good. So that being said I was wondering what sort of games I would be able to play within the Fusion environment running Windows 7. I have 8 GB RAM and usually dedicate 4 GB to the virtual machine. I don't expect to be able to play the latest FPS games such as BattleField: Bad Company 2 or Call of Duty, rather I am looking at games such a Total War II, Civilizations IV, Supreme Commander, and other RTS type games. I should mention the native screen resolution of my MacBook Pro is 1680x1050, which is what I would be most likely running the VM at (fullscreen). Thank you for any advice.

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  • L'Internet en 3D arrivera d'ici 5 ans d'après Intel, est-ce le futur du web ?

    L'Internet en 3D arrivera d'ici 5 ans d'après Intel, est-ce le futur du web ? Sean Koehl travaille chez Intel en tant que "techno évangéliste". Il s'est réccemment exprimé au sujet du futur d'Internet, et il estime que le réseau "sera complètement différent d'ici 5 à 10 ans". Selon lui, notre manière d'interagir entre nous, et avec des appareils électroniques, va changer. Radicalement. Ainsi, il prédit l'émergence d'une technologie tri-dimensionnelle très réaliste dans 5 ans. Comme de plus en plus de gens autour du monde s'équipent avec des ordinateurs ou des smartphones et ont un accès à l'Internet. Sean explique qu'on commence seulement à exploiter toute cette puissance informatiq...

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  • Intel dévoile un PC avec un processeur à 48 coeurs, les fondeurs se rendent coup pour coup dans la c

    Mise à jour du 09/04/10 Intel dévoile un PC avec un processeur à 48 coeurs Les fondeurs se rendent coup pour coup dans la course au multi-coeur Après le prototype pour serveur, la mise en application en desktop. Sean Koehl, "techno évangéliste" de l'Intel Labs, vient de dévoiler un ordinateur particulièrement performant puisque celui-ci embarque un processeur à... 48 coeurs ! (lire ci-avant) Arrêtons le suspens, le grand public n'est pas visé (en tout cas pas tout de suite). Les premiers exemplaires de ces machines seront livrés vers mi-2010 à des institutions spécialisées dans la recherche. Sean Koehl note né...

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  • How Do You Calculate Processor Speed on Multi-core Processors?

    - by Jason Fitzpatrick
    The advent of economical consumer grade multi-core processors raises the question for many users: how do you effectively calculate the real speed of a multi-core system? Is a 4-core 3Ghz system really 12Ghz? Read on as we investigate. Today’s Question & Answer session comes to us courtesy of SuperUser—a subdivision of Stack Exchange, a community-drive grouping of Q&A web sites. 6 Start Menu Replacements for Windows 8 What Is the Purpose of the “Do Not Cover This Hole” Hole on Hard Drives? How To Log Into The Desktop, Add a Start Menu, and Disable Hot Corners in Windows 8

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  • runt integrated intel graphics card + nvidia pcie graphics card?

    - by Roberto
    Its days I am searching for information/help. Is this possible at all? I am running Ubuntu 11.10 on an intel core i3 530 on a intel dh55hc mainboard. I have 2 monitors attached, one on dvi and one on hdmi. I want to ad a third or eaven a fourth monitor using an additional graphics card nvidia in pcie slot. I cant get an image on all monitors at the same time. I am wondering if this is possible at all? Any ideas where I can get information about this? Thanks in advance Roberto

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  • Windows 8 ne serait pas encore finalisé pour le patron d'Intel, qui estime que des améliorations sont encore nécessaires

    Windows 8 ne serait pas encore finalisé pour le patron d'Intel qui estime que des améliorations sont encore nécessaires Microsoft va officiellement lancer Windows 8 le 26 octobre avec une nouvelle génération de tablettes et PC fonctionnant sous le système d'exploitation. Mais, il semblerait que l'OS ne soit pas encore totalement finalisé. C'est en tout cas ce que pense Paul Otellini, le PDG d'Intel, selon un article Bloomberg. Le patron du constructeur de microprocesseurs qui est le partenaire le plus proche de Microsoft aurait déclaré lors d'une réunion privée avec son équipe de Taïwan que Windows 8 va être lancé avant d'être finalisé. D'un point de vu comm...

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  • AMD : des puces à trois et quatre coeurs pour PC portables et une baisse des prix pour contrer Intel

    Mise à jour du 12/05/10 AMD : des puces à trois et quatre coeurs pour portables Et une baisse des prix pour contrer Intel AMD vient de dévoiler des puces triple-coeurs et quadri-coeurs spécialement destinés au marché des Notebooks. Ces puces Phenom II tourneront à une vitesse allant entre 1.6GHz et 2.3GHz. Elles visent bien évidemment à essayer de contrer la concurrence de plus en plus virulente d'Intel qui devrait, de son coté, lancer une gamme de puces entre ses Atoms (pour Netbooks) et ses Core i5/i3 (pour desktop) spécialement conçues pour ce marché des portables hybrides. Rappelons que les Notebooks ...

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  • Which drivers do I need for Ethernet and CAN bus on Intel Tolapai?

    - by Hanno Fietz
    I've installed 10.04 Server on an embedded machine (NISE 110 by Nexcom) and the builtin Ethernet and CAN-bus controllers don't work out of the box. The controller seems to be an Intel EP80579 chipset for both, according to lspci. I tried Intel's product website, where they seem to have FreeBSD drivers only. There's also drivers for RedHat, but I'm struggling with the manual build required to get them to work. Googling so far didn't get me anywhere. Which drivers do I need, and where do I get them?

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  • Les premières puces Sandy Bridge corrigées ont été livrées, la rapidité d'Intel rassure les constructeurs de cartes mère

    Les premières puces Sandy Bridge corrigées ont été livrées, la rapidité d'Intel rassure les constructeurs de cartes mère Mise à jour du 21.02.2011 par Katleen Intel semble avoir tenu ses engagements, à savoir livrer ses nouveau chipset (en remplacement des défectueux) à la fin février. Le second mois de l'année touche à sa fin et les premières puces de ce type viendraient d'être livrées. Le constructeur MSI a en effet déclaré en avoir reçu la première fournée, et s'atteler dès à présente à la réparation et au remplacement des cartes mères défectueuses concernées par le rappel. Les composants ainsi mis à jour porteront une étiquette indiquant "MSI B3 Stepping Ready...

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  • Intel dément trouver Windows 8 pas assez finalisé, l'OS serait même l'une des meilleures choses qui soient arrivées à la société

    Windows 8 ne serait pas encore finalisé pour le patron d'Intel qui estime que des améliorations sont encore nécessaires Microsoft va officiellement lancer Windows 8 le 26 octobre avec une nouvelle génération de tablettes et PC fonctionnant sous le système d'exploitation. Mais, il semblerait que l'OS ne soit pas encore totalement finalisé. C'est en tout cas ce que pense Paul Otellini, le PDG d'Intel, selon un article Bloomberg. Le patron du constructeur de microprocesseurs qui est le partenaire le plus proche de Microsoft aurait déclaré lors d'une réunion privée avec son équipe de Taïwan que Windows 8 va être lancé avant d'être finalisé. D'un point de vu comm...

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  • "Meilleur premier trimestre de tous les temps" pour Intel, AMD dans le vert : retour de la croissan

    Mise à jour du 26/01/10 "Meilleur premier trimestre de tous les temps" pour Intel AMD repasse dans le vert dans un contexte favorable : des résultats qui annoncent le fin de la crise ou simple trompe-l'oeil ? Intel vient d'annoncer un résultat trimestriel record, "le meilleur premier trimestre de tous les temps" (en vo : "best first quarter ever") pour la société. Avec un bénéfice net de 2,4 milliards pour un chiffre d'affaires de plus de 10 milliards, le résultat de ce premier trimestre est en progression de plus de 280 % par rapport à la même période de 2009. Les lancements des modèles Co...

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  • Intel annonce une puce pour serveurs composée de 32 coeurs, faisant partie de sa future gamme de pro

    Mise à jour du 02.06.2010 par Katleen Intel annonce une puce pour serveurs composée de 32 coeurs, faisant partie de sa future gamme de produits Knights Intel vient d'annoncer une puce pour serveurs composée de 32 coeurs, cadencés à 1.2 GHz, élaborée sur une architecture mêlant des coeurs x86 ainsi que d'autres spécialisés pour répondre aux besoins spécifiques des serveurs à haute performance. Répondant au nom de Knights Ferry, ce processeur est "le plus rapide pouvant traiter plus de 500 Gigaflops de données", d'après son constructeur. Il marque les premiers pas d'une gamme destinée aux serveurs (Knights), qui repose sur une architecture MIC (Many Integrated Cores). Les proce...

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  • Windows Phone 8, Windows 8 : un seul et même Core, l'OS mobile de Microsoft s'ouvre au C/C++ et à Direct X

    Windows Phone 8, Windows 8 : un seul et même Core L' OS mobile de Microsoft s'ouvre au C/C++ et à Direct X Microsoft a officiellement parlé pour la première fois hier soir de la Plateform Preview du prochain Windows Phone 8. Avec une surprise qui n'en était presque plus une : l'OS et Windows 8 s'appuieront sur un même « Shared Windows Core ». Par « Core », Joe Belfiore ? responsable de la plateforme de Windows Phone - a précisé sur la scène du Windows Phone Summit de San Francisco que ce rapprochement concenrnait le Kernel, les drivers, la sécurité, le Networking, le système de fichiers ou la gestion des médias. Sans oublier, bien sûr, les outils de développem...

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  • Les premiers smartphones dual-core présentés au CES hier, à quoi servira une telle puissance ?

    Les premiers smartphones dual-core présentés au CES hier, à quoi servira une telle puissance ? Mise à jour du 06.01.2011 par Katleen Début décembre 2010, Nvidia affirmait que "les processeurs dual-core seront le standard en 2011" pour les smartphones et pour les tablettes. Cette prédiction semble être sur le chemin de la réalisation, comme l'ont démontré certains acteurs du secteur hier au CES. En effet, les premiers modèles de téléphones mobiles multi-coeurs y ont été présentés. Motorola a dévoilé son Atrix 4G qu'il vante comme «le smartphone le plus puissant du monde». Dans ses entrailles, on trouve un processeur dual-core Tegra 2 cadencé à 2 Ghz et 1 Go de RAM. De quoi réaliser de ...

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  • Boost binding a function taking a reference

    - by Jamie Cook
    Hi all, I am having problems compiling the following snippet int temp; vector<int> origins; vector<string> originTokens = OTUtils::tokenize(buffer, ","); // buffer is a char[] array // original loop BOOST_FOREACH(string s, originTokens) { from_string(temp, s); origins.push_back(temp); } // I'd like to use this to replace the above loop std::transform(originTokens.begin(), originTokens.end(), origins.begin(), boost::bind<int>(&FromString<int>, boost::ref(temp), _1)); where the function in question is // the third parameter should be one of std::hex, std::dec or std::oct template <class T> bool FromString(T& t, const std::string& s, std::ios_base& (*f)(std::ios_base&) = std::dec) { std::istringstream iss(s); return !(iss >> f >> t).fail(); } the error I get is 1>Compiling with Intel(R) C++ 11.0.074 [IA-32]... (Intel C++ Environment) 1>C:\projects\svn\bdk\Source\deps\boost_1_42_0\boost/bind/bind.hpp(303): internal error: assertion failed: copy_default_arg_expr: rout NULL, no error (shared/edgcpfe/il.c, line 13919) 1> 1> return unwrapper<F>::unwrap(f, 0)(a[base_type::a1_], a[base_type::a2_]); 1> ^ 1> 1>icl: error #10298: problem during post processing of parallel object compilation Google is being unusually unhelpful so I hope that some one here can provide some insights.

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  • Flushing writes in buffer of Memory Controller to DDR device

    - by Rohit
    At some point in my code, I need to push the writes in my code all the way to the DIMM or DDR device. My requirement is to ensure the write reaches the row,ban,column of the DDR device on the DIMM. I need to read what I've written to the main memory. I do not want caching to get me the value. Instead after writing I want to fetch this value from main memory(DIMM's). So far I've been using Intel's x86 instruction wbinvd(write back and invalidate cache). However this means the caches and TLB are flushed. Write-back requests go to the main memory. However, there is a reasonable amount of time this data might reside in the write buffer of the Memory Controller( Intel calls it integrated memory controller or IMC). The Memory Controller might take some more time depending on the algorithm that runs in the Memory Controller to handle writes. Is there a way I force all existing or pending writes in the write buffer of the memory controller to the DRAM devices ?? What I am looking for is something more direct and more low-level than wbinvd. If you could point me to right documents or specs that describe this I would be grateful. Generally, the IMC has a several registers which can be written or read from. From looking at the specs for that for the chipset I could not find anything useful. Thanks for taking the time to read this.

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  • Could not load file or assembly FSharp.Core, Version=4.0.0.0

    - by Ken
    I'm trying to deploy a web application which uses F# 4.0 on Windows Server 2008. It works on my computer where VS2010 is installed but it doesn't work on the server. Everytime you open the page you'll get this error message: Could not load file or assembly 'FSharp.Core, Version=4.0.0.0, Culture=neutral, PublicKeyToken=b03f5f7f11d50a3a' or one of its dependencies. The system cannot find the file specified. I've installed .NET 4 using the web platform installer. F# PowerPack is installed too. I found this page: http://connect.microsoft.com/VisualStudio/feedback/details/507202/error-in-working-with-f It suggests you to reinstall F#, but the link to download F# seems to be broken. And it might not be the same problem I have. I've also tried to install Microsoft F# 2.0.0.0 since it's the only F# redistribution I could find. But it doesn't help at all. Has anyone get something like this to work? Any help would be appreciated. Thanks.

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  • StackOverflow in compojure web project

    - by Anders Rune Jensen
    Hi I've been playing around with clojure and have been using it to build a simple little audio player. The strange thing is that sometimes, maybe one out of twenty, when contact the server I will get the following error: 2010-04-20 15:33:20.963::WARN: Error for /control java.lang.StackOverflowError at clojure.lang.RT.seq(RT.java:440) at clojure.core$seq__4245.invoke(core.clj:105) at clojure.core$filter__5084$fn__5086.invoke(core.clj:1794) at clojure.lang.LazySeq.sval(LazySeq.java:42) at clojure.lang.LazySeq.seq(LazySeq.java:56) at clojure.lang.RT.seq(RT.java:440) at clojure.core$seq__4245.invoke(core.clj:105) at clojure.core$filter__5084$fn__5086.invoke(core.clj:1794) at clojure.lang.LazySeq.sval(LazySeq.java:42) at clojure.lang.LazySeq.seq(LazySeq.java:56) at clojure.lang.RT.seq(RT.java:440) at clojure.core$seq__4245.invoke(core.clj:105) at clojure.core$filter__5084$fn__5086.invoke(core.clj:1794) at clojure.lang.LazySeq.sval(LazySeq.java:42) at clojure.lang.LazySeq.seq(LazySeq.java:56) at clojure.lang.RT.seq(RT.java:440) at clojure.core$seq__4245.invoke(core.clj:105) at clojure.core$filter__5084$fn__5086.invoke(core.clj:1794) at clojure.lang.LazySeq.sval(LazySeq.java:42) at clojure.lang.LazySeq.seq(LazySeq.java:56) at clojure.lang.RT.seq(RT.java:440) ... If I do it right after again it always works. So it appears to be related to timing or something. The code in question is: (defn add-track [t] (common/ref-add tracks t)) (defn add-collection [coll] (doseq [track coll] (add-track track))) and (defn ref-add [ref value] (dosync (ref-set ref (conj @ref value)))) where coll is extracted from this function: (defn tracks-by-album [album] (sort sort-tracks (filter #(= (:album %) album) @tracks))) so it does appear to be the tracks-by-album function from the stack trace. I just don't see why it sometimes works and sometimes doesn't.

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  • Core Graphics Rotating a Path

    - by Scott Langendyk
    This should be a simple one, basically I have a few paths drawn with core graphics, and I want to be able to rotate them (for convenience). I've tried using CGContextRotateCTM(context); but it's not rotating anything. Am I missing something? Here's the source for drawRect - (void)drawRect:(CGRect)rect { CGContextRef context = UIGraphicsGetCurrentContext(); CGContextSetLineWidth(context, 1.5); CGContextSetStrokeColorWithColor(context, [UIColor whiteColor].CGColor); CGContextSetShadow(context, CGSizeMake(0, 1), 0); CGContextBeginPath(context); CGContextMoveToPoint(context, 13.5, 13.5); CGContextAddLineToPoint(context, 30.5, 13.5); CGContextAddLineToPoint(context, 30.5, 30.5); CGContextAddLineToPoint(context, 13.5, 30.5); CGContextAddLineToPoint(context, 13.5, 13.5); CGContextClosePath(context); CGContextMoveToPoint(context, 26.2, 13.5); CGContextAddLineToPoint(context, 26.2, 17.8); CGContextAddLineToPoint(context, 30.5, 17.8); CGContextMoveToPoint(context, 17.8, 13.5); CGContextAddLineToPoint(context, 17.8, 17.8); CGContextAddLineToPoint(context, 13.5, 17.8); CGContextMoveToPoint(context, 13.5, 26.2); CGContextAddLineToPoint(context, 17.8, 26.2); CGContextAddLineToPoint(context, 17.8, 30.5); CGContextStrokePath(context); CGContextSetFillColorWithColor(context, [UIColor whiteColor].CGColor); CGContextSetShadowWithColor(context, CGSizeMake(0, 0), 0, [UIColor clearColor].CGColor); CGContextFillRect(context, CGRectMake(26.2, 13.5, 4.3, 4.3)); CGContextFillRect(context, CGRectMake(13.5, 13.5, 4.3, 4.3)); CGContextFillRect(context, CGRectMake(13.5, 26.2, 4.3, 4.3)); CGContextRotateCTM(context, M_PI / 4); }

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  • Qt 5.3 OpenGL - vertex buffer object drawing using the core profile

    - by user3700881
    Im using Qt 5.3 to create a QWindow to do some basic rendering stuff. The QWindow is declared like this: class OpenGLWindow : public QWindow, protected QOpenGLFunctions_3_3_Core { Q_OBJECT ... } It is initialized in the constructor: OpenGLWindow::OpenGLWindow(QWindow *parent) : QWindow(parent) { QSurfaceFormat format; format.setVersion(3,3); format.setProfile(QSurfaceFormat::CoreProfile); this->setSurfaceType(OpenGLSurface); this->setFormat(format); this->create(); _context = new QOpenGLContext; _context->setFormat(format); _context->create(); _context->makeCurrent(this); this->initializeOpenGLFunctions(); ... } And that's the rendering code: void OpenGLWindow::render() { if(!isExposed()) return; _context->makeCurrent(this); glClear(GL_COLOR_BUFFER_BIT); glUseProgram(_shaderProgram); glBindBuffer(GL_ARRAY_BUFFER, _positionBufferObject); glEnableVertexAttribArray(0); glVertexAttribPointer(0, 4, GL_FLOAT, GL_FALSE, 0, 0); glDrawArrays(GL_TRIANGLES, 0, 3); glDisableVertexAttribArray(0); glUseProgram(0); _context->swapBuffers(this); } I am trying to draw a simple triangle using a vertex and fragment shader. The problem is that the triangle is not showing up when the core profile is set. Only when I set the OpenGL version to 2.0 or when I use the compatibility profile, it shows up. From my point of view that doesn't make any sense because I am not using fixed functionality at all. What am I missing?

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  • Beyond core java

    - by Paul
    Coming to the end of the first year of my CS degree, we've done some Java but just the core stuff; manipulating strings and arrays, inheritance, implementing logic etc. I visit this website daily and I see so much stuff that is beyond me; using frameworks; managing databases etc. It makes me feel like I've just learned the syntax of Java, and there is so much more to do with it. My question is though, how do I get there? I don't think I'm advanced enough to join an open source project, which seems to be suggested often (though I'd love to) and I've looked at other similar questions on here (like this one) but even then I don't think that'd work for me.. firstly, could somebody try give me some commonly used frameworks etc and how and what they are used for? Where would be a good place to start? How did you get started in using the things you do? Or perhaps you think I'm going down the wrong route. Should I learn another language, and just wait until the moment occurs where it's clear what I should be doing? I'm only in the first year of my degree, so far we've lightly covered Haskell and Java, and I've done a little HTML and CSS in my free time. I know that next year we cover python, so perhaps I should just wait till then and see if I prefer that? I feel like I also risk learning something in depth and then never using it... I suppose I'm also asking for personal experiences; was there a point where you felt you'd exceeded the basic grasp of a language (does not necessarily have to be Java related) and reach a more "advanced" level? I guess I'll put subjective tag on this, but really I just want to know how to get beyond the basic understanding of a language.

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  • Core Data confusion: fetch without tableview.

    - by Mr. McPepperNuts
    I have completed and reproduced Core Data tutorials using a tableview to display contents. However, I want to access an Entity through a fetch on a view without a tableview. I used the following fetch code, but the count returned is always 0. The data exists when the database is opened using SQLite tools. NSManagedObject *entryObj; XYZDelegate *appDelegate = [[UIApplication sharedApplication] delegate]; NSManagedObjectContext *managedObjectContext = appDelegate.managedObjectContext; NSFetchRequest *request = [[NSFetchRequest alloc] init]; NSEntityDescription *entity = [NSEntityDescription entityForName:@"Quote" inManagedObjectContext:managedObjectContext]; NSSortDescriptor *sortDescriptor = [[NSSortDescriptor alloc] initWithKey:@"id" ascending:YES]; NSArray *sortDescriptors = [[NSArray alloc] initWithObjects:sortDescriptor, nil]; [request setSortDescriptors:sortDescriptors]; [request setEntity: entity]; NSArray *results = [managedObjectContext executeFetchRequest:request error:nil]; if (results == nil) { NSLog(@"No results found"); entryObj = nil; }else { NSLog(@"results %d", [results count]); } [request release]; [sortDescriptors release]; count returned is always 0; it should be 5. Can anyone point me to a reference or tutorial regarding creating a controller not to be used with a tableview.

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