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• Making shared library from exist o-files

  - by Ockonal

  Hi guys, I have a project. I need in shared library of it to use in extensions. I don't want to make copy of this project but with shared-library settings. Are there any way to build it using *.o-files from building project? As I understand, I can write makefile for this.

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• Overinclusion of libraries C++

  - by wyatt

  I'm reading about how to put a makefile together, but no-one seems to mention what to do if your files require different sets of libraries, they all seem to use the same set of libraries for each file. Since it seems unlikely that every single file has the same libraries, I take it the list they use must amalgamate all of the libraries required across the project. I just wanted to know if there's any downside to including too many libraries, or if the compiler works out which ones are needed and ignores the rest? Thanks

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• Code Composer 4 (Eclipse based)- makefiles

  - by michael

  How do I prevent Code Composer 4 (which is based on Eclipse) from generating its own makefile and use the one I provide instead? Background: I am starting a FreeRTOS project on a MSP430F5436 using Code Composer 4 and have a demo app with a supplied make file) Thanks!

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• A good (i.e. easy but also 'cookbook' like) tutorial on using make (linux build tool)

  - by morpheous

  I am from a windows background (VC++), and moved to Linux (Ubuntu) about a year ago. I would like to be able to write simple make files to build the following types of binaries: A shared library An executable that links into third party libraries (static and shared libraries) Create an install section in my makefile (which can then be used my checkinstall)

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• Is it inefficient to have symbolic links to symbolic links?

  - by Ogre Psalm33

  We're setting up a series of Makefiles where we want to have a project-level include directory that will have symbolic links to sub-project-level include files. Many sub-project developers have chosen to have their include files also be symbolic links to yet another directory where the actual software is located. So my question is, is it inefficient to have a symbolic link to a symbolic link to another file (for, say, a C++ header that may be included dozens or more times during a compile)? Example directory tree: /project/include/ x_header1.h -> /project/src/csci_x/include/header1.h x_header2.h -> /project/src/csci_x/include/header2.h /project/src/csci_x/ include/ header1.h -> /project/src/csci_x/local_1/cxx/header1.h header2.h -> /project/src/csci_x/local_2/cxx/header2.h local_1/cxx/ module1.cpp header1.h local_2/cxx/ module2.cpp header2.h

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• How to keep asm output from Linux kernel module build

  - by fastmonkeywheels

  I'm working on a Linux kernel module for a 2.6.x kernel and I need to view the assembly output, though it's currently being done as a temporary file an deleted afterwords. I'd like to have the assembly output mixed with my C source file so I can easily trace where my problem lies. This is for an ARMv6 core and apparently objdump doesn't support this architecture. I've included my makefile below. ETREP=/xxSourceTreexx/ GNU_BIN=$(ETREP)/arm-none-linux-gnueabi/bin CROSS_COMPILE := $(GNU_BIN)/arm-none-linux-gnueabi- ARCH := arm KDIR=$(ETREP)/linux-2.6.31/ MAKE= CROSS_COMPILE=$(CROSS_COMPILE) ARCH=$(ARCH) make obj-m += xxfile1xx.o all: $(MAKE) -C $(KDIR) M=$(PWD) modules clean: $(MAKE) -C $(KDIR) M=$(PWD) clean

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• GNU make copy files to distro directory

  - by TheRoadrunner

  I keep my source html (and images etc.) in separate directories for source control. Part of making the distro is to have make copy files to output folder and set the attributes. Today my makefile shows (extract): %.html: /usr/bin/install -c -p -m 644 $< $@ www: $(HTMLDST)/firmware.html $(HTMLDST)/firmware_status.html $(HTMLDST)/index.html $(HTMLDST)/firmware.html: $(HTMLSRC)/firmware.html $(HTMLDST)/firmware_status.html: $(HTMLSRC)/firmware_status.html $(HTMLDST)/index.html: $(HTMLSRC)/index.html This is shown with only three html files, but in reality, there are lots. I would like to just list the filenames (without paths) and have make do the comparison between source and destination and copy the files that have been updated. Thank you in advance Søren

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• Testing C++ program with Testing classes over normally used classes

  - by paultop6

  Hi Guys, This will probably be a bot of a waffly question but ill try my best. I have a simple c++ program that i need to build testing for. I have 2 Classes i use besides the one i actually am using, these are called WebServer and BusinessLogicLayer. To test my own code i have made my own versions of these classes that feed dummy data to my class to test it functionality. I need to know a way of somehow, via a makefile for instance, how to tell the source code to use the test classes over the normally used classes. The test classes are in a different "tester" c++ file, and the tester c++ file also has its own header file. Regards Paul P.S. This is probably a badly worded question, but i dont know any better way to put my question.

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• How to rebuild openssh 5.2p1 after changing configure.ac

  - by Arthur Ulfeldt

  I needed to add AM_PATH_CHECK to configure.am I then try to run the usual sequence of autotools commands to rebuild all the makefiles and whatnot: aclocal automake -ac autoheader autoreconf ./configure make and here my lack of understanding of autotools showes up because this release of openssh has no Makefile.am??? now what do I do? if i try to ignore this and build anyway configure dies with this lovely error: checking whether OpenSSL's PRNG is internally seeded... yes ./configure: line 18275: syntax error near unexpected token `PROG_LS,' ./configure: line 18275: `OSSH_PATH_ENTROPY_PROG(PROG_LS, ls)' caused by this line in configure.ac: OSSH_PATH_ENTROPY_PROG(PROG_LS, ls) Is this actually caused by my changes to configure.ac? what can I do to regenerate the required files to allow configure to work? if i take my changes out and dont run aclocal then it works???

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• How to compile runnable jar from packages?

  - by sacamano

  Hey. My java application has got a package structure similar to this; src/com/name/app , src/com/name/app/do , src/com/name/utils/db and so on. How would I go about compiling java files in these directories in to a runnable jar? I need to package required libraries into the generated JAR (jdbc). I've always done these things in Eclipse but now I need to supply a couple of people with a way to compile the repository without the use of eclipse and I was thinking of making a makefile or a script that invokes the necessary javac pattern. Any help is greatly appreciated.

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• Generate all project dependencies in a single file using gcc -MM flag

  - by Jabez

  Hi all, I want to generate a single dependency file which consists of all the dependencies of source files using gcc -M flags through Makefile. I googled for this solution but, all the solutions mentioned are for generating multiple deps files for multiple objects. DEPS = make.dep $(OBJS): $(SOURCES) @$(CC) -MM $(SOURCEs) > $(DEPS) @mv -f $(DEPS) $(DEPS).tmp @sed -e 's|.$@:|$@:|' < $(DEPS).tmp > $(DEPS) @sed -e 's/.*://' -e 's/\\$$//' < $(DEPS).tmp | fmt -1 | \ sed -e 's/^ *//' -e 's/$$/:/' >> $(DEPS) @rm -f $(DEPS).tmp But it is not working properly. Please tell me where i'm making the mistake.

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• How good is my method of embedding version numbers into my application using Mercurial hooks?

  - by ArtB

  This is not quite a specifc question, and more me like for a criticism of my current approach. I would like to include the program version number in the program I am developing. This is not a commercial product, but a research application so it is important to know which version generated the results. My method works as follows: There is a "pre-commit" hook in my .hg/hgrc file link to .hg/version_gen.sh version_gen.sh consists solely of: hg parent --template "r{rev}_{date|shortdate}" > version.num In the makefile, the line version="%__VERSION__% in the main script is replaced with the content of the version.num file. Are there better ways of doing this? The only real short coming I can see is that if you only commit a specfic file, version.num will be updated, but it won't be commited, and if I tried to add always committing that file, that would result in an infite loop (unless I created some temp file to indicate I was already in a commit, but that seems ugly...).

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• printing long compilation lines with MS NMAKE

  - by Elazar Leibovich

  I have a legacy MS NMAKE Makefile I need to fix a few bugs in. There are some very long command lines I wish to debug that are being executed using the NMAKE trick of "inline files": dep: cmd @<<tmpfilename cmd_args.. << When changing the line to dep: echo cmd @<<tmpfilename cmd_args.. << NMAKE complains that the line is too long. Is there any other trick I can apply in order to view the command line NMAKE is actually executing?

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• make: invoke command for multiple targets of multiple files?

  - by marvin2k

  Hi, I looking to optimize an existing Makefile. It's used to create multiple plots (using Octave) for every logfile in a given directory using an scriptfile for every plot which takes a logfilename as an argument. In the Moment, I use one single rule for every kind of plot available, with a handwritten call to Octave, giving the specific scriptfile/logfile as an argument. It would be nice, if every plot has "his" octave-script as a dependency (plus the logfile, of course), so only one plot is regenerated if his script is changed. Since I don't want to type that much, I wonder how I can simplifiy this by using only one general rule to build "a" plot? To make it clearer: Logfile: "$(LOGNAME).log" Scriptfile: "plot$(PLOTNAME).m" creates "$(LOGNAME)_$(PLOTNAME).png" The first thing I had in mind: %1_%2.png: %1.log $(OCTAVE) --eval "plot$<2('$<1')" But this seems not to be allowed. Could someone give me a hint?

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• linking against a static library

  - by ant2009

  Hello gcc Version: 4:4.4.4-1ubuntu2 GNU Make 3.81 I have the following library called net_api.a and some header files i.e. network_set.h I have include the header file in my source code in my main.c file #include <network_set.h> I have the following static library and header in the following directory ./tools/net/lib/net_api.a ./tools/net/inc/network_set.h In my Makefile I have tried to link using the following, code snippet: INC_PATH = -I tools/net/inc LIB_PATH = -L tools/net/lib LIBS = -lnet_api $(TARGET): $(OBJECT_FILES) $(CC) $(LDFLAGS) $(CFLAGS) $(INC_PATH) $(LIB_PATH) $(LIBS) $(OBJECT_FILES) -o $(TARGET) main.o: main.c $(CC) $(CFLAGS) $(INC_PATH) $(LIB_PATH) -c main.c However, when I compile I get the following errors: network_set.h error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘network_String’ Many thanks for any suggestions,

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• How to generate Makefiles with Cmake to create tarballs of project?

  - by Rizo

  I like to keep my Makefiles flexible and multifunctional. One of the tasks I usually add to make command is tar, for example the following instruction does the job: tar: tar -cvf $(PROGNAME).tar $(SRCS) Makefile My question is: How can CMake be used to generate personalized commands like tar? I would like to see some code samples. For the full functionality it would be useful to create project's components and be able to use them as parameters. (Exempli gratia: archive only header files or some specific library). Thanks in advance for your answers!

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• Make multiple targets in 'all'

  - by Hiett

  i'm trying to build a debug and release version of a library with a Makefile and copy those libraries to the relevant build directories, e.g. .PHONY: all clean distclean all: $(program_NAME_DEBUG) $(CP) $(program_NAME_DEBUG) $(BUILD_DIR)/debug/$(program_NAME_DEBUG) $(RM) $(program_NAME_DEBUG) $(RM) $(program_OBJS) $(program_NAME_RELEASE) $(CP) $(program_NAME_RELEASE) $(BUILD_DIR)/release/$(program_NAME_RELEASE) $(RM) $(program_NAME_RELEASE) $(RM) $(program_OBJS) $(program_NAME_DEBUG): $(program_OBJS) $(LINK_DEBUG.c) -shared -Wl,-soname,$(program_NAME_DEBUG) $(program_OBJS) -o $(program_NAME_DEBUG) $(program_NAME_RELEASE): $(program_OBJS) $(LINK_RELEASE.c) -shared -Wl,-soname,$(program_NAME_RELEASE) $(program_OBJS) -o $(program_NAME_RELEASE) The 1st target in all (program_NAME_DEBUG) compiles OK but the 2nd, (program_NAME_RELEASE) produces the following error: libGlamdring_rel.so make: libGlamdring_rel.so: Command not found make: *** [all] Error 127 libGlamdring_rel.so is the value of program_NAME_RELEASE It doesn't seem to be recognising the 2nd target as it does the 1st?

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• Build multiple executables with small changes in objects

  - by Morgoth

  Consider the following Makefile COMP = compiler OBJECTS = file1 \ file2 \ file3 \ file4 \ file5_suffix \ file6 \ file7 \ file8 \ file9_suffix \ file10 all: $(OBJECTS) $(COMP) $(OBJECTS) -o bin/executable_suffix Is there an easy way to compile multiple executables for different values of suffix? For example, the equivalent of COMP = compiler OBJECTS1 = file1 \ file2 \ file3 \ file4 \ file5_s1 \ file6 \ file7 \ file8 \ file9_s1 \ file10 OBJECTS2 = file1 \ file2 \ file3 \ file4 \ file5_s2 \ file6 \ file7 \ file8 \ file9_s2 \ file10 all: $(OBJECTS1) $(OBJECTS2) $(COMP) $(OBJECTS1) -o bin/executable_s1 $(COMP) $(OBJECTS2) -o bin/executable_s2 but without redefining the whole list of objects? In the real life case I am dealing with, there might be 50+ objects and a dozen binaries to build, with only small changes between the object list each time, so it would be nice not to have to list all the objects each time.

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• compiling QGIS Plugin using make

  - by user1675014

  On a fresh mac os x 10.8 install, i've Quantum GIS Installed from Kingchaos binaries and running fine. I'm trying to develop a plugin for QGIS, and using Plugin Builder. The skel that Plugin Builder, produces, should work off-the-shelf, but it does not compile using the makefile. Somewhere python can't find (pyuic.py), and it searches for (/Users/kyngchaos/...), path. This user does not exist on my system:( Here are my ENVS on .profile: export PATH=/Library/Frameworks/GDAL.framework/Programs:$PATH export PYTHONPATH=/Applications/QGIS.app/Contents/Resources/python export DYLD_LIBRARY_PATH="/Applications/QGIS.app/Contents/MacOS/lib:/Applications/Qgis.app/Contents/Frameworks" export PATH="/Applications/QGIS.app/Contents/MacOS/bin:$PATH" Here is the ouptput of make: Arthur@teste:make pyuic4 -o ui_teste.py ui_teste.ui /System/Library/Frameworks/Python.framework/Versions/2.7/Resources/Python.app/Contents/MacOS/Python: can't open file '/Users/kyngchaos/Applications/qgis-python27/Applications/QGIS.app/Contents/MacOS/../Resources/python/PyQt4/uic/pyuic.py': [Errno 2] No such file or directory make: *** [ui_teste.py] Error 2 thanks for reading.

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• Commands implicitly threaded in Makefiles ?

  - by apple92

  Hi, I have a "super" makefile which launches two "sub" make file: libwebcam: @echo -e "\nInvoking libwebcam make." $(MAKE) -C $(TOPDIR)/libwebcam uvcdynctrl: @echo -e "\nInvoking uvcdynctrl make." $(MAKE) -C $(TOPDIR)/uvcdynctrl uvcdynctrl uses libwebcam... I noticed that those two builds are launched as separate threads by make ! Thus sometimes the lib is not available when uvcdynctrl starts being built, and I get errors. By default, make should not launch commands as threads since this is available only through -j (number of jobs) and, according to the make manual, there is no thread by default. I run this on an Ubuntu. Did someone face the same issue ? Apple92

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• How can CMake be used to generate Makefiles with personalized commands?

  - by Rizo

  I like to keep my Makefiles flexible and multifunctional. One of the tasks I usually add to make command is tar, for example the following instruction does the job: tar: tar -cvf $(PROGNAME).tar $(SRCS) Makefile My question is: How can CMake be used to generate personalized commands like tar? I would like to see some code samples. For the full functionality it would be useful to create project's components and be able to use them as parameters. (Exempli gratia: archive only header files or some specific library). Thanks in advance for your answers!

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• Can I expand macro JUST ONE TIME in specific target?

  - by naive231

  A = "demo" %.o:%.cpp $(CC) -c $^ $(A) -o $@ default:$(all_objs) game:A = $(shell read -p 'Enter game version: ' gv && echo $$gv) game:$(all_objs) Just a snippet makefile above. If I make game, main problem is each compilation of sources will expand $(A) and it will request user to input game version over and over. $(A) has default content "demo" only if user doesn't make game target. So, is there any way to set $(A) to be expanded && ?

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• Workaround for GNU Make 3.80 eval bug

  - by bengineerd

  I'm trying to create a generic build template for my Makefiles, kind of like they discuss in the eval documentation. I've run into a known bug with GNU Make 3.80. When $(eval) evaluates a line that is over 193 characters, Make crashes with a "Virtual Memory Exhausted" error. The code I have that causes the issue looks like this. SRC_DIR = ./src/ PROG_NAME = test define PROGRAM_template $(1)_SRC_DIR = $$(SRC_DIR)$(1)/ $(1)_SRC_FILES = $$(wildcard $$($(1)_SRC_DIR)*.c) $(1)_OBJ_FILES = $$($(1)_SRC_FILES):.c=.o) $$($(1)_OBJ_FILES) : $$($(1)_SRC_FILES) # This is the problem line endef $(eval $(call PROGRAM_template,$(PROG_NAME))) When I run this Makefile, I get gmake: *** virtual memory exhausted. Stop. The expected output is that all .c files in ./src/test/ get compiled into .o files (via an implicit rule). The problem is that $$($(1)_SRC_FILES) and $$($(1)_OBJ_FILES) are together over 193 characters long (if there are enough source files). I have tried running the make file on a directory where there is only 2 .c files, and it works fine. It's only when there are many .c files in the SRC directory that I get the error. I know that GNU Make 3.81 fixes this bug. Unfortunately I do not have the authority or ability to install the newer version on the system I'm working on. I'm stuck with 3.80. So, is there some workaround? Maybe split $$($(1)_SRC_FILES) up and declare each dependency individually within the eval?

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• Removing padding from structure in kernel module

  - by dexkid

  I am compiling a kernel module, containing a structure of size 34, using the standard command. make -C /lib/modules/$(KVERSION)/build M=$(PWD) modules The sizeof(some_structure) is coming as 36 instead of 34 i.e. the compiler is padding the structure. How do I remove this padding? Running make V=1 shows the gcc compiler options passed as make -I../inc -C /lib/modules/2.6.29.4-167.fc11.i686.PAE/build M=/home/vishal/20100426_eth_vishal/organised_eth/src modules make[1]: Entering directory `/usr/src/kernels/2.6.29.4-167.fc11.i686.PAE' test -e include/linux/autoconf.h -a -e include/config/auto.conf || ( \ echo; \ echo " ERROR: Kernel configuration is invalid."; \ echo " include/linux/autoconf.h or include/config/auto.conf are missing."; \ echo " Run 'make oldconfig && make prepare' on kernel src to fix it."; \ echo; \ /bin/false) mkdir -p /home/vishal/20100426_eth_vishal/organised_eth/src/.tmp_versions ; rm -f /home/vishal/20100426_eth_vishal/organised_eth/src/.tmp_versions/* make -f scripts/Makefile.build obj=/home/vishal/20100426_eth_vishal/organised_eth/src gcc -Wp,-MD,/home/vishal/20100426_eth_vishal/organised_eth/src/.eth_main.o.d -nostdinc -isystem /usr/lib/gcc/i586-redhat-linux/4.4.0/include -Iinclude -I/usr/src/kernels/2.6.29.4-167.fc11.i686.PAE/arch/x86/include -include include/linux/autoconf.h -D__KERNEL__ -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs -fno-strict-aliasing -fno-common -Werror-implicit-function-declaration -Os -m32 -msoft-float -mregparm=3 -freg-struct-return -mpreferred-stack-boundary=2 -march=i686 -mtune=generic -Wa,-mtune=generic32 -ffreestanding -DCONFIG_AS_CFI=1 -DCONFIG_AS_CFI_SIGNAL_FRAME=1 -pipe -Wno-sign-compare -fno-asynchronous-unwind-tables -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -Iarch/x86/include/asm/mach-generic -Iarch/x86/include/asm/mach-default -Wframe-larger-than=1024 -fno-stack-protector -fno-omit-frame-pointer -fno-optimize-sibling-calls -g -pg -Wdeclaration-after-statement -Wno-pointer-sign -fwrapv -fno-dwarf2-cfi-asm -DTX_DESCRIPTOR_IN_SYSTEM_MEMORY -DRX_DESCRIPTOR_IN_SYSTEM_MEMORY -DTX_BUFFER_IN_SYSTEM_MEMORY -DRX_BUFFER_IN_SYSTEM_MEMORY -DALTERNATE_DESCRIPTORS -DEXT_8_BYTE_DESCRIPTOR -O0 -Wall -DT_ETH_1588_051 -DALTERNATE_DESCRIPTORS -DEXT_8_BYTE_DESCRIPTOR -DNETHERNET_INTERRUPTS -DETH_IEEE1588_TESTS -DSNAPTYPSEL_TMSTRENA_TEVENTENA_TESTS -DT_ETH_1588_140_147 -DLOW_DEBUG_PRINTS -DMEDIUM_DEBUG_PRINTS -DHIGH_DEBUG_PRINTS -DMODULE -D"KBUILD_STR(s)=#s" -D"KBUILD_BASENAME=KBUILD_STR(eth_main)" -D"KBUILD_MODNAME=KBUILD_STR(conxt_eth)" -c -o /home/vishal/20100426_eth_vishal/organised_eth/src/eth_main.o /home/vishal/20100426_eth_vishal/organised_eth/src/eth_main.c

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• How would I include open source library in my iPhone application?

  - by greypoint

  I have found an existing open source library that I would like to include in my iPhone project (the unrar source code found here: http://www.rarlab.com/rar_add.htm ). I have compiled this source as a linked library on my Mac with "make lib" which creates the libunrar.so file just fine. These are the makefile settings for that target: lib: WHAT=RARDLL lib: $(OBJECTS) $(LIB_OBJ) @rm -f libunrar.so $(LINK) -shared -o libunrar.so $(LDFLAGS) $(OBJECTS) $(LIB_OBJ) Obviously I can't use this on iPhone but I imagine I should be able to compile with different options to make a static library that I can use. Do I: Compile it on the Mac with different make options then drag the resulting library (some kind of .a ?) into my xcode project? or Drag all of the source code into my xcode project and create special targets of some kind to create it? or Something else entirely different? I've been working on solving my unrar problem for a couple of weeks now and I believe using this library will give me the best results but I just don't know the final steps to make use of it. Thanks for all advice.

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