For Loops in MIPS assembly
- by John Moffitt
I'm having problems getting my processor to simulate correctly and I think I've narrowed it down to the program I'm giving it.
1. li $R1, 0
2. li $R2, 0x100
3. li $R6, 1
4. li $R8, 0
5. li $R9, 20
6. lw $R3, 0($R1)
7. lw $R4, 4($R1)
8. add $R5, $R3, $R4
9. srlv $R5, $R5, $R6
10. sw $R5, 0($R2)
11. addi $R1,…