Hi, I'd like to handle directly 64-bit words on the CUDA platform (eg. uint64_t vars). I understand, however, that addressing space, registers and the SP architecture are all 32-bit based. I actually found this to work correctly (on my CUDA cc1.1 card): __global__ void test64Kernel( uint64_t *word ) { (*word) <<= 56; } but I don't know, for example, how this affects registers usage and the operations per clock cycle count.