Makefile rule without dependency expression

Posted by Mike Dooley on Stack Overflow See other posts from Stack Overflow or by Mike Dooley
Published on 2010-04-18T11:40:48Z Indexed on 2010/04/18 11:53 UTC
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makefile

Hi folks!

I read the german article about "Make" on Wikipedia and found the following 2 lines:

.c.o:
     $(CC) $(CFLAGS) -c -o $@ $<

Why is the dependency expression left out and why does the target use a double file extension?

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Makefile rule without dependency expression - Developer IT

Makefile rule without dependency expression

makefile

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how to use pkg-config or something equivalent in makefile

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