Search Results

Search found 659 results on 27 pages for 'makefile'.

Page 1/27 | 1 2 3 4 5 6 7 8 9 10 11 12  | Next Page >

  • Exporting makefile from Eclipse CDT

    - by Alex Farber
    I have C++ project in the Ubuntu OS, Eclipse CDT. My final goal is to build the project binaries for FreeBSD OS. The first test. I create simple C++ CDT project with main.cpp file: cout << "OK" << endl; and build it. Then I open Terminal window in Release directory: alex@alex-linux:~/workspace/HelloWorld/Release$ ls HelloWorld main.d main.o makefile objects.mk sources.mk subdir.mk alex@alex-linux:~/workspace/HelloWorld/Release$ rm HelloWorld main.d main.o alex@alex-linux:~/workspace/HelloWorld/Release$ ls makefile objects.mk sources.mk subdir.mk alex@alex-linux:~/workspace/HelloWorld/Release$ make Building file: ../main.cpp Invoking: GCC C++ Compiler g++ -O3 -Wall -c -fmessage-length=0 -MMD -MP -MF"main.d" -MT"main.d" -o"main.o" "../main.cpp" Finished building: ../main.cpp Building target: HelloWorld Invoking: GCC C++ Linker g++ -o"HelloWorld" ./main.o Finished building target: HelloWorld alex@alex-linux:~/workspace/HelloWorld/Release$ ./HelloWorld OK alex@alex-linux:~/workspace/HelloWorld/Release$ So far, so good. Now I copy the whole project tree to FreeBSD and trying to build it: $ cd /home/alex/project $ ls main.cpp release $ cd release $ ls makefile objects.mk sources.mk subdir.mk $ make "makefile", line 5: Need an operator "makefile", line 10: Need an operator "makefile", line 11: Need an operator "makefile", line 12: Need an operator CDT-generated makefile doesn't work. This is makefile beginning: $ Automatically-generated file. Do not edit! -include ../makefile.init RM := rm -rf $ All of the sources participating in the build are defined here -include sources.mk -include subdir.mk -include objects.mk ... Line 5 is -include ../makefile.init. Really, there is no such file. But it works by some way on Ubuntu computer. What is the trick, how can I build this? BTW, manually written makefile works: all: g++ -O0 -g3 -Wall -c -fmessage-length=0 -MMD -MP -MF"main.d" -MT"main.d" -o"main.o" "../main.cpp" g++ -o"HelloWorld" ./main.o Note: $ in makefile is actually #, I replaced it because # creates formatting problems inside of stackoverflow pre block.

    Read the article

  • How can I build pyv8 from source on FreeBSD against the v8 port?

    - by Utkonos
    I am unable to build pyv8 from source on FreeBSD. I have installed the /usr/ports/lang/v8 port, and I'm running into the following error. It seems that pyv8 wants to build v8 itself even though v8 is already built and installed. How can I point pyv8 to the already installed location of v8? # python setup.py build Found Google v8 base on V8_HOME , update it to the latest SVN trunk at running build ==================== INFO: Installing or updating GYP... -------------------- INFO: Check out GYP from SVN ... DEBUG: make dependencies ERROR: Check out GYP from SVN failed: code=2 DEBUG: "Makefile", line 43: Missing dependency operator "Makefile", line 45: Need an operator "Makefile", line 46: Need an operator "Makefile", line 48: Need an operator "Makefile", line 50: Need an operator "Makefile", line 52: Need an operator "Makefile", line 54: Missing dependency operator "Makefile", line 56: Need an operator "Makefile", line 58: Missing dependency operator "Makefile", line 60: Need an operator "Makefile", line 62: Missing dependency operator "Makefile", line 64: Need an operator "Makefile", line 66: Missing dependency operator "Makefile", line 68: Need an operator "Makefile", line 70: Missing dependency operator "Makefile", line 72: Need an operator "Makefile", line 73: Missing dependency operator "Makefile", line 75: Need an operator "Makefile", line 77: Missing dependency operator "Makefile", line 79: Need an operator "Makefile", line 81: Missing dependency operator "Makefile", line 83: Need an operator "Makefile", line 85: Missing dependency operator "Makefile", line 87: Need an operator "Makefile", line 89: Need an operator "Makefile", line 91: Missing dependency operator "Makefile", line 93: Need an operator "Makefile", line 95: Need an operator "Makefile", line 97: Need an operator "Makefile", line 99: Missing dependency operator "Makefile", line 101: Need an operator "Makefile", line 103: Missing dependency operator "Makefile", line 105: Need an operator "Makefile", line 107: Missing dependency operator "Makefile", line 109: Need an operator "Makefile", line 111: Missing dependency operator "Makefile", line 113: Need an operator "Makefile", line 115: Missing dependency operator "Makefile", line 117: Need an operator Error expanding embedded variable. ==================== INFO: Patching the GYP scripts INFO: patch the Google v8 build/standalone.gypi file to enable RTTI and C++ Exceptions ==================== INFO: building Google v8 with GYP for x64 platform with release mode -------------------- INFO: build v8 from SVN ... DEBUG: make verifyheap=off component=shared_library visibility=on gdbjit=off liveobjectlist=off regexp=native disassembler=off objectprint=off debuggersupport=on extrachecks=off snapshot=on werror=on x64.release ERROR: build v8 from SVN failed: code=2 DEBUG: "Makefile", line 43: Missing dependency operator "Makefile", line 45: Need an operator "Makefile", line 46: Need an operator "Makefile", line 48: Need an operator "Makefile", line 50: Need an operator "Makefile", line 52: Need an operator "Makefile", line 54: Missing dependency operator "Makefile", line 56: Need an operator "Makefile", line 58: Missing dependency operator "Makefile", line 60: Need an operator "Makefile", line 62: Missing dependency operator "Makefile", line 64: Need an operator "Makefile", line 66: Missing dependency operator "Makefile", line 68: Need an operator "Makefile", line 70: Missing dependency operator "Makefile", line 72: Need an operator "Makefile", line 73: Missing dependency operator "Makefile", line 75: Need an operator "Makefile", line 77: Missing dependency operator "Makefile", line 79: Need an operator "Makefile", line 81: Missing dependency operator "Makefile", line 83: Need an operator "Makefile", line 85: Missing dependency operator "Makefile", line 87: Need an operator "Makefile", line 89: Need an operator "Makefile", line 91: Missing dependency operator "Makefile", line 93: Need an operator "Makefile", line 95: Need an operator "Makefile", line 97: Need an operator "Makefile", line 99: Missing dependency operator "Makefile", line 101: Need an operator "Makefile", line 103: Missing dependency operator "Makefile", line 105: Need an operator "Makefile", line 107: Missing dependency operator "Makefile", line 109: Need an operator "Makefile", line 111: Missing dependency operator "Makefile", line 113: Need an operator "Makefile", line 115: Missing dependency operator "Makefile", line 117: Need an operator Error expanding embedded variable. The files that are installed by the v8 port are the following (in /usr/local): bin/d8 include/v8.h include/v8-debug.h include/v8-preparser.h include/v8-profiler.h include/v8-testing.h include/v8stdint.h lib/libv8.so lib/libv8.so.1

    Read the article

  • How to add a c file to be compiled with a package

    - by Ahmed
    I want to add a file hstest.c which comes with bluez package but not by default added to the makefile to the sources that are compiled with the buid system. I read about makefiles and autotools but now I am hesitant to make changes to the makefiles. Should I modify the makefile.am and then run automake or just change the makefile.in or the makefile itself ? and how ? config script Makefile.am Makefile Makefile.in

    Read the article

  • problem finding a header with a c++ makefile

    - by Max
    Hi. I've started working with my first makefile. I'm writing a roguelike in C++ using the libtcod library, and have the following hello world program to test if my environment's up and running: #include "libtcod.hpp" int main() { TCODConsole::initRoot(80, 50, "PartyHack"); TCODConsole::root->printCenter(40, 25, TCOD_BKGND_NONE, "Hello World"); TCODConsole::flush(); TCODConsole::waitForKeypress(true); } My project directory structure looks like this: /CppPartyHack ----/libtcod-1.5.1 # this is the libtcod root folder --------/include ------------libtcod.hpp ----/PartyHack --------makefile --------partyhack.cpp # the above code (while we're here, how do I do proper indentation? Using those dashes is silly.) and here's my makefile: SRCDIR = . INCDIR = ../libtcod-1.5.1/include CFLAGS = $(FLAGS) -I$(INCDIR) -I$(SRCDIR) -Wall CC = gcc CPP = g++ .SUFFIXES: .o .h .c .hpp .cpp $(TEMP)/%.o : $(SRCDIR)/%.cpp $(CPP) $(CFLAGS) -o $@ -c $< $(TEMP)/%.o : $(SRCDIR)/%.c $(CC) $(CFLAGS) -o $@ -c $< CPP_OBJS = $(TEMP)partyhack.o all : partyhack partyhack : $(CPP_OBJS) $(CPP) $(CPP_OBJS) -o $@ -L../libtcod-1.5.1 -ltcod -ltcod++ -Wl,-rpath,. clean : \rm -f $(CPP_OBJS) partyhack I'm using Ubuntu, and my terminal gives me the following errors: max@max-desktop:~/Desktop/Development/CppPartyhack/PartyHack$ make g++ -c -o partyhack.o partyhack.cpp partyhack.cpp:1:23: error: libtcod.hpp: No such file or directory partyhack.cpp: In function ‘int main()’: partyhack.cpp:5: error: ‘TCODConsole’ has not been declared partyhack.cpp:6: error: ‘TCODConsole’ has not been declared partyhack.cpp:6: error: ‘TCOD_BKGND_NONE’ was not declared in this scope partyhack.cpp:7: error: ‘TCODConsole’ has not been declared partyhack.cpp:8: error: ‘TCODConsole’ has not been declared make: * [partyhack.o] Error 1 So obviously, the makefile can't find libtcod.hpp. I've double checked and I'm sure the relative path to libtcod.hpp in INCDIR is correct, but as I'm just starting out with makefiles, I'm uncertain what else could be wrong. My makefile is based off a template that the libtcod designers provided along with the library itself, and while I've looked at a few online makefile tutorials, the code in this makefile is a good bit more complicated than any of the examples the tutorials showed, so I'm assuming I screwed up something basic in the conversion. Thanks for any help.

    Read the article

  • Writing a Makefile.am to invoke googletest unit tests

    - by jmglov
    I am trying to add my first unit test to an existing Open Source project. Specifically, I added a new class, called audio_manager: src/audio/audio_manager.h src/audio/audio_manager.cc I created a src/test directory structure that mirrors the structure of the implementation files, and wrote my googletest unit tests: src/test/audio/audio_manager.cc Now, I am trying to set up my Makefile.am to compile and run the unit test: src/test/audio/Makefile.am I copied Makefile.am from: src/audio/Makefile.am Does anyone have a simple recipe for me, or is it to the cryptic automake documentation for me? :)

    Read the article

  • Makefile fails to install file correctly, installing HPL

    - by zarose
    I started installing HPL a while ago, and had a related question. I've been following along with this guide from Intel. I figure this warrants a whole new one. When I try to make the archive, the output seems fine until the end, where it gives an error. make[2]: Entering directory `/hpl-2.0/src/auxil/intel64' Makefile:47: Make.inc: No such file or directory make[2]: *** No rule to make target `Make.inc'. Stop. make[2]: Leaving directory `/hpl-2.0/src/auxil/intel64' make[1]: *** [build_src] Error 2 make[1]: Leaving directory `/hpl-2.0' make: *** [build] Error 2 Going to the directory /hpl-2.0/src/auxil/intel64 shows a file, "Make.inc", but it's highlighted red, and the white text blinks. Is there a way to manually make that file? What do I need to do to get the makefile to do this for me?

    Read the article

  • nmake makefile, linking objects files in a subfolder

    - by Gauthier
    My makefile defines a link command: prod_link = $(LINK) $(LINK_FLAGS) -o$(PROD_OUT) $(PROD_OBJS) where $(PROD_OBJS) is a list of object files of the form: PROD_OBJS = objfile1.obj objfile2.obj objfile3.obj ... objfileN.obj Now the makefile itself is at the root of my project directory. It gets messy to have object and listing files at the root, I'd like to put them in a subfolder. Building and outputing the obj files to a subfolder works, I'm doing it with suffixes and inference: .s.obj: $(ASSEMBLY) $(FLAGS) $*.s -o Objects\$*.obj The problem is to pass the Objects folder to the link command. I tried: prod_link = $(LINK) $(LINK_FLAGS) -o$(PROD_OUT) Objects\$(PROD_OBJS) but only the first file in the list of object files gets the folder's name. How can I pass the Objects subfolder to all files of my list $(PROD_OBJS)? EDIT I tried also PROD_OBJS = $(patsubst %.ss,Object\%.obj, $(PROD_SRC)) but got: makefile(51) : fatal error U1000: syntax error : ')' missing in macro invocation Stop. This is quite strange...

    Read the article

  • Unix makefile errors " 'ake: Fatal error: Don't know how to make (c file here)"

    - by gwenger
    I've written the below makefile: hw2p1: hw2p1_main.o hw2p1_getit.o hw2p1_parseit.o hw2p1_moveit.o hw2p1_showit.o gcc hw2p1_main.o hw2p1_getit.o hw2p1_parseit.o hw2p1_moveit.o hw2p1_showit.o hw2p1_main.o: hw2p1_main.c gcc -c hw2p1_main.c hw2p1_getit.o: hw2p1_getit.c gcc -c hw2p1_getit.c hw2p1_parseit.o: hw2p1_parseit.c gcc -c hw2p1_parseit.c hw2p1_moveit.o: hw2p1_moveit.c gcc -c hw2p1_moveit.c hw2p1_showit.o: hw2p1_showit.c gcc -c hw2p1_showit.c The first time I tried to call make, I got the error: "make: Fatal error: unexpected end of line seen" I deleted the blank lines between targets and called make again, but this time I got " 'ake: Fatal error: Don't know how to make hw2p1_main.c" I've compiled all of these files separately and then linked them so I know that the errors are a result of an incorrect makefile and not a result of errors in my c files. This is the first makefile that I've ever written so I might just be doing it completely incorrectly. Either way, any suggestions on how to get rid of these errors?

    Read the article

  • makefile compilation problem

    - by mistique
    He I have a problem with a makefile. I have three classes. They do pretty simple stuff. One does an addition on a subtraction, and the last one will instantiate the two and simply print the resulted addition and subtraction. Now when I create my makefile, I compile my Plus.java and my Minus.java but don't know how to compile the main class because it depends on the previous two. I want to compile and run it from the makefile if it's possible. I get the above results when I try to run make: javac -g Plus.class Minus.class javac: invalid flag: Plus.class Usage: javac use -help for a list of possible options make: * [Operation.class] Error 2 I don't know how to procede, please forgive me if my question is to simple but I am new working with these stuff. I've searched many sites but with no answer.

    Read the article

  • Windows equivalent to this Makefile

    - by Sridhar Ratnakumar
    The advantage of writing a Makefile is that "make" is generally assumed to be present on the various Unices (Linux and Mac primarily). Now I have the following Makefile: PYTHON := python all: e installdeps e: virtualenv --distribute --python=${PYTHON} e installdeps: e/bin/python setup.py develop clean: rm -rf e As you can see this Makefile uses simple targets and variable substitution. Can this be achieved on Windows? By that mean - without having to install external tools (like cygwin make); perhaps make.cmd? Typing "make installdeps" for instance, should work both on Unix and Windows.

    Read the article

  • Makefile to compile both C and Java programs at the same time

    - by user342745
    I have three programs that need to be compiled at the same time, 2 written in C and 1 in java. I had all three working with the Makefile when they were in C, but then switched one of them to java... is there a way to compile all 3 at once with the same makefile? Here is my current Makefile: CC=gcc JC=javac JFLAGS= -g CFLAGS= -Wall -g -std=c99 LDFLAGS= -lm .SUFFIXES: .java .class .java.class: $(JC) $(JFLAGS) $*.java CLASSES = kasiski.java kentry.java ALL= ic ftable kasiski all: $(ALL) ic: ic.o kasiski: $(CLASSES:.java=.class) ftable: ftable.o ic.o: ic.c ic.h ftable.o: ftable.c ftable.h .PHONY: clean clean: rm -rf core* *.class *.o *.gch $(ALL)

    Read the article

  • a couple of Makefile issues

    - by user1623249
    I've got this Makefile: CFLAGS = -c -Wall CC = g++ EXEC = main SOURCES = main.cpp listpath.cpp Parser.cpp OBJECTS = $(SOURCES: .cpp=.o) EXECUTABLE = tp DIR_SRC = /src/ DIR_OBJ = /obj/ all: $(SOURCES) $(OBJECTS) $(EXECUTABLE): $(OBJECTS) $(CC) $(CFLAGS) $(OBJECTS) -o $@ .cpp.o: $(CC) $(CFLAGS) $< -o $@ clean: rm $(OBJECTS) $(EXECUTABLE) Note this: I'm in the directory "." which contains the makefile The folder "./src" EXISTS, and has all the .h and .cpp files The folder "./obj" doesn't exist, I want makefile to create it and put all the .o there The error I get is: No rules to build "main.cpp", necessary for "all". Stopping. Help!

    Read the article

  • unlinked libraries in a makefile?

    - by wyatt
    I'm trying to install a libspopc, but when I run the make I get the following output: cc -Wall -Wextra -pedantic -pipe -fPIC -Os -DUSE_SSL -c session.c cc -Wall -Wextra -pedantic -pipe -fPIC -Os -DUSE_SSL -c queries.c cc -Wall -Wextra -pedantic -pipe -fPIC -Os -DUSE_SSL -c parsing.c cc -Wall -Wextra -pedantic -pipe -fPIC -Os -DUSE_SSL -c format.c cc -Wall -Wextra -pedantic -pipe -fPIC -Os -DUSE_SSL -c objects.c cc -Wall -Wextra -pedantic -pipe -fPIC -Os -DUSE_SSL -c libspopc.c rm -f libspopc*.a ar r libspopc-0.9n.a session.o queries.o parsing.o format.o objects.o libspopc.o ar: creating libspopc-0.9n.a ranlib libspopc-0.9n.a ln -s libspopc-0.9n.a libspopc.a rm -f libspopc*.so cc -o libspopc-0.9n.so -shared session.o queries.o parsing.o format.o objects.o libspopc.o ln -s libspopc-0.9n.so libspopc.so cc -o poptest1 -Wall -Wextra -pedantic -pipe -fPIC -Os -DUSE_SSL examples/poptest1.c -L. -lspopc -lssl -lcrypto /usr/local/lib/libcrypto.a(dso_dlfcn.o): In function `dlfcn_globallookup': dso_dlfcn.c:(.text+0x2d): undefined reference to `dlopen' dso_dlfcn.c:(.text+0x43): undefined reference to `dlsym' dso_dlfcn.c:(.text+0x4d): undefined reference to `dlclose' /usr/local/lib/libcrypto.a(dso_dlfcn.o): In function `dlfcn_pathbyaddr': dso_dlfcn.c:(.text+0x8f): undefined reference to `dladdr' dso_dlfcn.c:(.text+0xe9): undefined reference to `dlerror' /usr/local/lib/libcrypto.a(dso_dlfcn.o): In function `dlfcn_bind_func': dso_dlfcn.c:(.text+0x491): undefined reference to `dlsym' dso_dlfcn.c:(.text+0x570): undefined reference to `dlerror' /usr/local/lib/libcrypto.a(dso_dlfcn.o): In function `dlfcn_bind_var': dso_dlfcn.c:(.text+0x5f1): undefined reference to `dlsym' dso_dlfcn.c:(.text+0x6d0): undefined reference to `dlerror' /usr/local/lib/libcrypto.a(dso_dlfcn.o): In function `dlfcn_unload': dso_dlfcn.c:(.text+0x735): undefined reference to `dlclose' /usr/local/lib/libcrypto.a(dso_dlfcn.o): In function `dlfcn_load': dso_dlfcn.c:(.text+0x817): undefined reference to `dlopen' dso_dlfcn.c:(.text+0x88e): undefined reference to `dlclose' dso_dlfcn.c:(.text+0x8d5): undefined reference to `dlerror' collect2: ld returned 1 exit status make: *** [poptest1] Error 1 A quick search suggested that this was due to libdl being unlinked, though this seems unlikely in a distributed library, particularly a seemingly relatively popular one. Could anything else be causing this? And if it is due to an unlinked library, how would I go about fixing it? Thanks

    Read the article

  • how to use pkg-config or something equivalent in makefile

    - by make
    Hi , Could someone please tell us how to use pkg-config in Makefile. here is an exp: `pkg-config --cflags --libs protobuf` Makefile file CXX = g++ CXXFLAGS = -Wall -ansi -pedantic -g # # I tried this line, but not working PKGS = `pkg-config --cflags --libs protobuf` # ifeq ($(shell uname),SunOS) LIBS = -lsocket -lnsl endif all: file1.cpp file1: file1.cpp xx.pb.cc xx.pb.h $(CXX) $(CXXFLAGS) -o file1 file1.cpp xx.pb.cc $(LIBS) $(PKGS) clean: $(RM) file1 Thanks for your help and replies -

    Read the article

  • How to make SIMPLE C++ Makefile?

    - by befall
    Hi everyone, For a project, we are required to use a makefile to pull everything together, but our abhorrent professor never showed us how to. I only have ONE file, a3driver.cpp. The driver imports a class from a location "/user/cse232/Examples/example32.sequence.cpp". That's it, everything else is contained with the .cpp. How would I go about making a simple Makefile that creates an executable called "a3a.exe"?

    Read the article

  • makefile pathing issues on OSX

    - by Justin808
    OK, I thought I would try one last update and see if it gets me anywhere. I've created a very small test case. This should not build anything, it just tests the path settings. Also I've setup the path so there are no spaces. The is the smallest, simplest test case I could come up with. This makefile will set the path, echo the path, run avr-gcc -v with the full path specified and then try to run it without the full path specified. It should find avr-gcc in the path on the second try, but does not. makefile TOOLCHAIN := /Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain PATH := ${TOOLCHAIN}/bin:${PATH} export PATH all: @echo ${PATH} @echo -------- "${TOOLCHAIN}/bin/avr-gcc" -v @echo -------- avr-gcc -v output JUSTINs-MacBook-Air:Untitled justinzaun$ make /Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin -------- "/Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin/avr-gcc" -v Using built-in specs. COLLECT_GCC=/Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin/avr-gcc COLLECT_LTO_WRAPPER=/Users/justinzaun/Desktop/AVRBuilder.app/Contents/Resources/avrchain/bin/../libexec/gcc/avr/4.6.3/lto-wrapper Target: avr Configured with: /Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../gcc/configure --prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --exec-prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --datadir=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --target=avr --enable-languages=c,objc,c++ --disable-libssp --disable-lto --disable-nls --disable-libgomp --disable-gdbtk --disable-threads --enable-poison-system-directories Thread model: single gcc version 4.6.3 (GCC) -------- avr-gcc -v make: avr-gcc: No such file or directory make: *** [all] Error 1 JUSTINs-MacBook-Air:Untitled justinzaun$ Original Question I'm trying to set the path from within the makefile. I can't seem to do this on OSX. Setting the path with PATH := /new/bin/:$(PATH) does not work. See my makefile below. makefile PROJECTNAME = Untitled # Name of target controller # (e.g. 'at90s8515', see the available avr-gcc mmcu # options for possible values) MCU = atmega640 # id to use with programmer # default: PROGRAMMER_MCU=$(MCU) # In case the programer used, e.g avrdude, doesn't # accept the same MCU name as avr-gcc (for example # for ATmega8s, avr-gcc expects 'atmega8' and # avrdude requires 'm8') PROGRAMMER_MCU = $(MCU) # Source files # List C/C++/Assembly source files: # (list all files to compile, e.g. 'a.c b.cpp as.S'): # Use .cc, .cpp or .C suffix for C++ files, use .S # (NOT .s !!!) for assembly source code files. PRJSRC = main.c \ utils.c # additional includes (e.g. -I/path/to/mydir) INC = # libraries to link in (e.g. -lmylib) LIBS = # Optimization level, # use s (size opt), 1, 2, 3 or 0 (off) OPTLEVEL = s ### You should not have to touch anything below this line ### PATH := /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:$(PATH) CPATH := /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/include # HEXFORMAT -- format for .hex file output HEXFORMAT = ihex # compiler CFLAGS = -I. $(INC) -g -mmcu=$(MCU) -O$(OPTLEVEL) \ -fpack-struct -fshort-enums \ -funsigned-bitfields -funsigned-char \ -Wall -Wstrict-prototypes \ -Wa,-ahlms=$(firstword \ $(filter %.lst, $(<:.c=.lst))) # c++ specific flags CPPFLAGS = -fno-exceptions \ -Wa,-ahlms=$(firstword \ $(filter %.lst, $(<:.cpp=.lst)) \ $(filter %.lst, $(<:.cc=.lst)) \ $(filter %.lst, $(<:.C=.lst))) # assembler ASMFLAGS = -I. $(INC) -mmcu=$(MCU) \ -x assembler-with-cpp \ -Wa,-gstabs,-ahlms=$(firstword \ $(<:.S=.lst) $(<.s=.lst)) # linker LDFLAGS = -Wl,-Map,$(TRG).map -mmcu=$(MCU) \ -lm $(LIBS) ##### executables #### CC=avr-gcc OBJCOPY=avr-objcopy OBJDUMP=avr-objdump SIZE=avr-size AVRDUDE=avrdude REMOVE=rm -f ##### automatic target names #### TRG=$(PROJECTNAME).out DUMPTRG=$(PROJECTNAME).s HEXROMTRG=$(PROJECTNAME).hex HEXTRG=$(HEXROMTRG) $(PROJECTNAME).ee.hex # Start by splitting source files by type # C++ CPPFILES=$(filter %.cpp, $(PRJSRC)) CCFILES=$(filter %.cc, $(PRJSRC)) BIGCFILES=$(filter %.C, $(PRJSRC)) # C CFILES=$(filter %.c, $(PRJSRC)) # Assembly ASMFILES=$(filter %.S, $(PRJSRC)) # List all object files we need to create OBJDEPS=$(CFILES:.c=.o) \ $(CPPFILES:.cpp=.o) \ $(BIGCFILES:.C=.o) \ $(CCFILES:.cc=.o) \ $(ASMFILES:.S=.o) # Define all lst files. LST=$(filter %.lst, $(OBJDEPS:.o=.lst)) # All the possible generated assembly # files (.s files) GENASMFILES=$(filter %.s, $(OBJDEPS:.o=.s)) .SUFFIXES : .c .cc .cpp .C .o .out .s .S \ .hex .ee.hex .h .hh .hpp # Make targets: # all, disasm, stats, hex, writeflash/install, clean all: $(TRG) $(TRG): $(OBJDEPS) $(CC) $(LDFLAGS) -o $(TRG) $(OBJDEPS) #### Generating assembly #### # asm from C %.s: %.c $(CC) -S $(CFLAGS) $< -o $@ # asm from (hand coded) asm %.s: %.S $(CC) -S $(ASMFLAGS) $< > $@ # asm from C++ .cpp.s .cc.s .C.s : $(CC) -S $(CFLAGS) $(CPPFLAGS) $< -o $@ #### Generating object files #### # object from C .c.o: $(CC) $(CFLAGS) -c $< -o $@ # object from C++ (.cc, .cpp, .C files) .cc.o .cpp.o .C.o : $(CC) $(CFLAGS) $(CPPFLAGS) -c $< -o $@ # object from asm .S.o : $(CC) $(ASMFLAGS) -c $< -o $@ #### Generating hex files #### # hex files from elf .out.hex: $(OBJCOPY) -j .text \ -j .data \ -O $(HEXFORMAT) $< $@ .out.ee.hex: $(OBJCOPY) -j .eeprom \ --change-section-lma .eeprom=0 \ -O $(HEXFORMAT) $< $@ #### Information #### info: @echo PATH: @echo "$(PATH)" $(CC) -v which $(CC) #### Cleanup #### clean: $(REMOVE) $(TRG) $(TRG).map $(DUMPTRG) $(REMOVE) $(OBJDEPS) $(REMOVE) $(LST) $(REMOVE) $(GENASMFILES) $(REMOVE) $(HEXTRG) error JUSTINs-MacBook-Air:Untitled justinzaun$ make avr-gcc -I. -g -mmcu=atmega640 -Os -fpack-struct -fshort-enums -funsigned-bitfields -funsigned-char -Wall -Wstrict-prototypes -Wa,-ahlms=main.lst -c main.c -o main.o make: avr-gcc: No such file or directory make: *** [main.o] Error 1 JUSTINs-MacBook-Air:Untitled justinzaun$ If I change my CC= to include the full path: CC=/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin/avr-gcc then it finds it, but this doesn't seem the correct way to do things. For instance its trying to use the system as not the one in the correct path. update - Just to be sure, I'm adding the output of my ls command too so everyone knows the file exist. Also I've added a make info target to the makefile and showing that output as well. JUSTINs-MacBook-Air:Untitled justinzaun$ ls /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin ar avr-elfedit avr-man avr-strip objcopy as avr-g++ avr-nm avrdude objdump avr-addr2line avr-gcc avr-objcopy c++ ranlib avr-ar avr-gcc-4.6.3 avr-objdump g++ strip avr-as avr-gcov avr-ranlib gcc avr-c++ avr-gprof avr-readelf ld avr-c++filt avr-ld avr-size ld.bfd avr-cpp avr-ld.bfd avr-strings nm JUSTINs-MacBook-Air:Untitled justinzaun$ Output of make info with the \ in my path JUSTINs-MacBook-Air:Untitled justinzaun$ make info PATH: /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin avr-gcc -v make: avr-gcc: No such file or directory make: *** [info] Error 1 JUSTINs-MacBook-Air:Untitled justinzaun$ Output of make info with the \ not in my path JUSTINs-MacBook-Air:Untitled justinzaun$ make info PATH: /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin avr-gcc -v make: avr-gcc: No such file or directory make: *** [info] Error 1 JUSTINs-MacBook-Air:Untitled justinzaun$ update - When I have my CC set to include the full path as described above, this is the result of make info. JUSTINs-MacBook-Air:Untitled justinzaun$ make info PATH: /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin:/usr/bin:/bin:/usr/sbin:/sbin:/usr/local/bin:/usr/X11/bin /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin/avr-gcc -v Using built-in specs. COLLECT_GCC=/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin/avr-gcc COLLECT_LTO_WRAPPER=/Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin/../libexec/gcc/avr/4.6.3/lto-wrapper Target: avr Configured with: /Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../gcc/configure --prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --exec-prefix=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --datadir=/Users/justinzaun/Development/AVRBuilder/Packages/gccobj/../build/ --target=avr --enable-languages=c,objc,c++ --disable-libssp --disable-lto --disable-nls --disable-libgomp --disable-gdbtk --disable-threads --enable-poison-system-directories Thread model: single gcc version 4.6.3 (GCC) which /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR\ Builder.app/Contents/Resources/avrchain/bin/avr-gcc /Users/justinzaun/Library/Developer/Xcode/DerivedData/AVR_Builder-gxiykwiwjywvoagykxvmotvncbyd/Build/Products/Debug/AVR Builder.app/Contents/Resources/avrchain/bin/avr-gcc JUSTINs-MacBook-Air:Untitled justinzaun$

    Read the article

  • How to make this Makefile more concise?

    - by David
    I know there are ways to remove duplicates in Makefile. Can you tell me how to make the Makefile below more concise? Thanks! And is there any tool to automate it? CC=gcc CFLAGS=-pthread -g -o all: dotprod_mutex dotprod_serial dotprod_mutex: dotprod_mutex.c $(CC) $(CFLAGS) dotprod_mutex dotprod_mutex.c dotprod_serial: dotprod_serial.c $(CC) $(CFLAGS) dotprod_serial dotprod_serial.c

    Read the article

  • How to include clean target in makefile

    - by neversaint
    I have a makefile that looks like this CXX = g++ -O2 -Wall all: code1 code2 code1: code1.cc utilities.cc $(CXX) $^ -o $@ code2: code2.cc utilities.cc $(CXX) $^ -o $@ What I want to do next is to include 'clean target' so that every time I run 'make' it will automatically delete the existing binary files of code1 and code2 before creating the new ones. I tried to put these lines at the very end of the makefile, but it doesn't work clean: rm -f $@ echo Clean done What's the right way to do it?

    Read the article

  • Convert vcproject to makefile for nix?

    - by Undawned
    So I have a visual studio 2008 project setup for a project I've been working on however its a sub project of a rather larger code base which is crossplatform, so in order to make my project complaint with the main source I need to make my project nix compilable. Is there some way I can generate a makefile based off my vcproject? or if not is there someway I could generate a makefile any other way than writing it manually as it appears confusing as all hell when I open them up.

    Read the article

  • makefile internal calls to target

    - by Michael
    How can I distinguish in makefile, which targets and how(when) they are called internally? I have a makefile with number of targets which are actually variables. UPD: here is an example http://pastebin.com/inaEsGnW

    Read the article

  • ede-proj-regenerate does weird things with my Makefile

    - by Xavier Maillard
    Hi, I have created a really basic project (Make) like this: (ede-proj-project "zrm" :name "zrm" :file "Project.ede" :targets (list (ede-proj-target-makefile-program "zm" :name "zrm" :path "" :source '("zrm.c") ) ) ) When doing M-x ede-proj-regenerate RET and M-x compile RET RET (accepting make -k as my compile command), make keeps bailing with a **missing separator error. When editing my Makefile outside of Emacs (with the darn evil vi) and replacing spaces by tabs, it works. Is there anything special I should pay attention in order to have this work ? Regards

    Read the article

  • Makefile for ASP.NET Website project?

    - by jdk
    Correct me if I'm wrong - I understand a C#/.NET application's .csproj project file is effectively its makefile or build file. A Website project does not have a .csproj file (not to be mixed up with Web Application which does). In the case of a Website project, can I create a makefile equivalent, or does it use a build process/instructions stored elsewhere in the system or app?

    Read the article

  • Makefile - Dependency generation

    - by Profetylen
    I am trying to create a makefile that automatically compiles and links my .cpp files into an executable via .o files. What I can't get working is automated (or even manual) dependency generation. When i uncomment the below commented code, nothing is recompiled when i run make build. All i get is make: Nothing to be done for 'build'., even if x.h (or any .h file) has changed. I've been trying to learn from this question: Makefile, header dependencies, dmckee's answer, especially. Why isn't this makefile working? Clarification: I can compile everything, but when I modify any header file, the .cpp files that depend on it aren't updated. So, if I for instance compile my entire source, then I change a #define in the header file, and then run make build, and I get Nothing to be done for 'build'. (when I have uncommented either commented chunks of the below code). CC=gcc CFLAGS=-O2 -Wall LDFLAGS=-lSDL -lstdc++ SOURCES=$(wildcard *.cpp) OBJECTS=$(patsubst %.cpp, obj/%.o,$(SOURCES)) TARGET=bin/test.bin # Nothing happens when i uncomment the following. (automated attempt) #depend: .depend # #.depend: $(SOURCES) # rm -f ./.depend # $(CC) $(CFLAGS) -MM $^ >> ./.depend; # #include .depend # And nothing happens when i uncomment the following. x.cpp and x.h are files in my project. (manual attempt) #x.o: x.cpp x.h clean: rm -f $(TARGET) rm -f $(OBJECTS) run: build ./$(TARGET) debug: build nm $(TARGET) gdb $(TARGET) build: $(TARGET) $(TARGET): $(OBJECTS) @mkdir -p $(@D) $(CC) $(LDFLAGS) $(OBJECTS) -o $@ obj/%.o: %.cpp @mkdir -p $(@D) $(CC) -c $(CFLAGS) $< -o $@ include $(DEPENDENCIES)

    Read the article

1 2 3 4 5 6 7 8 9 10 11 12  | Next Page >