Hi, everyone. I don't want to fuel any holy-wars here, but I need to ask your opinion.
Right now I'm in process of designing a Hardware Description Language as a project in my university. I decided to take VHDL language and just add some syntax-sugar 'coz VHDL is rather obese in syntax.
I decided to use indentation to group blocks of code (like in Python), and I'm strongly criticized for that.
Originally Begin...End; grouping is used in VHDL language.
I have no clue what are cons and pros of these 3 types of grouping, the only thing I know is that I like Python style and I don't understand if it's usage could be erroneous or something?
What do you think? What do you like?
(hope that I can get some feedback from people who extensively used different languages with different code-grouping syntax, like Pasca, Ada, Delphi, C, C++, C#, Java, Python)