Build multiple executables with small changes in objects
- by Morgoth
Consider the following Makefile
COMP = compiler
OBJECTS = file1 \
file2 \
file3 \
file4 \
file5_suffix \
file6 \
file7 \
file8 \
file9_suffix \
file10
all: $(OBJECTS)
$(COMP) $(OBJECTS) -o bin/executable_suffix
Is there an easy way to compile multiple executables for different values of suffix? For example, the equivalent of
COMP = compiler
OBJECTS1 = file1 \
file2 \
file3 \
file4 \
file5_s1 \
file6 \
file7 \
file8 \
file9_s1 \
file10
OBJECTS2 = file1 \
file2 \
file3 \
file4 \
file5_s2 \
file6 \
file7 \
file8 \
file9_s2 \
file10
all: $(OBJECTS1) $(OBJECTS2)
$(COMP) $(OBJECTS1) -o bin/executable_s1
$(COMP) $(OBJECTS2) -o bin/executable_s2
but without redefining the whole list of objects? In the real life case I am dealing with, there might be 50+ objects and a dozen binaries to build, with only small changes between the object list each time, so it would be nice not to have to list all the objects each time.