Search Results

Search found 180 results on 8 pages for 'xor'.

facebook twitter digg google delicious technorati stumbleupon myspace wordpress linkedin gmail igoogle windows live tumblr viadeo yahoo buzz yahoo mail yahoo bookmarks favorites email print

Page 3/8 | < Previous Page | 1 2 3 4 5 6 7 8  | Next Page >

  • My neural network gets "stuck" while training. Is this normal?

    - by Vivin Paliath
    I'm training a XOR neural network via back-propagation using stochastic gradient descent. The weights of the neural network are initialized to random values between -0.5 and 0.5. The neural network successfully trains itself around 80% of the time. However sometimes it gets "stuck" while backpropagating. By "stuck", I mean that I start seeing a decreasing rate of error correction. For example, during a successful training, the total error decreases rather quickly as the network learns, like so: ... ... Total error for this training set: 0.0010008071327708653 Total error for this training set: 0.001000750550254843 Total error for this training set: 0.001000693973929822 Total error for this training set: 0.0010006374037948094 Total error for this training set: 0.0010005808398488103 Total error for this training set: 0.0010005242820908169 Total error for this training set: 0.0010004677305198344 Total error for this training set: 0.0010004111851348654 Total error for this training set: 0.0010003546459349181 Total error for this training set: 0.0010002981129189812 Total error for this training set: 0.0010002415860860656 Total error for this training set: 0.0010001850654351723 Total error for this training set: 0.001000128550965301 Total error for this training set: 0.0010000720426754587 Total error for this training set: 0.0010000155405646494 Total error for this training set: 9.99959044631871E-4 Testing trained XOR neural network 0 XOR 0: 0.023956746649767453 0 XOR 1: 0.9736079194769579 1 XOR 0: 0.9735670067093437 1 XOR 1: 0.045068688874314006 However when it gets stuck, the total errors are decreasing, but it seems to be at a decreasing rate: ... ... Total error for this training set: 0.12325486644721295 Total error for this training set: 0.12325486642503929 Total error for this training set: 0.12325486640286581 Total error for this training set: 0.12325486638069229 Total error for this training set: 0.12325486635851894 Total error for this training set: 0.12325486633634561 Total error for this training set: 0.1232548663141723 Total error for this training set: 0.12325486629199914 Total error for this training set: 0.12325486626982587 Total error for this training set: 0.1232548662476525 Total error for this training set: 0.12325486622547954 Total error for this training set: 0.12325486620330656 Total error for this training set: 0.12325486618113349 Total error for this training set: 0.12325486615896045 Total error for this training set: 0.12325486613678775 Total error for this training set: 0.12325486611461482 Total error for this training set: 0.1232548660924418 Total error for this training set: 0.12325486607026936 Total error for this training set: 0.12325486604809655 Total error for this training set: 0.12325486602592373 Total error for this training set: 0.12325486600375107 Total error for this training set: 0.12325486598157878 Total error for this training set: 0.12325486595940628 Total error for this training set: 0.1232548659372337 Total error for this training set: 0.12325486591506139 Total error for this training set: 0.12325486589288918 Total error for this training set: 0.12325486587071677 Total error for this training set: 0.12325486584854453 While I was reading up on neural networks I came across a discussion on local minimas and global minimas and how neural networks don't really "know" which minima its supposed to be going towards. Is my network getting stuck in a local minima instead of a global minima?

    Read the article

  • Optimizing AES modes on Solaris for Intel Westmere

    - by danx
    Optimizing AES modes on Solaris for Intel Westmere Review AES is a strong method of symmetric (secret-key) encryption. It is a U.S. FIPS-approved cryptographic algorithm (FIPS 197) that operates on 16-byte blocks. AES has been available since 2001 and is widely used. However, AES by itself has a weakness. AES encryption isn't usually used by itself because identical blocks of plaintext are always encrypted into identical blocks of ciphertext. This encryption can be easily attacked with "dictionaries" of common blocks of text and allows one to more-easily discern the content of the unknown cryptotext. This mode of encryption is called "Electronic Code Book" (ECB), because one in theory can keep a "code book" of all known cryptotext and plaintext results to cipher and decipher AES. In practice, a complete "code book" is not practical, even in electronic form, but large dictionaries of common plaintext blocks is still possible. Here's a diagram of encrypting input data using AES ECB mode: Block 1 Block 2 PlainTextInput PlainTextInput | | | | \/ \/ AESKey-->(AES Encryption) AESKey-->(AES Encryption) | | | | \/ \/ CipherTextOutput CipherTextOutput Block 1 Block 2 What's the solution to the same cleartext input producing the same ciphertext output? The solution is to further process the encrypted or decrypted text in such a way that the same text produces different output. This usually involves an Initialization Vector (IV) and XORing the decrypted or encrypted text. As an example, I'll illustrate CBC mode encryption: Block 1 Block 2 PlainTextInput PlainTextInput | | | | \/ \/ IV >----->(XOR) +------------->(XOR) +---> . . . . | | | | | | | | \/ | \/ | AESKey-->(AES Encryption) | AESKey-->(AES Encryption) | | | | | | | | | \/ | \/ | CipherTextOutput ------+ CipherTextOutput -------+ Block 1 Block 2 The steps for CBC encryption are: Start with a 16-byte Initialization Vector (IV), choosen randomly. XOR the IV with the first block of input plaintext Encrypt the result with AES using a user-provided key. The result is the first 16-bytes of output cryptotext. Use the cryptotext (instead of the IV) of the previous block to XOR with the next input block of plaintext Another mode besides CBC is Counter Mode (CTR). As with CBC mode, it also starts with a 16-byte IV. However, for subsequent blocks, the IV is just incremented by one. Also, the IV ix XORed with the AES encryption result (not the plain text input). Here's an illustration: Block 1 Block 2 PlainTextInput PlainTextInput | | | | \/ \/ AESKey-->(AES Encryption) AESKey-->(AES Encryption) | | | | \/ \/ IV >----->(XOR) IV + 1 >---->(XOR) IV + 2 ---> . . . . | | | | \/ \/ CipherTextOutput CipherTextOutput Block 1 Block 2 Optimization Which of these modes can be parallelized? ECB encryption/decryption can be parallelized because it does more than plain AES encryption and decryption, as mentioned above. CBC encryption can't be parallelized because it depends on the output of the previous block. However, CBC decryption can be parallelized because all the encrypted blocks are known at the beginning. CTR encryption and decryption can be parallelized because the input to each block is known--it's just the IV incremented by one for each subsequent block. So, in summary, for ECB, CBC, and CTR modes, encryption and decryption can be parallelized with the exception of CBC encryption. How do we parallelize encryption? By interleaving. Usually when reading and writing data there are pipeline "stalls" (idle processor cycles) that result from waiting for memory to be loaded or stored to or from CPU registers. Since the software is written to encrypt/decrypt the next data block where pipeline stalls usually occurs, we can avoid stalls and crypt with fewer cycles. This software processes 4 blocks at a time, which ensures virtually no waiting ("stalling") for reading or writing data in memory. Other Optimizations Besides interleaving, other optimizations performed are Loading the entire key schedule into the 128-bit %xmm registers. This is done once for per 4-block of data (since 4 blocks of data is processed, when present). The following is loaded: the entire "key schedule" (user input key preprocessed for encryption and decryption). This takes 11, 13, or 15 registers, for AES-128, AES-192, and AES-256, respectively The input data is loaded into another %xmm register The same register contains the output result after encrypting/decrypting Using SSSE 4 instructions (AESNI). Besides the aesenc, aesenclast, aesdec, aesdeclast, aeskeygenassist, and aesimc AESNI instructions, Intel has several other instructions that operate on the 128-bit %xmm registers. Some common instructions for encryption are: pxor exclusive or (very useful), movdqu load/store a %xmm register from/to memory, pshufb shuffle bytes for byte swapping, pclmulqdq carry-less multiply for GCM mode Combining AES encryption/decryption with CBC or CTR modes processing. Instead of loading input data twice (once for AES encryption/decryption, and again for modes (CTR or CBC, for example) processing, the input data is loaded once as both AES and modes operations occur at in the same function Performance Everyone likes pretty color charts, so here they are. I ran these on Solaris 11 running on a Piketon Platform system with a 4-core Intel Clarkdale processor @3.20GHz. Clarkdale which is part of the Westmere processor architecture family. The "before" case is Solaris 11, unmodified. Keep in mind that the "before" case already has been optimized with hand-coded Intel AESNI assembly. The "after" case has combined AES-NI and mode instructions, interleaved 4 blocks at-a-time. « For the first table, lower is better (milliseconds). The first table shows the performance improvement using the Solaris encrypt(1) and decrypt(1) CLI commands. I encrypted and decrypted a 1/2 GByte file on /tmp (swap tmpfs). Encryption improved by about 40% and decryption improved by about 80%. AES-128 is slighty faster than AES-256, as expected. The second table shows more detail timings for CBC, CTR, and ECB modes for the 3 AES key sizes and different data lengths. » The results shown are the percentage improvement as shown by an internal PKCS#11 microbenchmark. And keep in mind the previous baseline code already had optimized AESNI assembly! The keysize (AES-128, 192, or 256) makes little difference in relative percentage improvement (although, of course, AES-128 is faster than AES-256). Larger data sizes show better improvement than 128-byte data. Availability This software is in Solaris 11 FCS. It is available in the 64-bit libcrypto library and the "aes" Solaris kernel module. You must be running hardware that supports AESNI (for example, Intel Westmere and Sandy Bridge, microprocessor architectures). The easiest way to determine if AES-NI is available is with the isainfo(1) command. For example, $ isainfo -v 64-bit amd64 applications pclmulqdq aes sse4.2 sse4.1 ssse3 popcnt tscp ahf cx16 sse3 sse2 sse fxsr mmx cmov amd_sysc cx8 tsc fpu 32-bit i386 applications pclmulqdq aes sse4.2 sse4.1 ssse3 popcnt tscp ahf cx16 sse3 sse2 sse fxsr mmx cmov sep cx8 tsc fpu No special configuration or setup is needed to take advantage of this software. Solaris libraries and kernel automatically determine if it's running on AESNI-capable machines and execute the correctly-tuned software for the current microprocessor. Summary Maximum throughput of AES cipher modes can be achieved by combining AES encryption with modes processing, interleaving encryption of 4 blocks at a time, and using Intel's wide 128-bit %xmm registers and instructions. References "Block cipher modes of operation", Wikipedia Good overview of AES modes (ECB, CBC, CTR, etc.) "Advanced Encryption Standard", Wikipedia "Current Modes" describes NIST-approved block cipher modes (ECB,CBC, CFB, OFB, CCM, GCM)

    Read the article

  • MySQL moving ibdata & ib_logfile

    - by XoR
    I'm trying to move ibdata & ib_logfile on ssd drive. I tried this way, but it don't work: service mysql stop cd /var/lib/ cp -ra mysql mysql_backup cp -a mysql/ibdata1 mysql/ib_logfile* /ssd_drive/mysql my.cnf looks like this (relevant parts): innodb_log_group_home_dir=/ssd_drive/mysql innodb_data_home_dir=/ssd_drive/mysql After all changes I get following errors: InnoDB: Unable to lock /ssd_drive/mysql/ibdata1, error: 13 InnoDB: Check that you do not already have another mysqld process Do I need to remove some lock files, or there is something else that I forgot... Also I setup mysql apparmor so it can rw on this directory, and rebooted afterward: /usr/sbin/mysqld { ................. /ssd_drive/mysql/* rw, ................. }

    Read the article

  • Delphi label and asm weirdness?

    - by egon
    I written an asm function in Delphi 7 but it transforms my code to something else: function f(x: Cardinal): Cardinal; register; label err; asm not eax mov edx,eax shr edx, 1 and eax, edx bsf ecx, eax jz err mov eax, 1 shl eax, cl mov edx, eax add edx, edx or eax, edx ret err: xor eax, eax end; // compiled version f: push ebx // !!! not eax mov edx,eax shr edx, 1 and eax, edx bsf ecx, eax jz +$0e mov eax, 1 shl eax, cl mov edx, eax add edx, edx or eax, edx ret err: xor eax, eax mov eax, ebx // !!! pop ebx // !!! ret // the almost equivalent without asm function f(x: Cardinal): Cardinal; var c: Cardinal; begin x := not x; x := x and x shr 1; if x <> 0 then begin c := bsf(x); // bitscanforward x := 1 shl c; Result := x or (x shl 1) end else Result := 0; end; Why does it generate push ebx and pop ebx? And why does it do mov eax, ebx? It seems that it generates the partial stack frame because of the mov eax, ebx. This simple test generates mov eax, edx but doesn't generate that stack frame: function asmtest(x: Cardinal): Cardinal; register; label err; asm not eax and eax, 1 jz err ret err: xor eax, eax end; // compiled asmtest: not eax and eax, $01 jz +$01 ret xor eax, eax mov eax, edx // !!! ret It seems that it has something to do with the label err. If I remove that I don't get the mov eax, * part. Why does this happen? Made a bug report on Quality Central.

    Read the article

  • Convert CRC-CCITT Kermit 16 DELPHI code to C#

    - by Mehdi Anis
    I am working on a function that will give me a Kermit CRC value from a HEX string. I have a piece of code in DELPHI. I am a .NET developer and need the code in C#. function CRC_16(cadena : string):word; var valuehex : word; i: integer; CRC : word; Begin CRC := 0; for i := 1 to length(cadena) do begin valuehex := ((ord(cadena[i]) XOR CRC) AND $0F) * $1081; CRC := CRC SHR 4; CRC := CRC XOR valuehex; valuehex := (((ord(cadena[i]) SHR 4) XOR LO(CRC)) AND $0F); CRC := CRC SHR 4; CRC := CRC XOR (valuehex * $1081); end; CRC_16 := (LO(CRC) SHL 8) OR HI(CRC); end; I got the code from this webpage: Kermit CRC in DELPHI I guess that Delphi function is correct. If any one can please convert the code to C# that will be great. I tried to convert to C#, but got lost in WORD data type and the LO function of Delphi. Thank you all.

    Read the article

  • unexpected output

    - by tech-ref
    hi, i wrote a function wich works as expected but i don't understand why the output is like that. function datatype prop = Atom of string | Not of prop | And of prop*prop | Or of prop*prop; (* XOR = (A And Not B) OR (Not A Or B) *) local fun do_xor (alpha,beta) = Or( And( alpha, Not(beta) ), Or(Not(alpha), beta)) in fun xor (alpha,beta) = do_xor(alpha,beta); end; test val result = xor(Atom "a",Atom "b"); output val result = Or (And (Atom #,Not #),Or (Not #,Atom #)) : prop thanks again (specially zeuxcg)

    Read the article

  • How do i pass a number from a list as a parameter in scheme?

    - by wyatt
    I need to take a number from a list and convert it to a number so that i can pass it as a parameter. im trying to make a 1-bit adder in scheme. i've written the code for the or gate and the xor gate and also the half adder and now im trying to combine them all to make a full adder. im not sure if im going about it the right way. any input will be appreciated thank you. (define or-gate (lambda (a b) (if (= a 1) 1 (if (= b 1) 1 0)))) (define xor-gate (lambda (a b) (if (= a b) 0 1))) (define ha (lambda (a b) (list (xor-gate a b)(and-gate a b)))) (define fa (lambda (a b cin) (or-gate (cdr(ha cin (car (ha a b))))(cdr(ha a b))))) the issue i get when i run the program is that the half adder (ha) function outputs a list as a value and that makes the values incompatible with my other procedures because they require numbers and not lists. i feel like there is a simple solution but i dont know it.

    Read the article

  • How to get better at solving Dynamic programming problems

    - by newbie
    I recently came across this question: "You are given a boolean expression consisting of a string of the symbols 'true', 'false', 'and', 'or', and 'xor'. Count the number of ways to parenthesize the expression such that it will evaluate to true. For example, there is only 1 way to parenthesize 'true and false xor true' such that it evaluates to true." I knew it is a dynamic programming problem so i tried to come up with a solution on my own which is as follows. Suppose we have a expression as A.B.C.....D where '.' represents any of the operations and, or, xor and the capital letters represent true or false. Lets say the number of ways for this expression of size K to produce a true is N. when a new boolean value E is added to this expression there are 2 ways to parenthesize this new expression 1. ((A.B.C.....D).E) ie. with all possible parenthesizations of A.B.C.....D we add E at the end. 2. (A.B.C.(D.E)) ie. evaluate D.E first and then find the number of ways this expression of size K can produce true. suppose T[K] is the number of ways the expression with size K produces true then T[k]=val1+val2+val3 where val1,val2,val3 are calculated as follows. 1)when E is grouped with D. i)It does not change the value of D ii)it inverses the value of D in the first case val1=T[K]=N.( As this reduces to the initial A.B.C....D expression ). In the second case re-evaluate dp[K] with value of D reversed and that is val1. 2)when E is grouped with the whole expression. //val2 contains the number of 'true' E will produce with expressions which gave 'true' among all parenthesized instances of A.B.C.......D i) if true.E = true then val2 = N ii) if true.E = false then val2 = 0 //val3 contains the number of 'true' E will produce with expressions which gave 'false' among all parenthesized instances of A.B.C.......D iii) if false.E=true then val3=( 2^(K-2) - N ) = M ie. number of ways the expression with size K produces a false [ 2^(K-2) is the number of ways to parenthesize an expression of size K ]. iv) if false.E=false then val3 = 0 This is the basic idea i had in mind but when i checked for its solution http://people.csail.mit.edu/bdean/6.046/dp/dp_9.swf the approach there was completely different. Can someone tell me what am I doing wrong and how can i get better at solving DP so that I can come up with solutions like the one given above myself. Thanks in advance.

    Read the article

  • Installing Gtk2 on portable strawberry

    - by XoR
    I downloaded "strawberry-perl-5.12.2.0-portable" and "gtk+-bundle_2.22.1-20101227_win32". I extracted strawberry-perl in some directory and there I put gtk folder with gtk stuff. In portableshell.bat I changed Path env and added: "%drivep%\gtk\bin;%drivep%\gtk\lib;". Don't ask me why I added lib directory, I saw that some guy added it in some website. When I run in portableshell command: "pkg-config --libs --cflags gtk+-2.0" I get: c:\test>pkg-config --libs --cflags gtk+-2.0 -mms-bitfields -Ic:/test/gtk/include/gtk-2.0 -Ic:/test/gtk/lib/gtk-2.0/include - Ic:/test/gtk/include/atk-1.0 -Ic:/test/gtk/include/cairo -Ic:/test/gtk/include/g dk-pixbuf-2.0 -Ic:/test/gtk/include/pango-1.0 -Ic:/test/gtk/include/glib-2.0 -Ic :/test/gtk/lib/glib-2.0/include -Ic:/test/gtk/include -Ic:/test/gtk/include/free type2 -Ic:/test/gtk/include/libpng14 -Lc:/test/gtk/lib -lgtk-win32-2.0 -lgdk-wi n32-2.0 -latk-1.0 -lgio-2.0 -lpangowin32-1.0 -lgdi32 -lpangocairo-1.0 -lgdk_pixb uf-2.0 -lpango-1.0 -lcairo -lgobject-2.0 -lgmodule-2.0 -lgthread-2.0 -lglib-2.0 -lintl All folders looks fine, I also have complete log of compiling glib here. It looks like it doesn't compile because pkg-config gives bad data, or something. Does anyone have some idea how to make this thing work?

    Read the article

  • Books and shellcode examples

    - by Xor
    i read "art of exploitation" and "gray hat hackers".Both these books examples written for x86 systems.i have a centrino laptop and an amd64 pc.I can't make work examples for stack based overflow.

    Read the article

  • VHDL - Problem with std_logic_vector

    - by wretrOvian
    Hi, i'm coding a 4-bit binary adder with accumulator: library ieee; use ieee.std_logic_1164.all; entity binadder is port(n,clk,sh:in bit; x,y:inout std_logic_vector(3 downto 0); co:inout bit; done:out bit); end binadder; architecture binadder of binadder is signal state: integer range 0 to 3; signal sum,cin:bit; begin sum<= (x(0) xor y(0)) xor cin; co<= (x(0) and y(0)) or (y(0) and cin) or (x(0) and cin); process begin wait until clk='0'; case state is when 0=> if(n='1') then state<=1; end if; when 1|2|3=> if(sh='1') then x<= sum & x(3 downto 1); y<= y(0) & y(3 downto 1); cin<=co; end if; if(state=3) then state<=0; end if; end case; end process; done<='1' when state=3 else '0'; end binadder; The output : -- Compiling architecture binadder of binadder ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(15): No feasible entries for infix operator "xor". ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(15): Type error resolving infix expression "xor" as type std.standard.bit. ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(16): No feasible entries for infix operator "and". ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(16): Bad expression in right operand of infix expression "or". ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(16): No feasible entries for infix operator "and". ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(16): Bad expression in left operand of infix expression "or". ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(16): Bad expression in right operand of infix expression "or". ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(16): Type error resolving infix expression "or" as type std.standard.bit. ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(28): No feasible entries for infix operator "&". ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(28): Type error resolving infix expression "&" as type ieee.std_logic_1164.std_logic_vector. ** Error: C:/Modeltech_pe_edu_6.5a/examples/binadder.vhdl(39): VHDL Compiler exiting I believe i'm not handling std_logic_vector's correctly. Please tell me how? :(

    Read the article

  • Constraint Satisfaction Problem

    - by Carl Smotricz
    I'm struggling my way through Artificial Intelligence: A Modern Approach in order to alleviate my natural stupidity. In trying to solve some of the exercises, I've come up against the "Who Owns the Zebra" problem, Exercise 5.13 in Chapter 5. This has been a topic here on SO but the responses mostly addressed the question "how would you solve this if you had a free choice of problem solving software available?" I accept that Prolog is a very appropriate programming language for this kind of problem, and there are some fine packages available, e.g. in Python as shown by the top-ranked answer and also standalone. Alas, none of this is helping me "tough it out" in a way as outlined by the book. The book appears to suggest building a set of dual or perhaps global constraints, and then implementing some of the algorithms mentioned to find a solution. I'm having a lot of trouble coming up with a set of constraints suitable for modelling the problem. I'm studying this on my own so I don't have access to a professor or TA to get me over the hump - this is where I'm asking for your help. I see little similarity to the examples in the chapter. I was eager to build dual constraints and started out by creating (the logical equivalent of) 25 variables: nationality1, nationality2, nationality3, ... nationality5, pet1, pet2, pet3, ... pet5, drink1 ... drink5 and so on, where the number was indicative of the house's position. This is fine for building the unary constraints, e.g. The Norwegian lives in the first house: nationality1 = { :norway }. But most of the constraints are a combination of two such variables through a common house number, e.g. The Swede has a dog: nationality[n] = { :sweden } AND pet[n] = { :dog } where n can range from 1 to 5, obviously. Or stated another way: nationality1 = { :sweden } AND pet1 = { :dog } XOR nationality2 = { :sweden } AND pet2 = { :dog } XOR nationality3 = { :sweden } AND pet3 = { :dog } XOR nationality4 = { :sweden } AND pet4 = { :dog } XOR nationality5 = { :sweden } AND pet5 = { :dog } ...which has a decidedly different feel to it than the "list of tuples" advocated by the book: ( X1, X2, X3 = { val1, val2, val3 }, { val4, val5, val6 }, ... ) I'm not looking for a solution per se; I'm looking for a start on how to model this problem in a way that's compatible with the book's approach. Any help appreciated.

    Read the article

  • Printf in assembler doesn't print

    - by Gaim
    Hi there, I have got a homework to hack program using buffer overflow ( with disassambling, program was written in C++, I haven't got the source code ). I have already managed it but I have a problem. I have to print some message on the screen, so I found out address of printf function, pushed address of "HACKED" and address of "%s" on the stack ( in this order ) and called that function. Called code passed well but nothing had been printed. I have tried to simulate the environment like in other place in the program but there has to be something wrong. Do you have any idea what I am doing wrong that I have no output, please? Thanks a lot EDIT: This program is running on Windows XP SP3 32b, written in C++, Intel asm there is the "hack" code CPU Disasm Address Hex dump Command Comments 0012F9A3 90 NOP ;hack begins 0012F9A4 90 NOP 0012F9A5 90 NOP 0012F9A6 89E5 MOV EBP,ESP 0012F9A8 83EC 7F SUB ESP,7F ;creating a place for working data 0012F9AB 83EC 7F SUB ESP,7F 0012F9AE 31C0 XOR EAX,EAX 0012F9B0 50 PUSH EAX 0012F9B1 50 PUSH EAX 0012F9B2 50 PUSH EAX 0012F9B3 89E8 MOV EAX,EBP 0012F9B5 83E8 09 SUB EAX,9 0012F9B8 BA 1406EDFF MOV EDX,FFED0614 ;address to jump, it is negative because there mustn't be 00 bytes 0012F9BD F7DA NOT EDX 0012F9BF FFE2 JMP EDX ;I have to jump because there are some values overwritten by the program 0012F9C1 90 NOP 0012F9C2 0090 00000000 ADD BYTE PTR DS:[EAX],DL 0012F9C8 90 NOP 0012F9C9 90 NOP 0012F9CA 90 NOP 0012F9CB 90 NOP 0012F9CC 6C INS BYTE PTR ES:[EDI],DX ; I/O command 0012F9CD 65:6E OUTS DX,BYTE PTR GS:[ESI] ; I/O command 0012F9CF 67:74 68 JE SHORT 0012FA3A ; Superfluous address size prefix 0012F9D2 2069 73 AND BYTE PTR DS:[ECX+73],CH 0012F9D5 203439 AND BYTE PTR DS:[EDI+ECX],DH 0012F9D8 34 2C XOR AL,2C 0012F9DA 2066 69 AND BYTE PTR DS:[ESI+69],AH 0012F9DD 72 73 JB SHORT 0012FA52 0012F9DF 74 20 JE SHORT 0012FA01 0012F9E1 3120 XOR DWORD PTR DS:[EAX],ESP 0012F9E3 6C INS BYTE PTR ES:[EDI],DX ; I/O command 0012F9E4 696E 65 7300909 IMUL EBP,DWORD PTR DS:[ESI+65],-6F6FFF8D 0012F9EB 90 NOP 0012F9EC 90 NOP 0012F9ED 90 NOP 0012F9EE 31DB XOR EBX,EBX ; hack continues 0012F9F0 8818 MOV BYTE PTR DS:[EAX],BL ; writing 00 behind word "HACKED" 0012F9F2 83E8 06 SUB EAX,6 0012F9F5 50 PUSH EAX ; address of "HACKED" 0012F9F6 B8 3B8CBEFF MOV EAX,FFBE8C3B 0012F9FB F7D0 NOT EAX 0012F9FD 50 PUSH EAX ; address of "%s" 0012F9FE B8 FFE4BFFF MOV EAX,FFBFE4FF 0012FA03 F7D0 NOT EAX 0012FA05 FFD0 CALL EAX ;address of printf This code is really ugly because I am new in assembler and there mustn't be null bytes because of buffer-overflow bug

    Read the article

  • Finding a 3rd party QWidget with injected code & QWidget::find(hwnd)

    - by David Menard
    Hey, I have a Qt Dll wich I inject into a third-party Application using windows detours library: if(!DetourCreateProcessWithDll( Path, NULL, NULL, NULL, TRUE, CREATE_DEFAULT_ERROR_MODE | CREATE_SUSPENDED, NULL, NULL, &si, &pi, "C:\\Program Files\\Microsoft Research\\Detours Express 2.1\\bin\\detoured.dll", "C:\\Users\\Dave\\Documents\\Visual Studio 2008\\Projects\\XOR\\Debug\\XOR.dll", NULL)) and then I set a system-wide hook to intercept window creation: HHOOK h_hook = ::SetWindowsHookEx(WH_CBT, (HOOKPROC)CBTProc, Status::getInstance()->getXORInstance(), 0); Where XOR is my programs name, and Status::getInstance() is a Singleton where I keep globals. In my CBTProc callback, I want to intercept all windows that are QWidgets: HWND hwnd= FindWindow(L"QWidget", NULL); which works well, since I get a corresponding HWND (I checked with Spy++) Then, I want to get a pointer to the QWidget, so I can use its functions: QWidget* q = QWidget::find(hwnd); but here's the problem, the returned pointer is always 0. Am I not injecting my code into the process properly? Or am I not using QWidget::find() as I should? Thanks, Dave EDIT:If i change the QWidget::find() function to an exported function of my DLL, after setting the hooks (so I can set and catch a breakpoint), QWidgetPrivate::mapper is NULL.

    Read the article

  • Pseudo code for instruction description

    - by Claus
    Hi, I am just trying to fiddle around what is the best and shortest way to describe two simple instructions with C-like pseudo code. The extract instruction is defined as follows: extract rd, rs, imm This instruction extracts the appropriate byte from the 32-bit source register rs and right justifies it in the destination register. The byte is specified by imm and thus can take the values 0 (for the least-significant byte) and 3 (for the most-significant byte). rd = 0x0; // zero-extend result, ie to make sure bits 31 to 8 are set to zero in the result rd = (rs && (0xff << imm)) >> imm; // this extracts the approriate byte and stores it in rd The insert instruction can be regarded as the inverse operation and it takes a right justified byte from the source register rs and deposits it in the appropriate byte of the destination register rd; again, this byte is determined by the value of imm tmp = 0x0 XOR (rs << imm)) // shift the byte to the appropriate byte determined by imm rd = (rd && (0x00 << imm)) // set appropriate byte to zero in rd rd = rd XOR tmp // XOR the byte into the destination register This looks all a bit horrible, so I wonder if there is a little bit a more elegant way to describe this bahaviour in C-like style ;) Many thanks, Claus

    Read the article

  • Why should the "prime-based" hashcode implmentation be used instead of the "naive" one?

    - by Wilhelm
    I have seen that a prime number implmentation of the GetHashCode function is being recommend, for example here. However using the following code (in VB, sorry), it seems as if that implementation gives the same hash density as a "naive" xor implementation. If the density is the same, I would suppose there is the same probability of cllision in both implementations. Am I missing anything on why is the prime approach preferred? I am supossing that if the hash code is a byte I do not lose generality for the integer case. Sub Main() Dim XorHashes(255) As Integer Dim PrimeHashes(255) As Integer For i = 0 To 255 For j = 0 To 255 For k = 0 To 255 XorHashes(GetXorHash(i, j, k)) += 1 PrimeHashes(GetPrimeHash(i, j, k)) += 1 Next Next Next For i = 0 To 255 Console.WriteLine("{0}: {1}, {2}", i, XorHashes(i), PrimeHashes(i)) Next Console.ReadKey() End Sub Public Function GetXorHash(ByVal valueOne As Integer, ByVal valueTwo As Integer, ByVal valueThree As Integer) As Byte Return CByte((valueOne Xor valueTwo Xor valueThree) Mod 256) End Function Public Function GetPrimeHash(ByVal valueOne As Integer, ByVal valueTwo As Integer, ByVal valueThree As Integer) As Byte Dim TempHash = 17 TempHash = 31 * TempHash + valueOne TempHash = 31 * TempHash + valueTwo TempHash = 31 * TempHash + valueThree Return CByte(TempHash Mod 256) End Function

    Read the article

  • Find three numbers appeared only once

    - by shilk
    In a sequence of length n, where n=2k+3, that is there are k unique numbers appeared twice and three numbers appeared only once. The question is: how to find the three unique numbers that appeared only once? for example, in sequence 1 1 2 6 3 6 5 7 7 the three unique numbers are 2 3 5. Note: 3<=n<1e6 and the number will range from 1 to 2e9 Memory limits: 1000KB , this implies that we can't store the whole sequence. Method I have tried(Memory limit exceed): I initialize a tree, and when read in one number I try to remove it from the tree, if the remove returns false(not found), I add it to the tree. Finally, the tree has the three numbers. It works, but is Memory limit exceed. I know how to find one or two such number(s) using bit manipulation. So I wonder if we can find three using the same method(or some method similar)? Method to find one/two number(s) appeared only once: If there is one number appeared only once, we can apply XOR to the sequence to find it. If there are two, we can first apply XOR to the sequence, then separate the sequence into 2 parts by one bit of the result that is 1, and again apply XOR to the 2 parts, and we will find the answer.

    Read the article

  • VHDL gate basics

    - by balina
    Hello. I'm learning VHDL and I've come to a halt. I'd like to create a simple gate out of smaller gates (a NAND gate here). Here's the code: library IEEE; use IEEE.STD_LOGIC_1164.all; entity ANDGATE2 is port( x,y : in STD_LOGIC; z : out STD_LOGIC ); end ANDGATE2; architecture ANDGATE2 of ANDGATE2 is begin z <= x AND y; end ANDGATE2; library IEEE; use IEEE.STD_LOGIC_1164.all; entity NOTGATE1 is port( x : in STD_LOGIC; z : out STD_LOGIC ); end NOTGATE1; architecture NOTGATE1 of NOTGATE1 is begin z <= NOT x; end NOTGATE1; library ieee; use ieee.std_logic_1164.all; entity NANDGATE2 is port( x : in STD_LOGIC; y : in STD_LOGIC; z : out STD_LOGIC ); end NANDGATE2; architecture NANDGATE2 of NANDGATE2 is signal c, d: std_logic; component NOTGATE1 port( n_in : in STD_LOGIC; n_out : out STD_LOGIC ); end component; component ANDGATE2 port( a_in1, a_in2 : in STD_LOGIC; a_out : out STD_LOGIC ); end component; begin N0: ANDGATE2 port map(x, y, c); N1: NOTGATE1 port map(c, d); z <= d; end NANDGATE2; Here's the code from some tutorial I've been using as a template; it compiles with no problems. library ieee; use ieee.std_logic_1164.all; -- definition of a full adder entity FULLADDER is port ( a, b, c: in std_logic; sum, carry: out std_logic ); end FULLADDER; architecture fulladder_behav of FULLADDER is begin sum <= (a xor b) xor c ; carry <= (a and b) or (c and (a xor b)); end fulladder_behav; -- 4-bit adder library ieee; use ieee.std_logic_1164.all; entity FOURBITADD is port ( a, b: in std_logic_vector(3 downto 0); Cin : in std_logic; sum: out std_logic_vector (3 downto 0); Cout, V: out std_logic ); end FOURBITADD; architecture fouradder_structure of FOURBITADD is signal c: std_logic_vector (4 downto 0); component FULLADDER port ( a, b, c: in std_logic; sum, carry: out std_logic ); end component; begin FA0: FULLADDER port map (a(0), b(0), Cin, sum(0), c(1)); FA1: FULLADDER port map (a(1), b(1), C(1), sum(1), c(2)); FA2: FULLADDER port map (a(2), b(2), C(2), sum(2), c(3)); FA3: FULLADDER port map (a(3), b(3), C(3), sum(3), c(4)); V <= c(3) xor c(4); Cout <= c(4); end fouradder_structure; My code compiles with no errors, but with two warnings: # Warning: ELAB1_0026: p2.vhd : (85, 0): There is no default binding for component "andgate2".(Port "a_in1" is not on the entity). # Warning: ELAB1_0026: p2.vhd : (87, 0): There is no default binding for component "notgate1".(Port "n_in" is not on the entity). What gives?

    Read the article

  • looking for a short explanation of fuzzy logic

    - by user613326
    Well i got the idea that basics of fuzzy logic are not that hard to grasp. And i got the feeling that someone might explain it to me in like 30 minutes. Just like i understand neural networks and am able to re-create the famous Xor problem. And go just beyond it and create 3 layer networks of x nodes. I'd like to understand fuzzy till a similar usefully level, in c# language. However the problem is face, I'd like to get concept right however i see many websites who include lots of errors in their basic explaining. Like for example showing pictures and use different numbers as shown in pictures to calculate, as if lots of people just copied stuff without noticing what they write down. While others for me go to deep in their math notation) To me that's very annoying to learn from. For me there is no need to re-invent wheel; Aforge already got a fuzzy logic framework. So what i am looking for are some good examples, good examples like how the neural XOR problem is solved. Is there anyone such a instructional resource out there; do you know a web page, or YouTube where it is shortly explained, what would you recommend me ? Note this article comes close; but it just doesnt nail it for me. After that i downloaded a bunch of free PDF's but most are academic and hard to read for me (i'm not English and dont have a special math degree). (i've been looking around a lot for this, good starter material about it is hard to find).

    Read the article

  • Scala parser combinator runs out of memory

    - by user3217013
    I wrote the following parser in Scala using the parser combinators: import scala.util.parsing.combinator._ import scala.collection.Map import scala.io.StdIn object Keywords { val Define = "define" val True = "true" val False = "false" val If = "if" val Then = "then" val Else = "else" val Return = "return" val Pass = "pass" val Conj = ";" val OpenParen = "(" val CloseParen = ")" val OpenBrack = "{" val CloseBrack = "}" val Comma = "," val Plus = "+" val Minus = "-" val Times = "*" val Divide = "/" val Pow = "**" val And = "&&" val Or = "||" val Xor = "^^" val Not = "!" val Equals = "==" val NotEquals = "!=" val Assignment = "=" } //--------------------------------------------------------------------------------- sealed abstract class Op case object Plus extends Op case object Minus extends Op case object Times extends Op case object Divide extends Op case object Pow extends Op case object And extends Op case object Or extends Op case object Xor extends Op case object Not extends Op case object Equals extends Op case object NotEquals extends Op case object Assignment extends Op //--------------------------------------------------------------------------------- sealed abstract class Term case object TrueTerm extends Term case object FalseTerm extends Term case class FloatTerm(value : Float) extends Term case class StringTerm(value : String) extends Term case class Identifier(name : String) extends Term //--------------------------------------------------------------------------------- sealed abstract class Expression case class TermExp(term : Term) extends Expression case class UnaryOp(op : Op, exp : Expression) extends Expression case class BinaryOp(op : Op, left : Expression, right : Expression) extends Expression case class FuncApp(funcName : Term, args : List[Expression]) extends Expression //--------------------------------------------------------------------------------- sealed abstract class Statement case class ExpressionStatement(exp : Expression) extends Statement case class Pass() extends Statement case class Return(value : Expression) extends Statement case class AssignmentVar(variable : Term, exp : Expression) extends Statement case class IfThenElse(testBody : Expression, thenBody : Statement, elseBody : Statement) extends Statement case class Conjunction(left : Statement, right : Statement) extends Statement case class AssignmentFunc(functionName : Term, args : List[Term], body : Statement) extends Statement //--------------------------------------------------------------------------------- class myParser extends JavaTokenParsers { val keywordMap : Map[String, Op] = Map( Keywords.Plus -> Plus, Keywords.Minus -> Minus, Keywords.Times -> Times, Keywords.Divide -> Divide, Keywords.Pow -> Pow, Keywords.And -> And, Keywords.Or -> Or, Keywords.Xor -> Xor, Keywords.Not -> Not, Keywords.Equals -> Equals, Keywords.NotEquals -> NotEquals, Keywords.Assignment -> Assignment ) def floatTerm : Parser[Term] = decimalNumber ^^ { case x => FloatTerm( x.toFloat ) } def stringTerm : Parser[Term] = stringLiteral ^^ { case str => StringTerm(str) } def identifier : Parser[Term] = ident ^^ { case value => Identifier(value) } def boolTerm : Parser[Term] = (Keywords.True | Keywords.False) ^^ { case Keywords.True => TrueTerm case Keywords.False => FalseTerm } def simpleTerm : Parser[Expression] = (boolTerm | floatTerm | stringTerm) ^^ { case term => TermExp(term) } def argument = expression def arguments_aux : Parser[List[Expression]] = (argument <~ Keywords.Comma) ~ arguments ^^ { case arg ~ argList => arg :: argList } def arguments = arguments_aux | { argument ^^ { case arg => List(arg) } } def funcAppArgs : Parser[List[Expression]] = funcEmptyArgs | ( Keywords.OpenParen ~> arguments <~ Keywords.CloseParen ^^ { case args => args.foldRight(List[Expression]()) ( (a,b) => a :: b ) } ) def funcApp = identifier ~ funcAppArgs ^^ { case funcName ~ argList => FuncApp(funcName, argList) } def variableTerm : Parser[Expression] = identifier ^^ { case name => TermExp(name) } def atomic_expression = simpleTerm | funcApp | variableTerm def paren_expression : Parser[Expression] = Keywords.OpenParen ~> expression <~ Keywords.CloseParen def unary_operation : Parser[String] = Keywords.Not def unary_expression : Parser[Expression] = operation(0) ~ expression(0) ^^ { case op ~ exp => UnaryOp(keywordMap(op), exp) } def operation(precedence : Int) : Parser[String] = precedence match { case 0 => Keywords.Not case 1 => Keywords.Pow case 2 => Keywords.Times | Keywords.Divide | Keywords.And case 3 => Keywords.Plus | Keywords.Minus | Keywords.Or | Keywords.Xor case 4 => Keywords.Equals | Keywords.NotEquals case _ => throw new Exception("No operations with this precedence.") } def binary_expression(precedence : Int) : Parser[Expression] = precedence match { case 0 => throw new Exception("No operation with zero precedence.") case n => (expression (n-1)) ~ operation(n) ~ (expression (n)) ^^ { case left ~ op ~ right => BinaryOp(keywordMap(op), left, right) } } def expression(precedence : Int) : Parser[Expression] = precedence match { case 0 => unary_expression | paren_expression | atomic_expression case n => binary_expression(n) | expression(n-1) } def expression : Parser[Expression] = expression(4) def expressionStmt : Parser[Statement] = expression ^^ { case exp => ExpressionStatement(exp) } def assignment : Parser[Statement] = (identifier <~ Keywords.Assignment) ~ expression ^^ { case varName ~ exp => AssignmentVar(varName, exp) } def ifthen : Parser[Statement] = ((Keywords.If ~ Keywords.OpenParen) ~> expression <~ Keywords.CloseParen) ~ ((Keywords.Then ~ Keywords.OpenBrack) ~> statements <~ Keywords.CloseBrack) ^^ { case ifBody ~ thenBody => IfThenElse(ifBody, thenBody, Pass()) } def ifthenelse : Parser[Statement] = ((Keywords.If ~ Keywords.OpenParen) ~> expression <~ Keywords.CloseParen) ~ ((Keywords.Then ~ Keywords.OpenBrack) ~> statements <~ Keywords.CloseBrack) ~ ((Keywords.Else ~ Keywords.OpenBrack) ~> statements <~ Keywords.CloseBrack) ^^ { case ifBody ~ thenBody ~ elseBody => IfThenElse(ifBody, thenBody, elseBody) } def pass : Parser[Statement] = Keywords.Pass ^^^ { Pass() } def returnStmt : Parser[Statement] = Keywords.Return ~> expression ^^ { case exp => Return(exp) } def statement : Parser[Statement] = ((pass | returnStmt | assignment | expressionStmt) <~ Keywords.Conj) | ifthenelse | ifthen def statements_aux : Parser[Statement] = statement ~ statements ^^ { case st ~ sts => Conjunction(st, sts) } def statements : Parser[Statement] = statements_aux | statement def funcDefBody : Parser[Statement] = Keywords.OpenBrack ~> statements <~ Keywords.CloseBrack def funcEmptyArgs = Keywords.OpenParen ~ Keywords.CloseParen ^^^ { List() } def funcDefArgs : Parser[List[Term]] = funcEmptyArgs | Keywords.OpenParen ~> repsep(identifier, Keywords.Comma) <~ Keywords.CloseParen ^^ { case args => args.foldRight(List[Term]()) ( (a,b) => a :: b ) } def funcDef : Parser[Statement] = (Keywords.Define ~> identifier) ~ funcDefArgs ~ funcDefBody ^^ { case funcName ~ funcArgs ~ body => AssignmentFunc(funcName, funcArgs, body) } def funcDefAndStatement : Parser[Statement] = funcDef | statement def funcDefAndStatements_aux : Parser[Statement] = funcDefAndStatement ~ funcDefAndStatements ^^ { case stmt ~ stmts => Conjunction(stmt, stmts) } def funcDefAndStatements : Parser[Statement] = funcDefAndStatements_aux | funcDefAndStatement def parseProgram : Parser[Statement] = funcDefAndStatements def eval(input : String) = { parseAll(parseProgram, input) match { case Success(result, _) => result case Failure(m, _) => println(m) case _ => println("") } } } object Parser { def main(args : Array[String]) { val x : myParser = new myParser() println(args(0)) val lines = scala.io.Source.fromFile(args(0)).mkString println(x.eval(lines)) } } The problem is, when I run the parser on the following example it works fine: define foo(a) { if (!h(IM) && a) then { return 0; } if (a() && !h()) then { return 0; } } But when I add threes characters in the first if statement, it runs out of memory. This is absolutely blowing my mind. Can anyone help? (I suspect it has to do with repsep, but I am not sure.) define foo(a) { if (!h(IM) && a(1)) then { return 0; } if (a() && !h()) then { return 0; } } EDIT: Any constructive comments about my Scala style is also appreciated.

    Read the article

  • Decompiling a *.DLL to assembly for .net in delphi 4

    - by Lex Dean
    I love my Delphi 4 but at the same time I see the need to talk to windows .net This is a recompiled dll that I found on sourceforge.net/projects/delphinet/ (DelphiNet03.zip) by some nice people that fund the dll from some were. The real answer is to make this dll so that fits into Delphi as true Delphi code, and not a dll clip on. So we can make objects that use dot net in Delphi. Because I’m not an assembly freak, I’m freaking out a little with a wee sweek for help! 1/ How do I link the asm code with the data info at the bottom of this code. Can some one show me which calls to look for to make this link to data. 2/ I need to find the beginning of all the procedures and functions, but I cannot find a ‘RET’ statement. And what line is the beginning statement in this code. 3/ How do I identify were the jump statements go to, put them into Delphi format In this code it looks I can do:- jle 402890h \1000:00402854 7e3a add [eax], al \1000:00402856 0000 …………………………………………….. or ch, [edi+3eh] \1000:0040288d 0a6f3e xrefs first: 1000:00402854 number : 1 \; add [eax], al \1000:00402890 0000 //******************************* jle @@21 \\1000:00402854 7e3a add [eax], al \\1000:00402856 0000 …………………………………………….. or ch, [edi+3eh] \1000:0040288d 0a6f3e xrefs first: 1000:00402854 number : 1 \; @@21 add [eax], al \1000:00402890 0000 Is that a correct conversion. I think a xrefs first: 1000:004021d1 number : 1 is the best to follow 4/ I need a good reference on 8086 up assembly code that I can print out and get to learn properly. I found this asm decomplier of http://www.cronos.cc/ that is so similar to Delphi that it only needs a little more convertion to get it into Delphi asm I think. It’s only taken me 3 hours to get the file into TMemo and to write a few lines to chop the line over in a stream and reload the memo. Help please Email: [email protected] xrefs first: 1000:004041ae number : 1 \\; dd 4190h \\1000:00402000 90410000 dd 00h \\1000:00402004 00000000 dec eax \\1000:00402008 48 add [eax], al \\1000:00402009 0000 add [edx], al \\1000:0040200b 0002 add [eax], al \\1000:0040200d 0000 add [eax-2bffffd2h], al \\1000:0040200f 00802e0000d4 adc al, [eax] \\1000:00402015 1200 add [ecx], al \\1000:00402017 0001 add [eax], al \\1000:00402019 0000 add [eax], al \\1000:0040201b 0000 add [eax], al \\1000:0040201d 0000 add [eax], al \\1000:0040201f 0000 add [eax], al \\1000:00402021 0000 add [eax], al \\1000:00402023 0000 add [eax], al \\1000:00402025 0000 add [eax], al \\1000:00402027 0000 add [eax], al \\1000:00402029 0000 add [eax], al \\1000:0040202b 0000 add [eax], al \\1000:0040202d 0000 add [eax], al \\1000:0040202f 0000 add [eax], al \\1000:00402031 0000 add [eax], al \\1000:00402033 0000 add [eax], al \\1000:00402035 0000 add [eax], al \\1000:00402037 0000 add [eax], al \\1000:00402039 0000 add [eax], al \\1000:0040203b 0000 add [eax], al \\1000:0040203d 0000 add [eax], al \\1000:0040203f 0000 add [eax], al \\1000:00402041 0000 add [eax], al \\1000:00402043 0000 add [eax], al \\1000:00402045 0000 add [eax], al \\1000:00402047 0000 add [eax], al \\1000:00402049 0000 add [eax], al \\1000:0040204b 0000 add [eax], al \\1000:0040204d 0000 add [ebx], dl \\1000:0040204f 0013 xor [eax+eax], al \\1000:00402051 300400 or al, [ecx] \\1000:00402054 0a01 add [eax], al \\1000:00402056 0000 add [eax], eax \\1000:00402058 0100 add [ecx], dl \\1000:0040205a 0011 push cs \\1000:0040205c 0e add al, 50h \\1000:0040205d 0450 mov gs, [ecx+05h] \\1000:0040205f 8e6905 push eax \\1000:00402062 50 mov gs, [ecx+2eh] \\1000:00402063 8e692e add eax, f938h \\1000:00402066 0538f90000 add [ebx], al \\1000:0040206b 0003 jc 402070h \\1000:0040206d 7201 add [eax], al \\1000:0040206f 0000 jo 40209bh \\1000:00402071 7028 add al, [eax] \\1000:00402073 0200 add [edx], cl \\1000:00402075 000a sub eax, 36f0408h \\1000:00402077 2d08046f03 add [eax], al \\1000:0040207c 0000 or ch, [ebx] \\1000:0040207e 0a2b push es \\1000:00402080 06 add al, 6fh \\1000:00402081 046f add al, 00h \\1000:00402083 0400 add [edx], cl \\1000:00402085 000a adc eax, [edi] \\1000:00402087 1307 push ss \\1000:00402089 16 adc ecx, [eax] \\1000:0040208a 1308 cmp cl, cl \\1000:0040208c 38c9 add [eax], al \\1000:0040208e 0000 add [ecx], dl \\1000:00402090 0011 pop es \\1000:00402092 07 adc [eax], ecx \\1000:00402093 1108 callf 056f:060a9a08h \\1000:00402095 9a0a066f05 add [eax], al \\1000:0040209a 0000 or cl, [ebx] \\1000:0040209c 0a0b push es \\1000:0040209e 06 outsd \\1000:0040209f 6f push es \\1000:004020a0 06 add [eax], al \\1000:004020a1 0000 or al, [ebx] \\1000:004020a3 0a03 sub [edx], al \\1000:004020a5 2802 add [eax], al \\1000:004020a7 0000 or bh, [ecx] \\1000:004020a9 0a39 movsd \\1000:004020ab a5 add [eax], al \\1000:004020ac 0000 add [edi], al \\1000:004020ae 0007 mov gs, [ecx+0eh] \\1000:004020b0 8e690e add al, 50h \\1000:004020b3 0450 mov gs, [ecx+40h] \\1000:004020b5 8e6940 cwde \\1000:004020b8 98 add [eax], al \\1000:004020b9 0000 add [edi], dl \\1000:004020bb 0017 or al, 16h \\1000:004020bd 0c16 or eax, 9072b2bh \\1000:004020bf 0d2b2b0709 callf 0000:076f9a09h \\1000:004020c4 9a6f070000 or ch, [edi+08h] \\1000:004020c9 0a6f08 add [eax], al \\1000:004020cc 0000 or ch, [eax+ebx] \\1000:004020ce 0a2c18 push cs \\1000:004020d1 0e add al, 50h \\1000:004020d2 0450 or [edx+d72h], ebx \\1000:004020d4 099a720d0000 jo 402104h \\1000:004020da 7028 or [eax], eax \\1000:004020dc 0900 add [edx], cl \\1000:004020de 000a add dl, cs:[esi] \\1000:004020e0 2e0216 or al, 08h \\1000:004020e3 0c08 sub eax, 90c2b02h \\1000:004020e5 2d022b0c09 pop ss \\1000:004020ea 17 pop eax \\1000:004020eb 58 or eax, 50040e09h \\1000:004020ec 0d090e0450 mov gs, [ecx+32h] \\1000:004020f1 8e6932 int 08h \\1000:004020f4 cd08 sub al, 5ch \\1000:004020f6 2c5c push ss \\1000:004020f8 16 adc eax, [ebx+ebp] \\1000:004020f9 13042b dec esi \\1000:004020fc 4e push cs \\1000:004020fd 0e add al, 50h \\1000:004020fe 0450 adc [edx+ebx*4], eax \\1000:00402100 11049a jc 402112h \\1000:00402103 720d add [eax], al \\1000:00402105 0000 jo 402131h \\1000:00402107 7028 or [eax], eax \\1000:00402109 0900 add [edx], cl \\1000:0040210b 000a xor esi, [esi] \\1000:0040210d 3336 pop es \\1000:0040210f 07 adc [edx+ebx*4], eax \\1000:00402110 11049a outsd \\1000:00402113 6f pop es \\1000:00402114 07 add [eax], al \\1000:00402115 0000 or ch, [edi+0ah] \\1000:00402117 0a6f0a add [eax], al \\1000:0040211a 0000 or dl, [ebx] \\1000:0040211c 0a13 push es \\1000:0040211e 06 add eax, 9a041150h \\1000:0040211f 055011049a sub [ebx], cl \\1000:00402124 280b add [eax], al \\1000:00402126 0000 or dl, [edx] \\1000:00402128 0a12 push es \\1000:0040212a 06 adc al, [c28h] \\1000:0040212b 1205280c0000 xrefs first: 1000:00402107 number : 1 \\; or ch, [edx+eax] \\1000:00402131 0a2c02 sub ebx, [esi] \\1000:00402134 2b1e push cs \\1000:00402136 0e add al, 50h \\1000:00402137 0450 adc [edi+eax], eax \\1000:00402139 110407 adc [edx+ebx*4], eax \\1000:0040213c 11049a outsd \\1000:0040213f 6f pop es \\1000:00402140 07 add [eax], al \\1000:00402141 0000 or ah, [edx+58170411h] \\1000:00402143 0aa211041758 adc eax, [ecx+edx] \\1000:00402149 130411 add al, 0eh \\1000:0040214c 040e add al, 50h \\1000:0040214e 0450 mov gs, [ecx+32h] \\1000:00402150 8e6932 test eax, 58170811h \\1000:00402153 a911081758 adc ecx, [eax] \\1000:00402158 1308 adc [eax], ecx \\1000:0040215a 1108 adc [edi], eax \\1000:0040215c 1107 mov gs, [ecx+3fh] \\1000:0040215e 8e693f sub al, ffh \\1000:00402161 2cff db ff \\1000:00402163 ff jmp [edx] \\1000:00402164 ff2a add [eax], al \\1000:00402166 0000 adc esi, [eax] \\1000:00402168 1330 add eax, 8100h \\1000:0040216a 0500810000 add [edx], al \\1000:0040216f 0002 add [eax], al \\1000:00402171 0000 adc [edx+esi*2], eax \\1000:00402173 110472 xor eax, [eax] \\1000:00402176 3300 add [eax+28h], dh \\1000:00402178 007028 add al, [eax] \\1000:0040217b 0200 add [edx], cl \\1000:0040217d 000a sub al, 09h \\1000:0040217f 2c09 add ebp, [eax] \\1000:00402181 0328 or eax, a0a0000h \\1000:00402183 0d00000a0a sub eax, [edi] \\1000:00402188 2b07 add al, 28h \\1000:0040218a 0428 push cs \\1000:0040218c 0e add [eax], al \\1000:0040218d 0000 or cl, [edx] \\1000:0040218f 0a0a push es \\1000:00402191 06 add eax, f6f1717h \\1000:00402192 0517176f0f add [eax], al \\1000:00402197 0000 or cl, [ebx] \\1000:00402199 0a0b push ss \\1000:0040219b 16 lea eax, [edx] \\1000:0040219c 8d02 add [eax], al \\1000:0040219e 0000 add [esi+ecx], ecx \\1000:004021a0 010c0e add al, 2ch \\1000:004021a3 042c push cs \\1000:004021a5 260e add al, 8eh \\1000:004021a7 048e c160d imul edi, [eax+28dh], d160c01h \\1000:004021a9 69b88d020000010c sub edx, [eax] \\1000:004021b3 2b10 or [ecx], cl \\1000:004021b5 0809 push cs \\1000:004021b7 0e add al, 09h \\1000:004021b8 0409 callf 0000:106f9a09h \\1000:004021ba 9a6f100000 or ah, [edx+d581709h] \\1000:004021bf 0aa20917580d or [esi], ecx \\1000:004021c5 090e add al, 8eh \\1000:004021c7 048e imul esi, [edx], 17202e9h \\1000:004021c9 6932e9027201 add [eax], al \\1000:004021cf 0000 jo 4021dah \\1000:004021d1 7007 db 0f \\1000:004021d3 0f add al, 12h \\1000:004021d4 0412 add ch, [eax] \\1000:004021d6 0228 add [eax], eax \\1000:004021d8 0100 xrefs first: 1000:004021d1 number : 1 \\; add [esi], al \\1000:004021da 0006 pop es \\1000:004021dc 07 or [edi+11h], ch \\1000:004021dd 086f11 add [eax], al \\1000:004021e0 0000 or dl, [ebx] \\1000:004021e2 0a13 add al, 11h \\1000:004021e4 0411 add al, 0eh \\1000:004021e6 040e add al, 6fh \\1000:004021e8 046f adc al, [eax] \\1000:004021ea 1200 add [edx], cl \\1000:004021ec 000a adc eax, [511002bh] \\1000:004021ee 13052b001105 sub al, [eax] \\1000:004021f4 2a00 add [eax], al \\1000:004021f6 0000 adc esi, [eax] \\1000:004021f8 1330 add eax, 4e00h \\1000:004021fa 05004e0000 add [ebx], al \\1000:004021ff 0003 add [eax], al \\1000:00402201 0000 adc [ebx], eax \\1000:00402203 1103 outsd \\1000:00402205 6f adc [eax], al \\1000:00402206 1000 add [edx], cl \\1000:00402208 000a or al, [8db8698eh] \\1000:0040220a 0a058e69b88d add al, [eax] \\1000:00402210 0200 add [ecx], al \\1000:00402212 0001 or edx, [esi] \\1000:00402214 0b16 or al, 2bh \\1000:00402216 0c2b db 0f \\1000:00402218 0f pop es \\1000:00402219 07 or [106f9a08h], al \\1000:0040221a 0805089a6f10 add [eax], al \\1000:00402220 0000 or ah, [edx+c581708h] \\1000:00402222 0aa20817580c or [eb32698eh], al \\1000:00402228 08058e6932eb add al, [esi+eax] \\1000:0040222e 020406 lsl edx, [edx] \\1000:00402231 0f0312 add [eax], ebp \\1000:00402234 0128 add [eax], eax \\1000:00402236 0100 add [esi], al \\1000:00402238 0006 push es \\1000:0040223a 06 add al, 07h \\1000:0040223b 0407 outsd \\1000:0040223d 6f adc eax, [eax] \\1000:0040223e 1300 add [edx], cl \\1000:00402240 000a or eax, 6f050309h \\1000:00402242 0d0903056f adc al, 00h \\1000:00402247 1400 add [edx], cl \\1000:00402249 000a adc eax, [ebx+ebp] \\1000:0040224b 13042b add [ecx], dl \\1000:0040224e 0011 add al, 2ah \\1000:00402250 042a add [eax], al \\1000:00402252 0000 adc esi, [eax] \\1000:00402254 1330 add eax, 7600h \\1000:00402256 0500760000 add [eax+eax], al \\1000:0040225b 000400 add [ecx], dl \\1000:0040225e 0011 add al, 72h \\1000:00402260 0472 xor eax, [eax] \\1000:00402262 3300 add [eax+28h], dh \\1000:00402264 007028 add al, [eax] \\1000:00402267 0200 add [edx], cl \\1000:00402269 000a sub al, 09h \\1000:0040226b 2c09 add ebp, [eax] \\1000:0040226d 0328 or eax, a0a0000h \\1000:0040226f 0d00000a0a sub eax, [edi] \\1000:00402274 2b07 add al, 28h \\1000:00402276 0428 push cs \\1000:00402278 0e add [eax], al \\1000:00402279 0000 or cl, [edx] \\1000:0040227b 0a0a push es \\1000:0040227d 06 add eax, f6f1717h \\1000:0040227e 0517176f0f add [eax], al \\1000:00402283 0000 or cl, [ebx] \\1000:00402285 0a0b push cs \\1000:00402287 0e add eax, 8db8698eh \\1000:00402288 058e69b88d add al, [eax] \\1000:0040228d 0200 add [ecx], al \\1000:0040228f 0001 or al, 16h \\1000:00402291 0c16 or eax, 908102bh \\1000:00402293 0d2b100809 push cs \\1000:00402298 0e add eax, 106f9a09h \\1000:00402299 05099a6f10 add [eax], al \\1000:0040229e 0000 or ah, [edx+d581709h] \\1000:004022a0 0aa20917580d or [esi], ecx \\1000:004022a6 090e add eax, e932698eh \\1000:004022a8 058e6932e9 add cl, [esi] \\1000:004022ad 020e add al, 07h \\1000:004022af 0407 db 0f \\1000:004022b1 0f add eax, 1280212h \\1000:004022b2 0512022801 add [eax], al \\1000:004022b7 0000 push es \\1000:004022b9 06 pop es \\1000:004022ba 07 push cs \\1000:004022bb 0e add al, 08h \\1000:004022bc 0408 outsd \\1000:004022be 6f adc eax, [eax] \\1000:004022bf 1300 add [edx], cl \\1000:004022c1 000a adc eax, [ecx+edx] \\1000:004022c3 130411 add al, 14h \\1000:004022c6 0414 push cs \\1000:004022c8 0e add eax, 146fh \\1000:004022c9 056f140000 or dl, [ebx] \\1000:004022ce 0a13 add eax, 511002bh \\1000:004022d0 052b001105 sub al, [eax] \\1000:004022d5 2a00 add [ebx], dl \\1000:004022d7 0013 xor [eax+eax], al \\1000:004022d9 300400 jbe 4022deh \\1000:004022dc 7600 xrefs first: 1000:004022dc number : 1 \\; add fs:[esi+45h], cl \\1000:004034fc 64004e45 push esp \\1000:00403500 54 dec ecx \\1000:00403501 49 xrefs first: 1000:004034b2 number : 1 \\; outsb \\1000:00403502 6e jbe 403574h \\1000:00403503 766f imul esp, [ebp+43h], 6ch \\1000:00403505 6b65436c popad \\1000:00403509 61 jnc 40357fh \\1000:0040350a 7373 dec ebp \\1000:0040350c 4d jz 403578h \\1000:0040350d 657468 outsd \\1000:00403510 6f add fs:[esi+45h], cl \\1000:00403511 64004e45 push esp \\1000:00403515 54 push ebx \\1000:00403516 53 jz 40355fh \\1000:00403517 657445 outsb \\1000:0040351a 6e jnz 40358ah \\1000:0040351b 756d push esi \\1000:0040351d 56 xrefs first: 1000:004034b7 number : 1 \\; popad \\1000:0040351e 61 insb \\1000:0040351f 6c jnz 403587h \\1000:00403520 7565 add [esi+45h], cl \\1000:00403522 004e45 push esp \\1000:00403525 54 inc edi \\1000:00403526 47 db 65 ;'e' \\1000:00403527 65 xrefs first: 1000:004034be number : 1 \\; db 74 ;'t' \\1000:00403528 74 db 50 ;'p' \\1000:00403529 50 db 72 ;'r' \\1000:0040352a 72 db 6f ;'o' \\1000:0040352b 6f db 70 ;'p' \\1000:0040352c 70 db 65 ;'e' \\1000:0040352d 65 db 72 ;'r' \\1000:0040352e 72 db 74 ;'t' \\1000:0040352f 74 db 79 ;'y' \\1000:00403530 79 db 00 \\1000:00403531 00 db 4e ;'n' \\1000:00403532 4e db 45 ;'e' \\1000:00403533 45 db 54 ;'t' \\1000:00403534 54 db 47 ;'g' \\1000:00403535 47 db 65 ;'e' \\1000:00403536 65 db 74 ;'t' \\1000:00403537 74 db 46 ;'f' \\1000:00403538 46 db 69 ;'i' \\1000:00403539 69 db 65 ;'e' \\1000:0040353a 65 db 6c ;'l' \\1000:0040353b 6c db 64 ;'d' \\1000:0040353c 64 db 00 \\1000:0040353d 00 could not fit the rest in because of Stack overflow limitions

    Read the article

  • Why doesn't C have rotate left/right operators?

    - by icepack
    A bit of a philosophical question, I suppose. Hope it belongs here. C language has the standard set of bit-wise operations, including OR, AND, XOR, SHIFT LEFT/RIGHT, NOT. Anyone has an idea why rotate left/rotate right isn't included in the language? These operators are of the same complexity as other bit-wise operators and normally require a single assembly instruction, like the others. Besides, I can think of a lot of uses for rotate operator, probably not less than, say, xor operator - so it sounds a bit strange to me that they aren't included in C along with the rest. Edit: Please stop suggesting implementations of rotation operators. I know how to do that and it's not what the question about.

    Read the article

facebook twitter digg google delicious technorati stumbleupon myspace wordpress linkedin gmail igoogle windows live tumblr viadeo yahoo buzz yahoo mail yahoo bookmarks favorites email print

< Previous Page | 1 2 3 4 5 6 7 8  | Next Page >