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  • ubuntu 10.04 logs itself out overnight

    - by Corey
    Every night when I leave work, I lock the screen via ubuntu's "power" button in the top right hand panel. When I come to work in the morning, I'm greeted with the log-in screen. This doesn't happen every night, but most. I'm running ubuntu 10.04 on a Dell inspiron. I've included some HW specs, and also dmesg output. Please let me know what other logs may be useful. thanks! Corey ~$ dmesg [20559.696062] type=1503 audit(1285957687.048:16): operation="open" pid=6212 parent=1 profile="/usr/bin/evince" requested_mask="::r" denied_mask="::r" fsuid=1000 ouid=0 name="/usr/local/lib/libltdl.so.7.2.2" [21127.951621] type=1503 audit(1285958255.300:17): operation="open" pid=6390 parent=1 profile="/usr/bin/evince" requested_mask="::r" denied_mask="::r" fsuid=1000 ouid=0 name="/usr/local/lib/libltdl.so.7.2.2" [291038.528014] [drm:i915_hangcheck_elapsed] *ERROR* Hangcheck timer elapsed... GPU hung [291038.528025] render error detected, EIR: 0x00000000 [291038.528042] [drm:i915_do_wait_request] *ERROR* i915_do_wait_request returns -5 (awaiting 22973891 at 22973890) [291038.828014] [drm:i915_hangcheck_elapsed] *ERROR* Hangcheck timer elapsed... GPU hung [291038.828023] render error detected, EIR: 0x00000000 [291038.828042] [drm:i915_do_wait_request] *ERROR* i915_do_wait_request returns -5 (awaiting 22973894 at 22973890) ~$ lspci -vv 00:00.0 Host bridge: Intel Corporation 4 Series Chipset DRAM Controller (rev 03) Subsystem: Dell Device 02e1 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort+ >SERR- <PERR- INTx- Latency: 0 Capabilities: <access denied> Kernel driver in use: agpgart-intel Kernel modules: intel-agp 00:02.0 VGA compatible controller: Intel Corporation 4 Series Chipset Integrated Graphics Controller (rev 03) Subsystem: Dell Device 02e1 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 27 Region 0: Memory at fe400000 (64-bit, non-prefetchable) [size=4M] Region 2: Memory at d0000000 (64-bit, prefetchable) [size=256M] Region 4: I/O ports at dc00 [size=8] Capabilities: <access denied> Kernel driver in use: i915 Kernel modules: i915 00:1b.0 Audio device: Intel Corporation N10/ICH 7 Family High Definition Audio Controller (rev 01) Subsystem: Dell Device 02e1 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 16 Region 0: Memory at feaf8000 (64-bit, non-prefetchable) [size=16K] Capabilities: <access denied> Kernel driver in use: HDA Intel Kernel modules: snd-hda-intel 00:1c.0 PCI bridge: Intel Corporation N10/ICH 7 Family PCI Express Port 1 (rev 01) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 I/O behind bridge: 00001000-00001fff Memory behind bridge: 80000000-801fffff Prefetchable memory behind bridge: 0000000080200000-00000000803fffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport Kernel modules: shpchp 00:1c.1 PCI bridge: Intel Corporation N10/ICH 7 Family PCI Express Port 2 (rev 01) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 I/O behind bridge: 0000e000-0000efff Memory behind bridge: feb00000-febfffff Prefetchable memory behind bridge: 00000000fdf00000-00000000fdffffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> Kernel driver in use: pcieport Kernel modules: shpchp 00:1d.0 USB Controller: Intel Corporation N10/ICH7 Family USB UHCI Controller #1 (rev 01) Subsystem: Dell Device 02e1 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 4: I/O ports at d880 [size=32] Kernel driver in use: uhci_hcd 00:1d.1 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 (rev 01) Subsystem: Dell Device 02e1 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 19 Region 4: I/O ports at d800 [size=32] Kernel driver in use: uhci_hcd 00:1d.2 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 (rev 01) Subsystem: Dell Device 02e1 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin C routed to IRQ 18 Region 4: I/O ports at d480 [size=32] Kernel driver in use: uhci_hcd 00:1d.3 USB Controller: Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 (rev 01) Subsystem: Dell Device 02e1 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin D routed to IRQ 16 Region 4: I/O ports at d400 [size=32] Kernel driver in use: uhci_hcd 00:1d.7 USB Controller: Intel Corporation N10/ICH 7 Family USB2 EHCI Controller (rev 01) (prog-if 20) Subsystem: Dell Device 02e1 Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin A routed to IRQ 23 Region 0: Memory at feaf7c00 (32-bit, non-prefetchable) [size=1K] Capabilities: <access denied> Kernel driver in use: ehci_hcd 00:1e.0 PCI bridge: Intel Corporation 82801 PCI Bridge (rev e1) (prog-if 01) Control: I/O- Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=00, secondary=03, subordinate=03, sec-latency=32 Secondary status: 66MHz- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort+ <SERR- <PERR- BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: <access denied> 00:1f.0 ISA bridge: Intel Corporation 82801GB/GR (ICH7 Family) LPC Interface Bridge (rev 01) Subsystem: Dell Device 02e1 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Capabilities: <access denied> Kernel modules: iTCO_wdt, intel-rng 00:1f.2 IDE interface: Intel Corporation N10/ICH7 Family SATA IDE Controller (rev 01) (prog-if 8f [Master SecP SecO PriP PriO]) Subsystem: Dell Device 02e1 Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Interrupt: pin B routed to IRQ 19 Region 0: I/O ports at d080 [size=8] Region 1: I/O ports at d000 [size=4] Region 2: I/O ports at cc00 [size=8] Region 3: I/O ports at c880 [size=4] Region 4: I/O ports at c800 [size=16] Capabilities: <access denied> Kernel driver in use: ata_piix 00:1f.3 SMBus: Intel Corporation N10/ICH 7 Family SMBus Controller (rev 01) Subsystem: Dell Device 02e1 Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap- 66MHz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Interrupt: pin B routed to IRQ 5 Region 4: I/O ports at 0400 [size=32] Kernel modules: i2c-i801 02:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL8101E/RTL8102E PCI Express Fast Ethernet controller (rev 02) Subsystem: Dell Device 02e1 Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+ Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0, Cache Line Size: 32 bytes Interrupt: pin A routed to IRQ 26 Region 0: I/O ports at e800 [size=256] Region 2: Memory at fdfff000 (64-bit, prefetchable) [size=4K] Region 4: Memory at fdfe0000 (64-bit, prefetchable) [size=64K] Expansion ROM at febe0000 [disabled] [size=128K] Capabilities: <access denied> Kernel driver in use: r8169 Kernel modules: r8169 log$ tail -n 15 Xorg.0.log.old for help. Please also check the log file at "/var/log/Xorg.0.log" for additional information. (II) Power Button: Close (II) UnloadModule: "evdev" (II) Power Button: Close (II) UnloadModule: "evdev" (II) USB Optical Mouse: Close (II) UnloadModule: "evdev" (II) Dell Dell USB Entry Keyboard: Close (II) UnloadModule: "evdev" (II) Macintosh mouse button emulation: Close (II) UnloadModule: "evdev" (II) AIGLX: Suspending AIGLX clients for VT switch ddxSigGiveUp: Closing log

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  • Mac Server bizzare routing table

    - by The Unix Janitor
    My mac routing table usually is very simple. I know it's based on bsd , but what's it doing or trying to do. My routing table is usually very simple however, the second one, default was point to link5 ? Is this normal, or is this IPV6 craziness at work? Can somehelp me understand what OSX/BSD is doing? nternet: Destination Gateway Flags Refs Use Netif Expire default 192.168.1.254 UGSc 22 0 en1 127 127.0.0.1 UCS 0 0 lo0 127.0.0.1 127.0.0.1 UH 4 44102 lo0 169.254 link#5 UCS 0 0 en1 192.168.1 link#5 UCS 6 0 en1 192.168.1.1 0:18:39:6d:89:c5 UHLWIi 0 0 en1 739 192.168.1.189 50:ea:d6:86:26:91 UHLWIi 0 0 en1 798 192.168.1.194 127.0.0.1 UHS 0 0 lo0 192.168.1.203 5c:95:ae:dd:34:8d UHLWIi 0 0 en1 316 192.168.1.253 a:76:ff:b5:51:79 UHLWIi 0 0 en1 911 192.168.1.254 8:76:ff:b5:51:79 UHLWIi 32 204 en1 1117 192.168.1.255 ff:ff:ff:ff:ff:ff UHLWbI 0 7 en1 Internet6: Destination Gateway Flags Netif Expire ::1 link#1 UHL lo0 fe80::%lo0/64 fe80::1%lo0 UcI lo0 fe80::1%lo0 link#1 UHLI lo0 fe80::%en1/64 link#5 UCI en1 fe80::21b:63ff:fec7:c486%en1 0:1b:63:c7:c4:86 UHLI lo0 fe80::223:12ff:fe01:d7fe%en1 0:23:12:1:d7:fe UHLWIi en1 ff01::%lo0/32 fe80::1%lo0 UmCI lo0 ff01::%en1/32 link#5 UmCI en1 ff02::%lo0/32 fe80::1%lo0 UmCI lo0 ff02::%en1/32 link#5 UmCI en1 ----------------------------------- Bizzare routing table here Internet: Destination Gateway Flags Refs Use Netif Expire default link#5 UCS 113 0 en1 17.72.255.12 0:50:7f:5e:92:e2 UHLWIi 2 7 en1 1156 64.4.23.141 0:50:7f:5e:92:e2 UHLWIi 0 3 en1 1181 64.4.23.143 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1189 64.4.23.147 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1183 64.4.23.149 link#5 UHLWIi 0 1 en1 64.4.23.150 0:50:7f:5e:92:e2 UHLWIi 0 24 en1 1175 64.4.23.151 link#5 UHLWIi 0 1 en1 64.4.23.153 link#5 UHLWIi 0 1 en1 64.4.23.155 link#5 UHLWIi 0 1 en1 64.4.23.157 0:50:7f:5e:92:e2 UHLWIi 0 3 en1 1181 64.4.23.165 link#5 UHLWIi 0 2 en1 64.4.23.166 link#5 UHLWIi 0 1 en1 65.55.223.15 0:50:7f:5e:92:e2 UHLWIi 3 21 en1 1189 65.55.223.16 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 65.55.223.17 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1199 65.55.223.20 link#5 UHLWIi 0 1 en1 65.55.223.23 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1199 65.55.223.31 link#5 UHLWIi 0 1 en1 65.55.223.32 link#5 UHLWIi 0 1 en1 65.55.223.37 0:50:7f:5e:92:e2 UHLWIi 3 21 en1 1189 65.55.223.38 link#5 UHLWIi 0 1 en1 69.163.252.33 0:50:7f:5e:92:e2 UHLWIi 1 9 en1 1181 77.67.32.254 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1164 111.221.74.13 0:50:7f:5e:92:e2 UHLWIi 0 24 en1 1183 111.221.74.15 link#5 UHLWIi 0 1 en1 111.221.74.16 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1183 111.221.74.17 0:50:7f:5e:92:e2 UHLWIi 3 23 en1 1172 111.221.74.21 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 111.221.74.23 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1172 111.221.74.24 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1181 111.221.74.26 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1199 111.221.74.29 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1181 111.221.74.31 link#5 UHLWIi 0 1 en1 111.221.74.37 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1190 111.221.74.38 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1199 111.221.77.141 0:50:7f:5e:92:e2 UHLWIi 0 3 en1 1199 111.221.77.144 link#5 UHLWIi 0 1 en1 111.221.77.145 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1190 111.221.77.149 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1183 111.221.77.154 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 111.221.77.156 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1190 111.221.77.157 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1183 111.221.77.162 link#5 UHLWIi 0 1 en1 111.221.77.165 link#5 UHLWIi 0 1 en1 127 127.0.0.1 UCS 0 0 lo0 127.0.0.1 127.0.0.1 UH 4 40073 lo0 157.55.56.140 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1199 157.55.56.141 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 157.55.56.143 link#5 UHLWIi 0 1 en1 157.55.56.147 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1183 157.55.56.148 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1183 157.55.56.149 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1189 157.55.56.150 link#5 UHLWIi 0 1 en1 157.55.56.157 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1172 157.55.56.158 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1175 157.55.130.143 link#5 UHLWIi 0 1 en1 157.55.130.144 link#5 UHLWIi 0 1 en1 157.55.130.145 0:50:7f:5e:92:e2 UHLWIi 0 24 en1 1181 157.55.130.152 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1199 157.55.130.153 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1172 157.55.130.155 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1189 157.55.130.156 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1186 157.55.130.157 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1189 157.55.130.158 0:50:7f:5e:92:e2 UHLWIi 0 3 en1 1172 157.55.130.160 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1189 157.55.130.162 0:50:7f:5e:92:e2 UHLWIi 3 21 en1 1193 157.55.130.166 link#5 UHLWIi 0 1 en1 157.55.235.141 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1193 157.55.235.142 link#5 UHLWIi 1 1 en1 157.55.235.144 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1172 157.55.235.145 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1172 157.55.235.149 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 157.55.235.151 link#5 UHRLWIi 0 36 en1 157.55.235.152 0:50:7f:5e:92:e2 UHLWIi 3 21 en1 1189 157.55.235.153 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1178 157.55.235.156 link#5 UHLWIi 0 2 en1 157.55.235.157 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 157.55.235.158 link#5 UHLWIi 0 1 en1 157.55.235.159 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 157.55.235.162 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1183 157.55.235.166 0:50:7f:5e:92:e2 UHLWIi 0 25 en1 1181 157.56.52.14 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1181 157.56.52.15 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1183 157.56.52.16 link#5 UHLWIi 0 1 en1 157.56.52.17 0:50:7f:5e:92:e2 UHLWIi 3 14 en1 1199 157.56.52.19 link#5 UHLWIi 0 1 en1 157.56.52.20 0:50:7f:5e:92:e2 UHLWIi 3 17 en1 1199 157.56.52.22 0:50:7f:5e:92:e2 UHLWIi 0 24 en1 1181 157.56.52.25 link#5 UHLWIi 0 1 en1 157.56.52.28 link#5 UHLWIi 0 1 en1 157.56.52.29 link#5 UHLWIi 0 1 en1 157.56.52.31 link#5 UHLWIi 0 1 en1 157.56.52.33 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1189 169.254 link#5 UC 1 0 en1 169.254.174.250 127.0.0.1 UHS 1 0 lo0 169.254.255.255 ff:ff:ff:ff:ff:ff UHLWb 0 2 en1 193.88.6.19 link#5 UHLWIi 0 1 en1 194.165.188.82 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1166 195.46.253.211 link#5 UHLWIi 0 1 en1 204.9.163.143 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1178 213.199.179.141 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1172 213.199.179.142 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1165 213.199.179.143 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1166 213.199.179.146 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1172 213.199.179.147 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1164 213.199.179.148 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1165 213.199.179.149 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1172 213.199.179.150 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1165 213.199.179.151 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1164 213.199.179.153 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1166 213.199.179.157 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1167 213.199.179.160 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1165 213.199.179.161 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1172 213.199.179.162 0:50:7f:5e:92:e2 UHLWIi 0 2 en1 1163 213.199.179.165 0:50:7f:5e:92:e2 UHLWIi 0 1 en1 1164 213.199.179.166 0:50:7f:5e:92:e2 UHLWIi 0 3 en1 1164 224.0.0.251 1:0:5e:0:0:fc UHmLWI 0 0 en1 255.255.255.255 ff:ff:ff:ff:ff:ff UHLWbI 0 2 en1 Internet6: Destination Gateway Flags Netif Expire ::1 link#1 UHL lo0 fe80::%lo0/64 fe80::1%lo0 UcI lo0 fe80::1%lo0 link#1 UHLI lo0 fe80::%en1/64 link#5 UCI en1 fe80::21b:63ff:fec7:c486%en1 0:1b:63:c7:c4:87 UHLI lo0 fe80::223:12ff:fe01:d7fe%en1 0:23:12:1:d7:ff UHLWIi en1 ff01::%lo0/32 fe80::1%lo0 UmCI lo0 ff01::%en1/32 link#5 UmCI en1 ff02::%lo0/32 fe80::1%lo0 UmCI lo0 ff02::%en1/32 link#5 UmCI en1

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  • When to use Shift operators << >> in C# ?

    - by Junior Mayhé
    I was studying shift operators in C#, trying to find out when to use them in my code. I found an answer but for Java, you could: a) Make faster integer multiplication and division operations: *4839534 * 4* can be done like this: 4839534 << 2 or 543894 / 2 can be done like this: 543894 1 Shift operations much more faster than multiplication for most of processors. b) Reassembling byte streams to int values c) For accelerating operations with graphics since Red, Green and Blue colors coded by separate bytes. d) Packing small numbers into one single long... For b, c and d I can't imagine here a real sample. Does anyone know if we can accomplish all these items in C#? Is there more practical use for shift operators in C#?

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  • Saturated addition of two signed Java 'long' values

    - by finnw
    How can one add two long values (call them x and y) in Java so that if the result overflows then it is clamped to the range Long.MIN_VALUE..Long.MAX_VALUE? For adding ints one can perform the arithmetic in long precision and cast the result back to an int, e.g.: int saturatedAdd(int x, int y) { long sum = (long) x + (long) y; long clampedSum = Math.max((long) Integer.MIN_VALUE, Math.min(sum, (long) Integer.MAX_VALUE)); return (int) clampedSum; } or import com.google.common.primitives.Ints; int saturatedAdd(int x, int y) { long sum = (long) x + (long) y; return Ints.saturatedCast(sum); } but in the case of long there is no larger primitive type that can hold the intermediate (unclamped) sum. Since this is Java, I cannot use inline assembly (in particular SSE's saturated add instructions.) It can be implemented using BigInteger, e.g. static final BigInteger bigMin = BigInteger.valueOf(Long.MIN_VALUE); static final BigInteger bigMax = BigInteger.valueOf(Long.MAX_VALUE); long saturatedAdd(long x, long y) { BigInteger sum = BigInteger.valueOf(x).add(BigInteger.valueOf(y)); return bigMin.max(sum).min(bigMax).longValue(); } however performance is important so this method is not ideal (though useful for testing.) I don't know whether avoiding branching can significantly affect performance in Java. I assume it can, but I would like to benchmark methods both with and without branching. Related: http://stackoverflow.com/questions/121240/saturating-addition-in-c

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  • Bitshift in javascript

    - by pingvinus
    I've got a really big number: 5799218898. And want to shift it right to 13 bits. So, windows-calculator or python gives me: 5799218898 13 | 100010100100001110011111100001 13 70791 | 10001010010000111 As expected. But Javascript: 5799218898 13 | 100010100100001110011111100001 13 183624 | 101100110101001000 I think it because of internal integer representation in javascript, but cannot find anything about that.

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  • Better name for CHAR_BIT?

    - by Potatoswatter
    I was just checking an answer and realized that CHAR_BIT isn't defined by headers as I'd expect, not even by #include <bitset>, on newer GCC. Do I really have to #include <climits> just to get the "functionality" of CHAR_BIT?

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  • ARM assembly puzzle

    - by ivant
    First of all, I'm not sure if solution even exists. I spent more than a couple of hours trying to come up with one, so beware. The problem: r1 contains an arbitrary integer, flags are not set according to its value. Set r0 to 1 if r1 is 0x80000000, to 0 otherwise, using only two instructions. It's easy to do that in 3 instructions (there are many ways), however doing it in 2 seems very hard, and may very well be impossible.

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  • How to calculate 2^n-1 efficiently without overflow?

    - by Ludwig Weinzierl
    I want to calculate 2^n-1 for a 64bit integer value. What I currently do is this for(i=0; i<n; i++) r|=1<<i; and I wonder if there is more elegant way to do it. The line is in an inner loop, so I need it to be fast. I thought of r=(1ULL<<n)-1; but it doesn't work for n=64, because << is only defined for values of n up to 63.

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  • Macros to set and clear bits

    - by volting
    Im trying to write a few simple macros to simplify the task of setting and clearing bits which should be a simple task however I cant seem to get them to work correctly. #define SET_BIT(p,n) ((p) |= (1 << (n))) #define CLR_BIT(p,n) ((p) &= (~(1) << (n)))

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  • Setting last N bits in an array

    - by Martin
    I'm sure this is fairly simple, however I have a major mental block on it, so I need a little help here! I have an array of 5 integers, the array is already filled with some data. I want to set the last N bits of the array to be random noise. [int][int][int][int][int] set last 40 bits [unchanged][unchanged][unchanged][24 bits of old data followed 8 bits of randomness][all random] This is largely language agnostic, but I'm working in C# so bonus points for answers in C#

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  • Why does the right-shift operator produce a zero instead of a one?

    - by mrt181
    Hi, i am teaching myself java and i work through the exercises in Thinking in Java. On page 116, exercise 11, you should right-shift an integer through all its binary positions and display each position with Integer.toBinaryString. public static void main(String[] args) { int i = 8; System.out.println(Integer.toBinaryString(i)); int maxIterations = Integer.toBinaryString(i).length(); int j; for (j = 1; j < maxIterations; j++) { i >>= 1; System.out.println(Integer.toBinaryString(i)); } In the solution guide the output looks like this: 1000 1100 1110 1111 When i run this code i get this: 1000 100 10 1 What is going on here. Are the digits cut off? I am using jdk1.6.0_20 64bit. The book uses jdk1.5 32bit.

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  • Overwriting a range of bits in an integer in a generic way

    - by porgarmingduod
    Given two integers X and Y, I want to overwrite bits at position P to P+N. Example: int x = 0xAAAA; // 0b1010101010101010 int y = 0x0C30; // 0b0000110000110000 int result = 0xAC3A; // 0b1010110000111010 Does this procedure have a name? If I have masks, the operation is easy enough: int mask_x = 0xF00F; // 0b1111000000001111 int mask_y = 0x0FF0; // 0b0000111111110000 int result = (x & mask_x) | (y & mask_y); What I can't quite figure out is how to write it in a generic way, such as in the following generic C++ function: template<typename IntType> IntType OverwriteBits(IntType dst, IntType src, int pos, int len) { // If: // dst = 0xAAAA; // 0b1010101010101010 // src = 0x0C30; // 0b0000110000110000 // pos = 4 ^ // len = 8 ^------- // Then: // result = 0xAC3A; // 0b1010110000111010 } The problem is that I cannot figure out how to make the masks properly when all the variables, including the width of the integer, is variable. Does anyone know how to write the above function properly?

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  • Is It Worth Using Bitwise Operators In Methods?

    - by user1626141
    I am very new to Java (and programming in general, my previous experience is with ActionScript 2.0 and some simple JavaScript), and I am working my way slowly and methodically through Java: A Beginner's Guide by Herbert Schildt. It is an incredible book. For one thing, I finally understand more-or-less what bitwise operators (which I first encountered in ActionScript 2.0) do, and that they are more efficient than other methods for certain sums. My question is, is it more efficient to use a method that uses, say, a shift right, to perform all your divisions/2 (or divisions/even) for you in a large program with many calculations (in this case, a sprawling RPG), or is it more efficient to simply use standard mathematical operations because the compiler will optimise it all for you? Or, am I asking the wrong question entirely?

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