Search Results

Search found 2468 results on 99 pages for 'splattered bits'.

Page 1/99 | 1 2 3 4 5 6 7 8 9 10 11 12  | Next Page >

  • given two bits in a set of four, fine position of two other bits

    - by aaa
    hello I am working on a simple combinatorics part, and found that I need to recover position of two bits given position of other two bits in 4-bits srring. for example, (0,1) maps to (2,3), (0,2) to (1,3), etc. for a total of six combinations. My solution is to test bits using four nested ternary operators: ab is a four bit string, with two bits set. c = ((((ab & 1) ? (((ab & 2) ? ... ))) : 0) abc = ab | c recover the last bit in the same fashion from abc. can you think of a better way/more clever way? thanks

    Read the article

  • SQL Bits VII

    - by Tomaz.tsql
    I was very happy to dive in into SQL Bits VII. Several interesting presentations, interesting concepts, advices and most of all interesting people. Some things actually disturb me. 1. the outlook of all presentations. I would recommend to have standardized outlook of all presentations for each of the presenter. Meaning, to have a general rules of PPT design (fonts, views, etc.), general diagrams, pictures that can be used by everyone (something like techEd introduced as well as SQL PASS). 2. access...(read more)

    Read the article

  • SQL Bits X – Temporal Snapshot Fact Table Session Slide & Demos

    - by Davide Mauri
    Already 10 days has passed since SQL Bits X in London. I really enjoyed it! Those kind of events are great not only for the content but also to meet friends that – due to distance – is not possible to meet every day. Friends from PASS, SQL CAT, Microsoft, MVP and so on all in one place, drinking beers, whisky and having fun. A perfect mixture for a great learning and sharing experience! I’ve also enjoyed a lot delivering my session on Temporal Snapshot Fact Tables. Given that the subject is very specific I was not expecting a lot of attendees….but I was totally wrong! It seems that the problem of handling daily snapshot of data is more common than what I expected. I’ve also already had feedback from several attendees that applied the explained technique to their existing solution with success. This is just what a speaker in such conference wish to hear! :) If you want to take a look at the slides and the demos, you can find them on SkyDrive: https://skydrive.live.com/redir.aspx?cid=377ea1391487af21&resid=377EA1391487AF21!1151&parid=root The demo is available both for SQL Sever 2008 and for SQL Server 2012. With this last version, you can also simplify the ETL process using the new LEAD analytic function. (This is not done in the demo, I’ve left this option as a little exercise for you :) )

    Read the article

  • Vmware Player 3.0 - cannot ping 32 bits guest from 64 bits (guest or host)

    - by npmj
    I'm stuck with what seems a bug in VmWare Player (build 203739). I'm using W7 Ultimate 64bits as host and have a CentOS 5.4 (64 bits) as a guest and a Windows XP Professional SP3 (32 bits) as another guest. From the 64 bits machines (the host and the linux guest) I cannot ping the windows XP. Off course, I already turned off the windows firewall in the guest and also in the host. The network is pretty basic, I'm using Vmnet8 (NAT), with DHCP and port forwarding (to the windows XP's IP). Everything is working ok, I have internet access from host and from both guests. Port forwarding to the XP guest is working ok too. The only problem is that I cannot access the XP guest through the Vmnet8. I monitored the traffic using wireshark (in the host and in the windows guest). If I try to ping the XP guest from the host, what I see is the ARP request leaving the host, being answered by the guest and, after that, there is no echo request leaving the host. The same occurs if I try to ping the XP from the CentOs guest. From the windows XP guest I can ping both the host and the CentOs guest. From the XP guest I can access the host shares. Obviously, from the host I cannot see the XP shares (as I cannot even ping the guest). I want to maintain this setup (using NAT to share the host's internet connection). Any suggestions?

    Read the article

  • Vmware Player 3.0 - cannot ping 32 bits guest from 64 bits (guest or host)

    - by npmj
    I'm stuck with what seems a bug in VmWare Player (build 203739). I'm using W7 Ultimate 64bits as host and have a CentOS 5.4 (64 bits) as a guest and a Windows XP Professional SP3 (32 bits) as another guest. From the 64 bits machines (the host and the linux guest) I cannot ping the windows XP. Off course, I already turned off the windows firewall in the guest and also in the host. The network is pretty basic, I'm using Vmnet8 (NAT), with DHCP and port forwarding (to the windows XP's IP). Everything is working ok, I have internet access from host and from both guests. Port forwarding to the XP guest is working ok too. The only problem is that I cannot access the XP guest through the Vmnet8. I monitored the traffic using wireshark (in the host and in the windows guest). If I try to ping the XP guest from the host, what I see is the ARP request leaving the host, being answered by the guest and, after that, there is no echo request leaving the host. The same occurs if I try to ping the XP from the CentOs guest. From the windows XP guest I can ping both the host and the CentOs guest. From the XP guest I can access the host shares. Obviously, from the host I cannot see the XP shares (as I cannot even ping the guest). I want to maintain this setup (using NAT to share the host's internet connection). Any suggestions?

    Read the article

  • Strip parity bits in C from 8 bits of data followed by 1 parity bit

    - by dubnde
    I have a buffer of bits with 8 bits of data followed by 1 parity bit. This pattern repeats itself. The buffer is currently stored as an array of octets. Example (p are parity bits): 0001 0001 p000 0100 0p00 0001 00p01 1100 ... should become 0001 0001 0000 1000 0000 0100 0111 00 ... Basically, I need to strip of every ninth bit to just obtain the data bits. How can I achieve this? This is related to another question asked here sometime back. This is on a 32 bit machine so the solution to the related question may not be applicable. The maximum possible number of bits is 45 i.e. 5 data octets This is what I have tried so far. I have created a "boolean" array and added the bits into the array based on the the bitset of the octet. I then look at every ninth index of the array and through it away. Then move the remaining array down one index. Then I've got only the data bits left. I was thinking there may be better ways of doing this.

    Read the article

  • BITS client fails to specify HTTP Range header

    - by user256890
    Our system is designed to deploy to regions with unreliable and/or insufficient network connections. We build our own fault tolerating data replication services that uses BITS. Due to some security and maintenance requirements, we implemented our own ASP.NET file download service on the server side, instead of just letting IIS serving up the files. When BITS client makes an HTTP download request with the specified range of the file, our ASP.NET page pulls the demanded file segment into memory and serve that up as the HTTP response. That is the theory. ;) This theory fails in artificial lab scenarios but I would not let the system deploy in real life scenarios unless we can overcome that. Lab scenario: I have BITS client and the IIS on the same developer machine, so practically I have enormous network "bandwidth" and BITS is intelligent enough to detect that. As BITS client discovers the unlimited bandwidth, it gets more and more "greedy". At each HTTP request, BITS wants to grasp greater and greater file ranges (we are talking about downloading CD iso files, videos), demanding 20-40MB inside a single HTTP request, a size that I am not comfortable to pull into memory on the server side as one go. I can overcome that simply by giving less than demanded. It is OK. However, BITS gets really "confident" and "arrogant" demanding files WITHOUT specifying the download range, i.e., it wants the entire file in a single request, and this is where things go wrong. I do not know how to answer that response in the case of a 600MB file. If I just provide the starting 1MB range of the file, BITS client keeps sending HTTP requests for the same file without download range to continue, it hammers its point that it wants the entire file in one go. Since I am reluctant to provide the entire file, BITS gives up after several trials and reports error. Any thoughts?

    Read the article

  • BITS http download job fails to connect for owner Local SYSTEM account

    - by MikeT
    A service I have written that uses BITS (Background Intelligent Transfer Service) to auto update itself is having a problem on some machines (Windows 7 so far). I have been investigating and have discovered that some of the jobs that my service adds to the bits queue are failing immediately with the error code 0x80072efd (a connection with this server could not be established). The is not problem with connecting to the server for the download as it works fine on the same machine using IE (or any other web browser) and other clients can connect and update from the same server. I tried using the BITSADMIN.exe tool to add the jobs manually and they worked ok. I then changed the account my service was running under to the network service account so the bits jobs would be created with a different owner and the jobs completed successfully. My question is I don't want to run my service as this account as it wont have the required local permissions, so how to I change the permissions of the local system user to allow it to download from the HTTP source, I'm not aware of any way of this being restricted for this account but it obviously is.

    Read the article

  • BITS, TakeOwnership, and Kerberos / Windows Integrated Authentication

    - by Charlie Flowers
    We're using BITS to upload files from machines in our retail locations to our servers. BITS will stop transferring a file if the user who owns the BITS job logs off. Therefore, we're using a Windows Service running as LocalSystem to submit the jobs to BITS and be the job owner. This allows transfers to continue 24/7. However, it raises a question about authentication. We want the BITS server extensions in IIS to use Kerberos to authenticate the client machine. As far as I can tell, that leaves us with only 2 options, both of which are not ideal: Either we create an "ImageUploader" account and store its username/password in a config file that the Windows Service uses as credentials for the BITS job, or we ask the logged on user who creates the BITS job for his password, and then use his credentials for the BITS job. I guess the third option is not to use Kerberos, and maybe go with Basic Auth plus SSL. I'm sure I'm wrong and there's a better option. Is there? Thanks in advance.

    Read the article

  • C question: Padding bits in unsigned integers and bitwise operations (C89)

    - by Anonymous Question Guy
    I have a lot of code that performs bitwise operations on unsigned integers. I wrote my code with the assumption that those operations were on integers of fixed width without any padding bits. For example an array of 32 bit unsigned integers of which all 32 bits available for each integer. I'm looking to make my code more portable and I'm focused on making sure I'm C89 compliant (in this case). One of the issues that I've come across is possible padded integers. Take this extreme example, taken from the GMP manual: However on Cray vector systems it may be noted that short and int are always stored in 8 bytes (and with sizeof indicating that) but use only 32 or 46 bits. The nails feature can account for this, by passing for instance 8*sizeof(int)-INT_BIT. I've also read about this type of padding in other places. I actually read of a post on SO last night (forgive me, I don't have the link and I'm going to cite something similar from memory) where if you have, say, a double with 60 usable bits the other 4 could be used for padding and those padding bits could serve some internal purpose so they cannot be modified. So let's say for example my code is compiled on a platform where an unsigned int type is sized at 4 bytes, each byte being 8 bits, however the most significant 2 bits are padding bits. Would UINT_MAX in that case be 0x3FFFFFFF (1073741823) ? #include <stdio.h> #include <stdlib.h> /* padding bits represented by underscores */ int main( int argc, char **argv ) { unsigned int a = 0x2AAAAAAA; /* __101010101010101010101010101010 */ unsigned int b = 0x15555555; /* __010101010101010101010101010101 */ unsigned int c = a ^ b; /* ?? __111111111111111111111111111111 */ unsigned int d = c << 5; /* ?? __111111111111111111111111100000 */ unsigned int e = d >> 5; /* ?? __000001111111111111111111111111 */ printf( "a: %X\nb: %X\nc: %X\nd: %X\ne: %X\n", a, b, c, d, e ); return 0; } is it safe to XOR two integers with padding bits? wouldn't I XOR whatever the padding bits are? I can't find this behavior covered in C89. furthermore is the c var guaranteed to be 0x3FFFFFFF or if for example the two padding bits were both on in a or b would c be 0xFFFFFFFF ? same question with d and e. am i manipulating the padding bits by shifting? I would expect to see this below, assuming 32 bits with the 2 most significant bits used for padding, but I want to know if something like this is guaranteed: a: 2AAAAAAA b: 15555555 c: 3FFFFFFF d: 3FFFFFE0 e: 01FFFFFF Also are padding bits always the most significant bits or could they be the least significant bits? Thanks guys EDIT 12/19/2010 5PM EST: Christoph has answered my question. Thanks! I had also asked (above) whether padding bits are always the most significant bits. This is cited in the rationale for the C99 standard, and the answer is no. I am playing it safe and assuming the same for C89. Here is specifically what the C99 rationale says for §6.2.6.2 (Representation of Integer Types): Padding bits are user-accessible in an unsigned integer type. For example, suppose a machine uses a pair of 16-bit shorts (each with its own sign bit) to make up a 32-bit int and the sign bit of the lower short is ignored when used in this 32-bit int. Then, as a 32-bit signed int, there is a padding bit (in the middle of the 32 bits) that is ignored in determining the value of the 32-bit signed int. But, if this 32-bit item is treated as a 32-bit unsigned int, then that padding bit is visible to the user’s program. The C committee was told that there is a machine that works this way, and that is one reason that padding bits were added to C99. Footnotes 44 and 45 mention that parity bits might be padding bits. The committee does not know of any machines with user-accessible parity bits within an integer. Therefore, the committee is not aware of any machines that treat parity bits as padding bits. EDIT 12/28/2010 3PM EST: I found an interesting discussion on comp.lang.c from a few months ago. Bitwise Operator Effects on Padding Bits (VelocityReviews reader) Bitwise Operator Effects on Padding Bits (Google Groups alternate link) One point made by Dietmar which I found interesting: Let's note that padding bits are not necessary for the existence of trap representations; combinations of value bits which do not represent a value of the object type would also do.

    Read the article

  • C# Convert negative int to 11 bits

    - by Klemenko
    I need to convert numbers in interval [–1024, 1016]. I'm converting to 11 bits like that: string s = Convert.ToString(value, 2); //Convert to binary in a string int[] bits = s.PadLeft(11, '0') // Add 0's from left .Select(c => int.Parse(c.ToString())) // convert each char to int .ToArray(); // Convert IEnumerable from select to Array This works perfectly for signed integers [0, 1016]. But for negative integers I get 32 bits result. Do you have any idea how to convert negative integers to 11 bits array?

    Read the article

  • Inserting bits into byte

    - by JB_SO
    I was looking at an example of reading bits from a byte and the implementation looked simple and easy to understand. I was wondering if anyone has a similar example of how to insert bits into a byte or byte array, that is easier to understand and also implement like the example below. Here is the example I found of reading bits from a byte (http://bytes.com/topic/c-sharp/answers/505085-reading-bits-byte-file): static int GetBits3(byte b, int offset, int count) { return (b >> offset) & ((1 << count) - 1); } Here is what i'm trying to do....and this is my current implementation.....just a little confused with the bit-masking/shifting, etc, that's why I'm trying to find out if there is an easier way to do what i'm doing BYTE Msg[2]; Msg_Id = 3; Msg_Event = 1; Msg_Ready = 2; Msg[0] = ( ( Msg_Event << 4 ) & 0xF0 ) | ( Msg_Id & 0x0F ) ; Msg[1] = Msg_Ready & 0x0F; //MsgReady & Unused Thanks for your help!

    Read the article

  • How can you configure or extend BITS (Background Intelligent Transfer Service) to read files from a

    - by Mark
    I have a ASP .NET load balanced application (webservice and website). It runs on SQL server. I need to be able to provide large files for download. However, because of the load balancing situation, the files are stored in the SQL database as opposed to the file system. BITS seems to be the best approach. I have full control of the client. However, i don't know how to configure BITS to read the file from the database. I know how to write the C# code for that, but i don't know how to get BITS to hook into it as opposed to reading the file from the file system. Any ideas?

    Read the article

  • NEC uPD720200 USB 3.0 not working on Ubuntu 12.04

    - by Jagged
    I've recently installed Ubuntu 12.04 64-bit on a HP Envy 15 1104tx. Most stuff appears to be working fine with the exception of the two USB3 ports (USB2 port works fine). I've read a lot of articles but so far have not been able to find a solution. I've tried adding 'pci=nomsi' to '/etc/default/grub' but this made no difference. Some articles suggest booting into Windows and upgrading the firmware on the uPD720200. Any body had any experience of this? Is there a way I can checked the firmware version of the NEC uPD720200 in Linux to see if there is an update available? Any help appreciated. uname -a: Linux HP-ENVY-15-1104tx 3.2.0-26-generic #41-Ubuntu SMP Thu Jun 14 17:49:24 UTC 2012 x86_64 x86_64 x86_64 GNU/Linux lshw: hp-envy-15-1104tx description: Notebook product: HP ENVY 15 Notebook PC (WF591PA#ABG) vendor: Hewlett-Packard version: 0492110000241910001420000 serial: CNF0301C79 width: 64 bits capabilities: smbios-2.6 dmi-2.6 vsyscall32 configuration: boot=normal chassis=notebook family=103C_5335KV sku=WF591PA#ABG uuid=434E4630-3330-3143-3739-60EB6906688F *-core description: Motherboard product: 1522 vendor: Hewlett-Packard physical id: 0 version: 36.35 serial: CNF0301C79 slot: Base Board Chassis Location *-firmware description: BIOS vendor: Hewlett-Packard physical id: 0 version: F.2B date: 10/12/2010 size: 1MiB capacity: 1472KiB capabilities: pci upgrade shadowing cdboot bootselect edd int13floppynec int13floppytoshiba int13floppy360 int13floppy1200 int13floppy720 int13floppy2880 int9keyboard int10video acpi usb biosbootspecification *-memory description: System Memory physical id: 13 slot: System board or motherboard size: 16GiB *-bank:0 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: 9905428-043.A00LF physical id: 0 serial: E13C4316 slot: Bottom size: 4GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:1 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: 9905428-043.A00LF physical id: 1 serial: E03C3E16 slot: Bottom size: 4GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:2 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: 9905428-043.A00LF physical id: 2 serial: 672279CC slot: On Board size: 4GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:3 description: SODIMM DDR3 Synchronous 1333 MHz (0.8 ns) product: 9905428-043.A00LF physical id: 3 serial: 652286CC slot: On Board size: 4GiB width: 64 bits clock: 1333MHz (0.8ns) *-cpu description: CPU product: Intel(R) Core(TM) i7 CPU Q 820 @ 1.73GHz vendor: Intel Corp. physical id: 1d bus info: cpu@0 version: Intel(R) Core(TM) i7 CPU Q 820 @ 1.73GHz slot: CPU size: 1199MHz capacity: 1199MHz width: 64 bits clock: 1066MHz capabilities: x86-64 fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm ida tpr_shadow vnmi flexpriority ept vpid cpufreq configuration: cores=4 enabledcores=4 threads=8 *-cache:0 description: L3 cache physical id: 1e slot: L3 Cache size: 8MiB capacity: 8MiB capabilities: synchronous internal write-through unified *-cache:1 description: L2 cache physical id: 20 slot: L2 Cache size: 256KiB capacity: 256KiB capabilities: synchronous internal write-through unified *-cache:2 description: L1 cache physical id: 21 slot: L1 Cache size: 32KiB capacity: 32KiB capabilities: synchronous internal write-through instruction *-cache description: L1 cache physical id: 1f slot: L1 Cache size: 32KiB capacity: 32KiB capabilities: synchronous internal write-through data *-pci:0 description: Host bridge product: Core Processor DMI vendor: Intel Corporation physical id: 100 bus info: pci@0000:00:00.0 version: 11 width: 32 bits clock: 33MHz *-pci:0 description: PCI bridge product: Core Processor PCI Express Root Port 1 vendor: Intel Corporation physical id: 3 bus info: pci@0000:00:03.0 version: 11 width: 32 bits clock: 33MHz capabilities: pci msi pciexpress pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:16 ioport:4000(size=4096) memory:d4100000-d41fffff ioport:c0000000(size=268435456) *-display description: VGA compatible controller product: Broadway PRO [Mobility Radeon HD 5800 Series] vendor: Hynix Semiconductor (Hyundai Electronics) physical id: 0 bus info: pci@0000:01:00.0 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi vga_controller bus_master cap_list rom configuration: driver=fglrx_pci latency=0 resources: irq:58 memory:c0000000-cfffffff memory:d4100000-d411ffff ioport:4000(size=256) memory:d4140000-d415ffff *-multimedia description: Audio device product: Juniper HDMI Audio [Radeon HD 5700 Series] vendor: Hynix Semiconductor (Hyundai Electronics) physical id: 0.1 bus info: pci@0000:01:00.1 version: 00 width: 64 bits clock: 33MHz capabilities: pm pciexpress msi bus_master cap_list configuration: driver=snd_hda_intel latency=0 resources: irq:56 memory:d4120000-d4123fff *-pci:1 description: PCI bridge product: Core Processor PCI Express Root Port 3 vendor: Intel Corporation physical id: 5 bus info: pci@0000:00:05.0 version: 11 width: 32 bits clock: 33MHz capabilities: pci msi pciexpress pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:16 memory:d4000000-d40fffff *-usb description: USB controller product: uPD720200 USB 3.0 Host Controller vendor: NEC Corporation physical id: 0 bus info: pci@0000:02:00.0 version: 03 width: 64 bits clock: 33MHz capabilities: pm msi msix pciexpress xhci bus_master cap_list configuration: driver=xhci_hcd latency=0 resources: irq:16 memory:d4000000-d4001fff *-generic:0 UNCLAIMED description: System peripheral product: Core Processor System Management Registers vendor: Intel Corporation physical id: 8 bus info: pci@0000:00:08.0 version: 11 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:1 UNCLAIMED description: System peripheral product: Core Processor Semaphore and Scratchpad Registers vendor: Intel Corporation physical id: 8.1 bus info: pci@0000:00:08.1 version: 11 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:2 UNCLAIMED description: System peripheral product: Core Processor System Control and Status Registers vendor: Intel Corporation physical id: 8.2 bus info: pci@0000:00:08.2 version: 11 width: 32 bits clock: 33MHz capabilities: pciexpress cap_list configuration: latency=0 *-generic:3 UNCLAIMED description: System peripheral product: Core Processor Miscellaneous Registers vendor: Intel Corporation physical id: 8.3 bus info: pci@0000:00:08.3 version: 11 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:4 UNCLAIMED description: System peripheral product: Core Processor QPI Link vendor: Intel Corporation physical id: 10 bus info: pci@0000:00:10.0 version: 11 width: 32 bits clock: 33MHz configuration: latency=0 *-generic:5 UNCLAIMED description: System peripheral product: Core Processor QPI Routing and Protocol Registers vendor: Intel Corporation physical id: 10.1 bus info: pci@0000:00:10.1 version: 11 width: 32 bits clock: 33MHz configuration: latency=0 *-multimedia description: Audio device product: 5 Series/3400 Series Chipset High Definition Audio vendor: Intel Corporation physical id: 1b bus info: pci@0000:00:1b.0 version: 05 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list configuration: driver=snd_hda_intel latency=0 resources: irq:55 memory:d4200000-d4203fff *-pci:2 description: PCI bridge product: 5 Series/3400 Series Chipset PCI Express Root Port 1 vendor: Intel Corporation physical id: 1c bus info: pci@0000:00:1c.0 version: 05 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:17 ioport:3000(size=4096) memory:d3000000-d3ffffff ioport:d0000000(size=16777216) *-network description: Wireless interface product: Centrino Advanced-N 6200 vendor: Intel Corporation physical id: 0 bus info: pci@0000:03:00.0 logical name: wlan0 version: 35 serial: 00:27:10:40:e4:68 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list ethernet physical wireless configuration: broadcast=yes driver=iwlwifi driverversion=3.2.0-26-generic firmware=9.221.4.1 build 25532 latency=0 link=no multicast=yes wireless=IEEE 802.11abgn resources: irq:54 memory:d3000000-d3001fff *-pci:3 description: PCI bridge product: 5 Series/3400 Series Chipset PCI Express Root Port 2 vendor: Intel Corporation physical id: 1c.1 bus info: pci@0000:00:1c.1 version: 05 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:16 ioport:2000(size=4096) memory:d2000000-d2ffffff ioport:d1000000(size=16777216) *-network description: Ethernet interface product: AR8131 Gigabit Ethernet vendor: Atheros Communications Inc. physical id: 0 bus info: pci@0000:04:00.0 logical name: eth0 version: c0 serial: 60:eb:69:06:68:8f size: 1Gbit/s capacity: 1Gbit/s width: 64 bits clock: 33MHz capabilities: pm msi pciexpress vpd bus_master cap_list ethernet physical tp 10bt 10bt-fd 100bt 100bt-fd 1000bt-fd autonegotiation configuration: autonegotiation=on broadcast=yes driver=atl1c driverversion=1.0.1.0-NAPI duplex=full firmware=N/A ip=10.161.0.147 latency=0 link=yes multicast=yes port=twisted pair speed=1Gbit/s resources: irq:57 memory:d2000000-d203ffff ioport:2000(size=128) *-usb description: USB controller product: 5 Series/3400 Series Chipset USB2 Enhanced Host Controller vendor: Intel Corporation physical id: 1d bus info: pci@0000:00:1d.0 version: 05 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:20 memory:d4205800-d4205bff *-pci:4 description: PCI bridge product: 82801 Mobile PCI Bridge vendor: Intel Corporation physical id: 1e bus info: pci@0000:00:1e.0 version: a5 width: 32 bits clock: 33MHz capabilities: pci subtractive_decode bus_master cap_list *-isa description: ISA bridge product: Mobile 5 Series Chipset LPC Interface Controller vendor: Intel Corporation physical id: 1f bus info: pci@0000:00:1f.0 version: 05 width: 32 bits clock: 33MHz capabilities: isa bus_master cap_list configuration: latency=0 *-storage description: RAID bus controller product: 82801 Mobile SATA Controller [RAID mode] vendor: Intel Corporation physical id: 1f.2 bus info: pci@0000:00:1f.2 logical name: scsi0 version: 05 width: 32 bits clock: 66MHz capabilities: storage msi pm bus_master cap_list emulated configuration: driver=ahci latency=0 resources: irq:45 ioport:5048(size=8) ioport:5054(size=4) ioport:5040(size=8) ioport:5050(size=4) ioport:5020(size=32) memory:d4205000-d42057ff *-disk description: ATA Disk product: OCZ-VERTEX3 physical id: 0.0.0 bus info: scsi@0:0.0.0 logical name: /dev/sda version: 2.15 serial: OCZ-0350P6H316X5KUQE size: 223GiB (240GB) capabilities: partitioned partitioned:dos configuration: ansiversion=5 signature=000592dd *-volume:0 description: EXT4 volume vendor: Linux physical id: 1 bus info: scsi@0:0.0.0,1 logical name: /dev/sda1 logical name: / version: 1.0 serial: e741f18c-cfc5-4bce-b1e7-f80e517a3a22 size: 207GiB capacity: 207GiB capabilities: primary bootable journaled extended_attributes large_files huge_files dir_nlink recover extents ext4 ext2 initialized configuration: created=2012-06-15 06:49:27 filesystem=ext4 lastmountpoint=/ modified=2012-06-14 21:23:42 mount.fstype=ext4 mount.options=rw,relatime,errors=remount-ro,user_xattr,barrier=1,data=ordered mounted=2012-07-10 16:18:20 state=mounted *-volume:1 description: Extended partition physical id: 2 bus info: scsi@0:0.0.0,2 logical name: /dev/sda2 size: 15GiB capacity: 15GiB capabilities: primary extended partitioned partitioned:extended *-logicalvolume description: Linux swap / Solaris partition physical id: 5 logical name: /dev/sda5 capacity: 15GiB capabilities: nofs *-serial UNCLAIMED description: SMBus product: 5 Series/3400 Series Chipset SMBus Controller vendor: Intel Corporation physical id: 1f.3 bus info: pci@0000:00:1f.3 version: 05 width: 64 bits clock: 33MHz configuration: latency=0 resources: memory:d4205c00-d4205cff ioport:5000(size=32) *-pci:1 description: Host bridge product: Core Processor QuickPath Architecture Generic Non-Core Registers vendor: Intel Corporation physical id: 101 bus info: pci@0000:ff:00.0 version: 04 width: 32 bits clock: 33MHz *-pci:2 description: Host bridge product: Core Processor QuickPath Architecture System Address Decoder vendor: Intel Corporation physical id: 102 bus info: pci@0000:ff:00.1 version: 04 width: 32 bits clock: 33MHz *-pci:3 description: Host bridge product: Core Processor QPI Link 0 vendor: Intel Corporation physical id: 103 bus info: pci@0000:ff:02.0 version: 04 width: 32 bits clock: 33MHz *-pci:4 description: Host bridge product: Core Processor QPI Physical 0 vendor: Intel Corporation physical id: 104 bus info: pci@0000:ff:02.1 version: 04 width: 32 bits clock: 33MHz *-pci:5 description: Host bridge product: Core Processor Integrated Memory Controller vendor: Intel Corporation physical id: 105 bus info: pci@0000:ff:03.0 version: 04 width: 32 bits clock: 33MHz *-pci:6 description: Host bridge product: Core Processor Integrated Memory Controller Target Address Decoder vendor: Intel Corporation physical id: 106 bus info: pci@0000:ff:03.1 version: 04 width: 32 bits clock: 33MHz *-pci:7 description: Host bridge product: Core Processor Integrated Memory Controller Test Registers vendor: Intel Corporation physical id: 107 bus info: pci@0000:ff:03.4 version: 04 width: 32 bits clock: 33MHz *-pci:8 description: Host bridge product: Core Processor Integrated Memory Controller Channel 0 Control Registers vendor: Intel Corporation physical id: 108 bus info: pci@0000:ff:04.0 version: 04 width: 32 bits clock: 33MHz *-pci:9 description: Host bridge product: Core Processor Integrated Memory Controller Channel 0 Address Registers vendor: Intel Corporation physical id: 109 bus info: pci@0000:ff:04.1 version: 04 width: 32 bits clock: 33MHz *-pci:10 description: Host bridge product: Core Processor Integrated Memory Controller Channel 0 Rank Registers vendor: Intel Corporation physical id: 10a bus info: pci@0000:ff:04.2 version: 04 width: 32 bits clock: 33MHz *-pci:11 description: Host bridge product: Core Processor Integrated Memory Controller Channel 0 Thermal Control Registers vendor: Intel Corporation physical id: 10b bus info: pci@0000:ff:04.3 version: 04 width: 32 bits clock: 33MHz *-pci:12 description: Host bridge product: Core Processor Integrated Memory Controller Channel 1 Control Registers vendor: Intel Corporation physical id: 10c bus info: pci@0000:ff:05.0 version: 04 width: 32 bits clock: 33MHz *-pci:13 description: Host bridge product: Core Processor Integrated Memory Controller Channel 1 Address Registers vendor: Intel Corporation physical id: 10d bus info: pci@0000:ff:05.1 version: 04 width: 32 bits clock: 33MHz *-pci:14 description: Host bridge product: Core Processor Integrated Memory Controller Channel 1 Rank Registers vendor: Intel Corporation physical id: 10e bus info: pci@0000:ff:05.2 version: 04 width: 32 bits clock: 33MHz *-pci:15 description: Host bridge product: Core Processor Integrated Memory Controller Channel 1 Thermal Control Registers vendor: Intel Corporation physical id: 10f bus info: pci@0000:ff:05.3 version: 04 width: 32 bits clock: 33MHz *-battery description: Lithium Ion Battery product: NK06053 vendor: SMP-ATL24 physical id: 1 slot: Primary capacity: 4800mWh configuration: voltage=11.1V lspci: 02:00.0 USB controller: NEC Corporation uPD720200 USB 3.0 Host Controller (rev 03) (prog-if 30 [XHCI]) Subsystem: Hewlett-Packard Company Device 1522 Flags: bus master, fast devsel, latency 0, IRQ 16 Memory at d4000000 (64-bit, non-prefetchable) [size=8K] Capabilities: [50] Power Management version 3 Capabilities: [70] MSI: Enable- Count=1/8 Maskable- 64bit+ Capabilities: [90] MSI-X: Enable+ Count=8 Masked- Capabilities: [a0] Express Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting Capabilities: [140] Device Serial Number ff-ff-ff-ff-ff-ff-ff-ff Capabilities: [150] Latency Tolerance Reporting Kernel driver in use: xhci_hcd lsusb (with thumb drive plugged into USB3 port): Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 003 Device 001: ID 1d6b:0003 Linux Foundation 3.0 root hub Bus 001 Device 002: ID 8087:0020 Intel Corp. Integrated Rate Matching Hub Bus 001 Device 003: ID 5986:01d0 Acer, Inc Bus 001 Device 004: ID 03f0:231d Hewlett-Packard

    Read the article

  • which tile size to choice for 16-bits [on hold]

    - by billy
    Before I make my 16-bits game, I want to clear some stuff up so I dont run into problems later. first question: when making a 16-bits game all i need to do is have 16-bit sprites image(.png or .jpg)? and for 8-bits it is .gif 2nd question is: which tile size is good for 16-bits or it doesnt matter? Right now I am using 30x30 pixels for map tile set. and 40x40 pixels for player, enemies etc.. 3rd question is: what is screen size for 16-bits in most games? I am using 640x480 pixels.

    Read the article

  • why is 64 bits version called AMD64 and 32 bits version called i386?

    - by ajsie
    I have never understood this. This is what i know: 64 bits OS if you want to handle more than 2GB RAM. Else, 32 bits OS. So on Ubuntu's homepage you can download either 64 bits or 32 bits. But the 64 bits is called amd64 and the 32 bits is called i386. So i have to have a AMD processor to run amd64? And intel to run i386? And if someone codes a software (lets say Apache). Does he have to code one 32 bits and one 64 bits? Do some softwares only exist for 32 and not 64 and vice versa? Thanks in advance!

    Read the article

  • Swap bits in c++ for a double

    - by hidayat
    Im trying to change from big endian to little endian on a double. One way to go is to use double val, tmp = 5.55; ((unsigned int *)&val)[0] = ntohl(((unsigned int *)&tmp)[1]); ((unsigned int *)&val)[1] = ntohl(((unsigned int *)&tmp)[0]); But then I get a warning: "dereferencing type-punned pointer will break strict-aliasing rules" and I dont want to turn this warning off. Another way to go is: #define ntohll(x) ( ( (uint64_t)(ntohl( (uint32_t)((x << 32) >> 32) )) << 32) | ntohl( ((uint32_t)(x >> 32)) ) ) val = (double)bswap_64(unsigned long long(tmp)); //or val = (double)ntohll(unsigned long long(tmp)); But then a lose the decimals. Anyone know a good way to swap the bits on a double without using a for loop?

    Read the article

  • Vista 64-bits development tools

    - by Workshop Alex
    Well, okay. There's Visual Studio 2008 and Embarcadero Delphi/Studio that are both able to create 64-bits .NET applications for Vista. And of course a lot of 32-bits applications will run on 64-bits Vista. If not, it's always possible to install VMWare to create a virtual 32-bits Windows XP system to run 32-bits applications. So, plenty of options. But what I would like to see is a list of true 64-bits applications for Windows Vista and better. So if you know any useful 64-bits product, please share! (Especially compilers that generate native 64-bits code.) Tools would basically be anything that would make development a bit easier. Thus, debugging tools, image processing tools to create icons and bitmaps, hex editors to check the contents of binary files, XML editors to change XML files, etc. The tools from SysInternals, for example, seem to provide 64-bits versions or even support 64-bits systems natively. But how about all those other editors, viewers, browsers and other tools that we developers like to use? A 64-bits version of the Norton Commander/Midnight Commander or other file managers would be nice too. And with compilers, how about COBOL/ForTran/ADA/SmallTalk/Lisp/Whatever compiler/languages for Vista? I would just like to see a complete list of anything useful for 64-bits development.

    Read the article

  • Thinktecture.IdentityModel.Http and the ASP.NET Web API CodePlex bits

    - by Your DisplayName here!
    I will keep the github repo in sync with the major releases of Web API (like Beta, RC, RTM). Because of the changes made to Web API after beta, my current bits don’t build against the CodePlex version anymore. Today I installed a build environment for the CodePlex bits, and migrated my code. It turns out the changes are pretty easy: Simply replace Request.GetUserPrincipal() with Thread.CurrentPrincipal ;) I will update the repo when RC comes out.

    Read the article

  • Transfer file using BITS without using IIS on one end?

    - by rwmnau
    I know that I can transfer files using BITS and a wrapper like SharpBITS, but it seems that I need an IIS server on one end - either to upload to or download from. Is there a way to use the BITS protocol to transfer a file without requiring IIS? Some kind of a "BITS Server" or "Listener" project that my client's BITS service can connect to. I'm looking for functionality that's exactly what BITS provides, but I'd prefer not to require that IIS be installed (though if I have to, I can). Thanks!

    Read the article

  • Transfer file using BITS without using IIS as the server?

    - by rwmnau
    I know that I can transfer files using BITS and a wrapper like SharpBITS, but it seems that I need an IIS server on one end - either to upload to or download from. Is there a way to use the BITS protocol to transfer a file without requiring IIS? Some kind of a "BITS Server" or "Listener" project that my client's BITS service can connect to. I'm looking for functionality that's exactly what BITS provides, but I'd prefer not to require that IIS be installed (though if I have to, I can). Thanks!

    Read the article

  • lshw tells me my processor is a 64 bits but my motherboard has a 32 bits width

    - by bpetit
    Recently I noticed lshw tells me a strange thing. Here is the first part of my lshw output: bpetit-1025c description: Notebook product: 1025C (1025C) vendor: ASUSTeK COMPUTER INC. version: x.x serial: C3OAAS000774 width: 32 bits capabilities: smbios-2.7 dmi-2.7 smp-1.4 smp configuration: boot=normal chassis=notebook cpus=2 family=Eee PC... *-core description: Motherboard product: 1025C vendor: ASUSTeK COMPUTER INC. physical id: 0 version: x.xx serial: EeePC-0123456789 slot: To be filled by O.E.M. *-firmware description: BIOS vendor: American Megatrends Inc. physical id: 0 version: 1025C.0701 date: 01/06/2012 size: 64KiB capacity: 1984KiB capabilities: pci upgrade shadowing cdboot bootselect socketedrom edd... *-cpu:0 description: CPU product: Intel(R) Atom(TM) CPU N2800 @ 1.86GHz vendor: Intel Corp. physical id: 4 bus info: cpu@0 version: 6.6.1 serial: 0003-0661-0000-0000-0000-0000 slot: CPU 1 size: 798MHz capacity: 1865MHz width: 64 bits clock: 533MHz capabilities: x86-64 boot fpu fpu_exception wp vme de pse tsc ... configuration: cores=2 enabledcores=1 id=2 threads=2 *-cache:0 description: L1 cache physical id: 5 slot: L1-Cache size: 24KiB capacity: 24KiB capabilities: internal write-back unified *-cache:1 description: L2 cache physical id: 6 slot: L2-Cache size: 512KiB capacity: 512KiB capabilities: internal varies unified *-logicalcpu:0 description: Logical CPU physical id: 2.1 width: 64 bits capabilities: logical *-logicalcpu:1 description: Logical CPU physical id: 2.2 width: 64 bits capabilities: logical *-logicalcpu:2 description: Logical CPU physical id: 2.3 width: 64 bits capabilities: logical *-logicalcpu:3 description: Logical CPU physical id: 2.4 width: 64 bits capabilities: logical *-memory description: System Memory physical id: 13 slot: System board or motherboard size: 2GiB *-bank:0 description: SODIMM [empty] product: [Empty] vendor: [Empty] physical id: 0 serial: [Empty] slot: DIMM0 *-bank:1 description: SODIMM DDR3 Synchronous 1066 MHz (0.9 ns) product: SSZ3128M8-EAEEF vendor: Xicor physical id: 1 serial: 00000004 slot: DIMM1 size: 2GiB width: 64 bits clock: 1066MHz (0.9ns) *-cpu:1 physical id: 1 bus info: cpu@1 version: 6.6.1 serial: 0003-0661-0000-0000-0000-0000 size: 798MHz capacity: 798MHz capabilities: ht cpufreq configuration: id=2 *-logicalcpu:0 description: Logical CPU physical id: 2.1 capabilities: logical *-logicalcpu:1 description: Logical CPU physical id: 2.2 capabilities: logical *-logicalcpu:2 description: Logical CPU physical id: 2.3 capabilities: logical *-logicalcpu:3 description: Logical CPU physical id: 2.4 capabilities: logical So here I see my processor is effectively a 64 bits one. However, I'm wondering how my motherboard can have a "32 bits width". I've browsed the web to find an answer, without success. I imagine it's just a technical fact that I don't know about. Thanks.

    Read the article

1 2 3 4 5 6 7 8 9 10 11 12  | Next Page >