How to define clock input in Xilinx

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Published on 2010-05-03T14:22:55Z Indexed on 2010/05/03 14:28 UTC
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digital-logic

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xilinx

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homework

Hey, I have almost no experience with Xilinx. I have a group project for a Digital Logic course that is due soon, where my partner, who was supposed to take care of the Xilinx simulations decided to bail on me. So here I am trying to figure it out last minute.

I have designed a synchronous counter using a few JK Flip Flops and I need to define the CLK input for the FJKCs.

I have drawn up the correct schematic, but I cannot figure out how to define a clock input.

Any help appreciated, and yes, this is homework. I just can't find any basic xilinx documentation/tutorials online and I honestly don't have time to learn the whole IDE.

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