VHDL, using arithmetic & variables in "downto"?

Posted by waitinforatrain on Stack Overflow See other posts from Stack Overflow or by waitinforatrain
Published on 2010-05-08T02:58:09Z Indexed on 2010/05/08 3:08 UTC
Read the original article Hit count: 431

Filed under:

Hey,

Quick VHDL question, I don't have access to Xilinx at the moment due to dead laptop, so can't test this.

I was wondering if it's possible to use variables and arithmetic in 'downto' statements, e.g:

proc: process (x)
begin
  y <= z(x downto 0) & z(7 downto x);
end process;

Thanks.

© Stack Overflow or respective owner

Related posts about vhdl