VHDL, using arithmetic & variables in "downto"?
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Published on 2010-05-08T02:58:09Z
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2010/05/08
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vhdl
Hey,
Quick VHDL question, I don't have access to Xilinx at the moment due to dead laptop, so can't test this.
I was wondering if it's possible to use variables and arithmetic in 'downto' statements, e.g:
proc: process (x)
begin
y <= z(x downto 0) & z(7 downto x);
end process;
Thanks.
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