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  • Assign multiple css classes to a table element in Rails

    - by Eric K
    I'm trying to style a table row using both cycle and a helper, like shown: <tr class= <%= cycle("list-line-odd #{row_class(item)}", "list-line-even #{row_class(item)}")%> > However, when I do this, the resulting HTML is: <tr class = "list-line-odd" lowest-price> with the return from the helper method not enclosed in the quotes, and therefore not recognized. Here's the helper I'm using: def row_class(item) if item.highest_price > 0 and item.lowest_price > 0 and item.highest_price != item.lowest_price if item.current_price >= item.highest_price "highest-price" elsif item.current_price <= item.lowest_price "lowest-price" end end end I must be missing something obvious, but I just can't figure out how to wrap both the result of cycle and the helper method return in the same set of quotes. Any help would be greatly appreciated!

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  • Jquery Accordion and multiple slideshows

    - by Dipesh Parmar
    I've been using a lot of slideshows recently on my sites and one thing thats puzzled me is using more than one slideshow per page. I'm currently working on my own site, experimenting with Jquery Accordion. I've managed to adopt a very simple javascript slideshow, see below: http://dvpwebdesign.com/test/accordion/blank.html However i'm unable to either incorporate or use a different multiple slideshow plugin. I dont need slideshow navigation, so the The Cycle plugin works really well and i know you can use multiple slideshows. But if i either use Cycle alongside the current javascript slideshow, or only use the Cycle slideshow to avoid any possible conflict, the Accordion menu stops working. I just cant see what i am doing wrong, can anyone help?

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  • Opengl problem with texture in model from obj

    - by subSeven
    Hello! I writing small program in OpenGL, and I have problem ( textures are skew, and I dont know why, this model work in another obj viewer) What I have: http://img696.imageshack.us/i/obrazo.png/ What I want http://img88.imageshack.us/i/obraz2d.jpg/ This code where I load texture: bool success; ILuint texId; GLuint image; ilGenImages(1, &texId); ilBindImage(texId); success = ilLoadImage((WCHAR*)fileName.c_str()); if(success) { success = ilConvertImage(IL_RGB, IL_UNSIGNED_BYTE); if(!success) { return false; } } else { return false; } glGenTextures(1, &image); glBindTexture(GL_TEXTURE_2D, image); glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MAG_FILTER, GL_LINEAR); glTexParameteri(GL_TEXTURE_2D, GL_TEXTURE_MIN_FILTER, GL_LINEAR); glTexImage2D(GL_TEXTURE_2D, 0, ilGetInteger(IL_IMAGE_BPP), ilGetInteger(IL_IMAGE_WIDTH), ilGetInteger(IL_IMAGE_HEIGHT), 0, ilGetInteger(IL_IMAGE_FORMAT), GL_UNSIGNED_BYTE, ilGetData()); ilDeleteImages(1, &texId); Code to load obj: triangles.clear(); std::ifstream in; std::string cmd; in.open (fileName.c_str()); if (in.is_open()) { while(!in.eof()) { in>>cmd; if(cmd=="v") { Vector3d vector; in>>vector.x; in>>vector.y; in>>vector.z; points.push_back(vector); } if(cmd=="vt") { Vector2d texcord; in>>texcord.x; in>>texcord.y; texcords.push_back(texcord); } if(cmd=="vn") { Vector3d normal; in>>normal.x; in>>normal.y; in>>normal.z; normals.push_back(normal); } if(cmd=="f") { Triangle triangle; std::string str; std::string str1,str2,str3; std::string delimeter("/"); int pos; int n; std::stringstream ss (std::stringstream::in | std::stringstream::out); in>>str; pos = str.find(delimeter); str1 = str.substr(0,pos); str2 = str.substr(pos+delimeter.length()); pos = str2.find(delimeter); str3 = str2.substr(pos+delimeter.length()); str2 = str2.substr(0,pos); ss<<str1; ss>>n; triangle.a= n-1; ss.clear(); ss<<str3; ss>>n; triangle.an =n-1; ss.clear(); ss<<str2; ss>>n; ss.clear(); triangle.atc = n-1; in>>str; pos = str.find(delimeter); str1 = str.substr(0,pos); str2 = str.substr(pos+delimeter.length()); pos = str2.find(delimeter); str3 = str2.substr(pos+delimeter.length()); str2 = str2.substr(0,pos); ss<<str1; ss>>n; triangle.b= n-1; ss.clear(); ss<<str3; ss>>n; triangle.bn =n-1; ss.clear(); ss<<str2; ss>>n; ss.clear(); triangle.btc = n-1; in>>str; pos = str.find(delimeter); str1 = str.substr(0,pos); str2 = str.substr(pos+delimeter.length()); pos = str2.find(delimeter); str3 = str2.substr(pos+delimeter.length()); str2 = str2.substr(0,pos); ss<<str1; ss>>n; triangle.c= n-1; ss.clear(); ss<<str3; ss>>n; triangle.cn =n-1; ss.clear(); ss<<str2; ss>>n; ss.clear(); triangle.ctc = n-1; triangles.push_back(triangle); } cmd = ""; } in.close(); return true; } return false; Code to draw model: glEnable(GL_TEXTURE_2D); glTexEnvi(GL_TEXTURE_ENV, GL_TEXTURE_ENV_MODE, GL_DECAL); glBindTexture(GL_TEXTURE_2D,image); glBegin(GL_TRIANGLES); for(int i=0;i<triangles.size();i++) { glTexCoord2f(texcords[triangles[i].ctc].x, texcords[triangles[i].ctc].y); glNormal3f(normals[triangles[i].cn].x, normals[triangles[i].cn].y, normals[triangles[i].cn].z); glVertex3f( points[triangles[i].c].x, points[triangles[i].c].y, points[triangles[i].c].z); glTexCoord2f(texcords[triangles[i].btc].x, texcords[triangles[i].btc].y); glNormal3f(normals[triangles[i].bn].x, normals[triangles[i].bn].y, normals[triangles[i].bn].z); glVertex3f( points[triangles[i].b].x, points[triangles[i].b].y, points[triangles[i].b].z); glTexCoord2f(texcords[triangles[i].atc].x, texcords[triangles[i].atc].y); glNormal3f(normals[triangles[i].an].x, normals[triangles[i].an].y, normals[triangles[i].an].z); glVertex3f( points[triangles[i].a].x, points[triangles[i].a].y, points[triangles[i].a].z); } glEnd(); glDisable(GL_TEXTURE_2D); Mayby someone find mistake in this

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  • TDD and your emerging design

    - by andrewstopford
    I was at DevWeek last week, it was a great week and I got a chance to speak with some of my geek heroes (Jeff Richter is a walking, talking CLR). One of the folks I most enjoyed listening to was ThoughtWorker Neal Ford who gave a session on emergeant design in TDD. Something struck me about the RGR cycle in TDD in that design could either be missed or misplaced if the refactor phase is never carried out and after the inital green phase the design is considered done. In TDD the emergant design that evolves as part of the cycle is key to the approach.  Neal talked about using cyclometric complexity as a measure of your emerging design but other considerations would surely include SOLID and DRY during the cycles. As you refactor to these kinds of design principles your design evolves.

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  • How to Calibrate HP Laptop Battery

    - by batteryfast
    Calibrating the HP Laptop Battery This document pertains to HP Notebook PCs with Windows 7 and Vista. Calibrating the laptop battery Calibrating the battery means recharging the battery to its maximum capacity and resetting the battery gauge to display the level of charge accurately. The Windows system tray battery meter may not correctly display the battery charge level when a notebook is new or has not been used for a long period of time. If the battery gauge becomes inaccurate, use one of the methods below to calibrate the battery gauge reading. Calibrate the battery while PC is in use A calibration cycle requires that the battery be completely charged and then completely discharged. During the calibration cycle, the power management properties must be disabled to allow the battery to completely discharge.

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  • Analysing and measuring the performance of a .NET application (survey results)

    - by Laila
    Back in December last year, I asked myself: could it be that .NET developers think that you need three days and a PhD to do performance profiling on their code? What if developers are shunning profilers because they perceive them as too complex to use? If so, then what method do they use to measure and analyse the performance of their .NET applications? Do they even care about performance? So, a few weeks ago, I decided to get a 1-minute survey up and running in the hopes that some good, hard data would clear the matter up once and for all. I posted the survey on Simple Talk and got help from a few people to promote it. The survey consisted of 3 simple questions: Amazingly, 533 developers took the time to respond - which means I had enough data to get representative results! So before I go any further, I would like to thank all of you who contributed, because I now have some pretty good answers to the troubling questions I was asking myself. To thank you properly, I thought I would share some of the results with you. First of all, application performance is indeed important to most of you. In fact, performance is an intrinsic part of the development cycle for a good 40% of you, which is much higher than I had anticipated, I have to admit. (I know, "Have a little faith Laila!") When asked what tool you use to measure and analyse application performance, I found that nearly half of the respondents use logging statements, a third use performance counters, and 70% of respondents use a profiler of some sort (a 3rd party performance profilers, the CLR profiler or the Visual Studio profiler). The importance attributed to logging statements did surprise me a little. I am still not sure why somebody would go to the trouble of manually instrumenting code in order to measure its performance, instead of just using a profiler. I personally find the process of annotating code, calculating times from log files, and relating it all back to your source terrifyingly laborious. Not to mention that you then need to remember to turn it all off later! Even when you have logging in place throughout all your code anyway, you still have a fair amount of potentially error-prone calculation to sift through the results; in addition, you'll only get method-level rather than line-level timings, and you won't get timings from any framework or library methods you don't have source for. To top it all, we all know that bottlenecks are rarely where you would expect them to be, so you could be wasting time looking for a performance problem in the wrong place. On the other hand, profilers do all the work for you: they automatically collect the CPU and wall-clock timings, and present the results from method timing all the way down to individual lines of code. Maybe I'm missing a trick. I would love to know about the types of scenarios where you actively prefer to use logging statements. Finally, while a third of the respondents didn't have a strong opinion about code performance profilers, those who had an opinion thought that they were mainly complex to use and time consuming. Three respondents in particular summarised this perfectly: "sometimes, they are rather complex to use, adding an additional time-sink to the process of trying to resolve the existing problem". "they are simple to use, but the results are hard to understand" "Complex to find the more advanced things, easy to find some low hanging fruit". These results confirmed my suspicions: Profilers are seen to be designed for more advanced users who can use them effectively and make sense of the results. I found yet more interesting information when I started comparing samples of "developers for whom performance is an important part of the dev cycle", with those "to whom performance is only looked at in times of crisis", and "developers to whom performance is not important, as long as the app works". See the three graphs below. Sample of developers to whom performance is an important part of the dev cycle: Sample of developers to whom performance is important only in times of crisis: Sample of developers to whom performance is not important, as long as the app works: As you can see, there is a strong correlation between the usage of a profiler and the importance attributed to performance: indeed, the more important performance is to a development team, the more likely they are to use a profiler. In addition, developers to whom performance is an important part of the dev cycle have a higher tendency to use a much wider range of methods for performance measurement and analysis. And, unsurprisingly, the less important performance is, the less varied the methods of measurement are. So all in all, to come back to my random questions: .NET developers do care about performance. Those who care the most use a wider range of performance measurement methods than those who care less. But overall, logging statements, performance counters and third party performance profilers are the performance measurement methods of choice for most developers. Finally, although most of you find code profilers complex to use, those of you who care the most about performance tend to use profilers more than those of you to whom performance is not so important.

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  • How do i mount my SD Card? I am using ubuntu 10.04

    - by shobhit
    root@shobhit:/media# lsusb Bus 002 Device 017: ID 14cd:125c Super Top Bus 002 Device 003: ID 0c45:6421 Microdia Bus 002 Device 002: ID 8087:0020 Bus 002 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub Bus 001 Device 011: ID 413c:8160 Dell Computer Corp. Bus 001 Device 006: ID 413c:8162 Dell Computer Corp. Bus 001 Device 005: ID 413c:8161 Dell Computer Corp. Bus 001 Device 004: ID 138a:0008 DigitalPersona, Inc Bus 001 Device 003: ID 0a5c:4500 Broadcom Corp. BCM2046B1 USB 2.0 Hub (part of BCM2046 Bluetooth) Bus 001 Device 002: ID 8087:0020 Bus 001 Device 001: ID 1d6b:0002 Linux Foundation 2.0 root hub root@shobhit:/home/shobhit/scripts/internalUtilities# sudo lspci -v -nn 00:1a.0 USB Controller [0c03]: Intel Corporation 5 Series/3400 Series Chipset USB2 Enhanced Host Controller [8086:3b3c] (rev 06) (prog-if 20) Subsystem: Dell Device [1028:0441] Flags: bus master, medium devsel, latency 0, IRQ 16 Memory at fbc08000 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Capabilities: [58] Debug port: BAR=1 offset=00a0 Capabilities: [98] PCIe advanced features <?> Kernel driver in use: ehci_hcd 00:1d.0 USB Controller [0c03]: Intel Corporation 5 Series/3400 Series Chipset USB2 Enhanced Host Controller [8086:3b34] (rev 06) (prog-if 20) Subsystem: Dell Device [1028:0441] Flags: bus master, medium devsel, latency 0, IRQ 23 Memory at fbc07000 (32-bit, non-prefetchable) [size=1K] Capabilities: [50] Power Management version 2 Capabilities: [58] Debug port: BAR=1 offset=00a0 Capabilities: [98] PCIe advanced features <?> Kernel driver in use: ehci_hcd 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev a6) (prog-if 01) Flags: bus master, fast devsel, latency 0 Bus: primary=00, secondary=20, subordinate=20, sec-latency=32 Capabilities: [50] Subsystem: Dell Device [1028:0441] 00:1f.0 ISA bridge [0601]: Intel Corporation Mobile 5 Series Chipset LPC Interface Controller [8086:3b0b] (rev 06) Subsystem: Dell Device [1028:0441] Flags: bus master, medium devsel, latency 0 Capabilities: [e0] Vendor Specific Information <?> Kernel modules: iTCO_wdt 00:1f.2 SATA controller [0106]: Intel Corporation 5 Series/3400 Series Chipset 6 port SATA AHCI Controller [8086:3b2f] (rev 06) (prog-if 01) Subsystem: Dell Device [1028:0441] Flags: bus master, 66MHz, medium devsel, latency 0, IRQ 29 I/O ports at f070 [size=8] I/O ports at f060 [size=4] I/O ports at f050 [size=8] I/O ports at f040 [size=4] I/O ports at f020 [size=32] Memory at fbc06000 (32-bit, non-prefetchable) [size=2K] Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+ Capabilities: [70] Power Management version 3 Capabilities: [a8] SATA HBA <?> Capabilities: [b0] PCIe advanced features <?> Kernel driver in use: ahci Kernel modules: ahci 00:1f.3 SMBus [0c05]: Intel Corporation 5 Series/3400 Series Chipset SMBus Controller [8086:3b30] (rev 06) Subsystem: Dell Device [1028:0441] Flags: medium devsel, IRQ 3 Memory at fbc05000 (64-bit, non-prefetchable) [size=256] I/O ports at f000 [size=32] Kernel modules: i2c-i801 00:1f.6 Signal processing controller [1180]: Intel Corporation 5 Series/3400 Series Chipset Thermal Subsystem [8086:3b32] (rev 06) Subsystem: Dell Device [1028:0441] Flags: bus master, fast devsel, latency 0, IRQ 3 Memory at fbc04000 (64-bit, non-prefetchable) [size=4K] Capabilities: [50] Power Management version 3 Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable- 12:00.0 Network controller [0280]: Broadcom Corporation Device [14e4:4727] (rev 01) Subsystem: Dell Device [1028:0010] Flags: bus master, fast devsel, latency 0, IRQ 17 Memory at fbb00000 (64-bit, non-prefetchable) [size=16K] Capabilities: [40] Power Management version 3 Capabilities: [58] Vendor Specific Information <?> Capabilities: [48] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable- Capabilities: [d0] Express Endpoint, MSI 00 Capabilities: [100] Advanced Error Reporting <?> Capabilities: [13c] Virtual Channel <?> Capabilities: [160] Device Serial Number cb-c0-8b-ff-ff-38-00-00 Capabilities: [16c] Power Budgeting <?> Kernel driver in use: wl Kernel modules: wl 13:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168B PCI Express Gigabit Ethernet controller [10ec:8168] (rev 03) Subsystem: Dell Device [1028:0441] Flags: bus master, fast devsel, latency 0, IRQ 28 I/O ports at e000 [size=256] Memory at d0b04000 (64-bit, prefetchable) [size=4K] Memory at d0b00000 (64-bit, prefetchable) [size=16K] Expansion ROM at fba00000 [disabled] [size=128K] Capabilities: [40] Power Management version 3 Capabilities: [50] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+ Capabilities: [70] Express Endpoint, MSI 01 Capabilities: [ac] MSI-X: Enable- Mask- TabSize=4 Capabilities: [cc] Vital Product Data <?> Capabilities: [100] Advanced Error Reporting <?> Capabilities: [140] Virtual Channel <?> Capabilities: [160] Device Serial Number 00-e0-4c-68-00-00-00-03 Kernel driver in use: r8169 Kernel modules: r8169 root@shobhit:/home/shobhit/scripts/internalUtilities# sudo lshw shobhit description: Portable Computer product: Vostro 3500 vendor: Dell Inc. version: A10 serial: FV1L3N1 width: 32 bits capabilities: smbios-2.6 dmi-2.6 smp-1.4 smp configuration: boot=normal chassis=portable cpus=2 uuid=44454C4C-5600-1031-804C-C6C04F334E31 *-core description: Motherboard product: 0G2R51 vendor: Dell Inc. physical id: 0 version: A10 serial: .FV1L3N1.CN7016612H00PW. slot: To Be Filled By O.E.M. *-cpu:0 description: CPU product: Intel(R) Core(TM) i5 CPU M 480 @ 2.67GHz vendor: Intel Corp. physical id: 4 bus info: cpu@0 version: 6.5.5 serial: 0002-0655-0000-0000-0000-0000 slot: CPU 1 size: 1197MHz capacity: 2926MHz width: 64 bits clock: 533MHz capabilities: boot fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe nx rdtscp x86-64 constant_tsc arch_perfmon pebs bts xtopology nonstop_tsc aperfmperf pni dtes64 monitor ds_cpl vmx est tm2 ssse3 cx16 xtpr pdcm sse4_1 sse4_2 popcnt lahf_lm ida arat tpr_shadow vnmi flexpriority ept vpid cpufreq configuration: id=4 *-cache:0 description: L1 cache physical id: 5 slot: L1-Cache size: 64KiB capacity: 64KiB capabilities: internal write-back unified *-cache:1 description: L2 cache physical id: 6 slot: L2-Cache size: 512KiB capacity: 512KiB capabilities: internal varies unified *-cache:2 description: L3 cache physical id: 7 slot: L3-Cache size: 3MiB capacity: 3MiB capabilities: internal varies unified *-logicalcpu:0 description: Logical CPU physical id: 4.1 width: 64 bits capabilities: logical *-logicalcpu:1 description: Logical CPU physical id: 4.2 width: 64 bits capabilities: logical *-logicalcpu:2 description: Logical CPU physical id: 4.3 width: 64 bits capabilities: logical *-logicalcpu:3 description: Logical CPU physical id: 4.4 width: 64 bits capabilities: logical *-logicalcpu:4 description: Logical CPU physical id: 4.5 width: 64 bits capabilities: logical *-logicalcpu:5 description: Logical CPU physical id: 4.6 width: 64 bits capabilities: logical *-logicalcpu:6 description: Logical CPU physical id: 4.7 width: 64 bits capabilities: logical *-logicalcpu:7 description: Logical CPU physical id: 4.8 width: 64 bits capabilities: logical *-logicalcpu:8 description: Logical CPU physical id: 4.9 width: 64 bits capabilities: logical *-logicalcpu:9 description: Logical CPU physical id: 4.a width: 64 bits capabilities: logical *-logicalcpu:10 description: Logical CPU physical id: 4.b width: 64 bits capabilities: logical *-logicalcpu:11 description: Logical CPU physical id: 4.c width: 64 bits capabilities: logical *-logicalcpu:12 description: Logical CPU physical id: 4.d width: 64 bits capabilities: logical *-logicalcpu:13 description: Logical CPU physical id: 4.e width: 64 bits capabilities: logical *-logicalcpu:14 description: Logical CPU physical id: 4.f width: 64 bits capabilities: logical *-logicalcpu:15 description: Logical CPU physical id: 4.10 width: 64 bits capabilities: logical *-memory description: System Memory physical id: 1d slot: System board or motherboard size: 3GiB *-bank:0 description: DIMM Synchronous 1333 MHz (0.8 ns) product: HMT112S6TFR8C-H9 vendor: AD80 physical id: 0 serial: 5525C935 slot: DIMM_A size: 1GiB width: 64 bits clock: 1333MHz (0.8ns) *-bank:1 description: DIMM Synchronous 1333 MHz (0.8 ns) product: HMT125S6TFR8C-H9 vendor: AD80 physical id: 1 serial: 3441D6CA slot: DIMM_B size: 2GiB width: 64 bits clock: 1333MHz (0.8ns) *-firmware description: BIOS vendor: Dell Inc. physical id: 0 version: A10 (10/25/2010) size: 64KiB capacity: 1984KiB capabilities: mca pci upgrade shadowing escd cdboot bootselect socketedrom edd int13floppy1200 int13floppy720 int13floppy2880 int5printscreen int9keyboard int14serial int17printer int10video acpi usb zipboot biosbootspecification *-cpu:1 physical id: 1 bus info: cpu@1 version: 6.5.5 serial: 0002-0655-0000-0000-0000-0000 size: 1197MHz capacity: 1197MHz capabilities: vmx ht cpufreq configuration: id=4 *-logicalcpu:0 description: Logical CPU physical id: 4.1 capabilities: logical *-logicalcpu:1 description: Logical CPU physical id: 4.2 capabilities: logical *-logicalcpu:2 description: Logical CPU physical id: 4.3 capabilities: logical *-logicalcpu:3 description: Logical CPU physical id: 4.4 capabilities: logical *-logicalcpu:4 description: Logical CPU physical id: 4.5 capabilities: logical *-logicalcpu:5 description: Logical CPU physical id: 4.6 capabilities: logical *-logicalcpu:6 description: Logical CPU physical id: 4.7 capabilities: logical *-logicalcpu:7 description: Logical CPU physical id: 4.8 capabilities: logical *-logicalcpu:8 description: Logical CPU physical id: 4.9 capabilities: logical *-logicalcpu:9 description: Logical CPU physical id: 4.a capabilities: logical *-logicalcpu:10 description: Logical CPU physical id: 4.b capabilities: logical *-logicalcpu:11 description: Logical CPU physical id: 4.c capabilities: logical *-logicalcpu:12 description: Logical CPU physical id: 4.d capabilities: logical *-logicalcpu:13 description: Logical CPU physical id: 4.e capabilities: logical *-logicalcpu:14 description: Logical CPU physical id: 4.f capabilities: logical *-logicalcpu:15 description: Logical CPU physical id: 4.10 capabilities: logical *-pci description: Host bridge product: Core Processor DRAM Controller vendor: Intel Corporation physical id: 100 bus info: pci@0000:00:00.0 version: 18 width: 32 bits clock: 33MHz configuration: driver=agpgart-intel resources: irq:0 *-display description: VGA compatible controller product: Core Processor Integrated Graphics Controller vendor: Intel Corporation physical id: 2 bus info: pci@0000:00:02.0 version: 18 width: 64 bits clock: 33MHz capabilities: msi pm bus_master cap_list rom configuration: driver=i915 latency=0 resources: irq:30 memory:fac00000-faffffff memory:c0000000-cfffffff(prefetchable) ioport:f080(size=8) *-communication UNCLAIMED description: Communication controller product: 5 Series/3400 Series Chipset HECI Controller vendor: Intel Corporation physical id: 16 bus info: pci@0000:00:16.0 version: 06 width: 64 bits clock: 33MHz capabilities: pm msi bus_master cap_list configuration: latency=0 resources: memory:fbc09000-fbc0900f *-usb:0 description: USB Controller product: 5 Series/3400 Series Chipset USB2 Enhanced Host Controller vendor: Intel Corporation physical id: 1a bus info: pci@0000:00:1a.0 version: 06 width: 32 bits clock: 33MHz capabilities: pm debug bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:16 memory:fbc08000-fbc083ff *-multimedia description: Audio device product: 5 Series/3400 Series Chipset High Definition Audio vendor: Intel Corporation physical id: 1b bus info: pci@0000:00:1b.0 version: 06 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list configuration: driver=HDA Intel latency=0 resources: irq:22 memory:fbc00000-fbc03fff *-pci:0 description: PCI bridge product: 5 Series/3400 Series Chipset PCI Express Root Port 1 vendor: Intel Corporation physical id: 1c bus info: pci@0000:00:1c.0 version: 06 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm bus_master cap_list configuration: driver=pcieport resources: irq:24 ioport:2000(size=4096) memory:bc000000-bc1fffff memory:bc200000-bc3fffff(prefetchable) *-pci:1 description: PCI bridge product: 5 Series/3400 Series Chipset PCI Express Root Port 2 vendor: Intel Corporation physical id: 1c.1 bus info: pci@0000:00:1c.1 version: 06 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm bus_master cap_list configuration: driver=pcieport resources: irq:25 ioport:3000(size=4096) memory:fbb00000-fbbfffff memory:bc400000-bc5fffff(prefetchable) *-network description: Wireless interface product: Broadcom Corporation vendor: Broadcom Corporation physical id: 0 bus info: pci@0000:12:00.0 logical name: eth1 version: 01 serial: c0:cb:38:8b:aa:d8 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list ethernet physical wireless configuration: broadcast=yes driver=wl0 driverversion=5.60.48.36 ip=10.0.1.50 latency=0 multicast=yes wireless=IEEE 802.11 resources: irq:17 memory:fbb00000-fbb03fff *-pci:2 description: PCI bridge product: 5 Series/3400 Series Chipset PCI Express Root Port 3 vendor: Intel Corporation physical id: 1c.2 bus info: pci@0000:00:1c.2 version: 06 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm bus_master cap_list configuration: driver=pcieport resources: irq:26 ioport:e000(size=4096) memory:fba00000-fbafffff ioport:d0b00000(size=1048576) *-network description: Ethernet interface product: RTL8111/8168B PCI Express Gigabit Ethernet controller vendor: Realtek Semiconductor Co., Ltd. physical id: 0 bus info: pci@0000:13:00.0 logical name: eth0 version: 03 serial: 78:2b:cb:cc:0e:2a size: 10MB/s capacity: 1GB/s width: 64 bits clock: 33MHz capabilities: pm msi pciexpress msix vpd bus_master cap_list rom ethernet physical tp mii 10bt 10bt-fd 100bt 100bt-fd 1000bt 1000bt-fd autonegotiation configuration: autonegotiation=on broadcast=yes driver=r8169 driverversion=2.3LK-NAPI duplex=half latency=0 link=no multicast=yes port=MII speed=10MB/s resources: irq:28 ioport:e000(size=256) memory:d0b04000-d0b04fff(prefetchable) memory:d0b00000-d0b03fff(prefetchable) memory:fba00000-fba1ffff(prefetchable) *-pci:3 description: PCI bridge product: 5 Series/3400 Series Chipset PCI Express Root Port 5 vendor: Intel Corporation physical id: 1c.4 bus info: pci@0000:00:1c.4 version: 06 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm bus_master cap_list configuration: driver=pcieport resources: irq:27 ioport:d000(size=4096) memory:fb000000-fb9fffff ioport:d0000000(size=10485760) *-usb:1 description: USB Controller product: 5 Series/3400 Series Chipset USB2 Enhanced Host Controller vendor: Intel Corporation physical id: 1d bus info: pci@0000:00:1d.0 version: 06 width: 32 bits clock: 33MHz capabilities: pm debug bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:23 memory:fbc07000-fbc073ff *-pci:4 description: PCI bridge product: 82801 Mobile PCI Bridge vendor: Intel Corporation physical id: 1e bus info: pci@0000:00:1e.0 version: a6 width: 32 bits clock: 33MHz capabilities: pci bus_master cap_list *-isa description: ISA bridge product: Mobile 5 Series Chipset LPC Interface Controller vendor: Intel Corporation physical id: 1f bus info: pci@0000:00:1f.0 version: 06 width: 32 bits clock: 33MHz capabilities: isa bus_master cap_list configuration: latency=0 *-storage description: SATA controller product: 5 Series/3400 Series Chipset 6 port SATA AHCI Controller vendor: Intel Corporation physical id: 1f.2 bus info: pci@0000:00:1f.2 logical name: scsi0 logical name: scsi1 version: 06 width: 32 bits clock: 66MHz capabilities: storage msi pm bus_master cap_list emulated configuration: driver=ahci latency=0 resources: irq:29 ioport:f070(size=8) ioport:f060(size=4) ioport:f050(size=8) ioport:f040(size=4) ioport:f020(size=32) memory:fbc06000-fbc067ff *-disk description: ATA Disk product: WDC WD3200BEKT-7 vendor: Western Digital physical id: 0 bus info: scsi@0:0.0.0 logical name: /dev/sda version: 01.0 serial: WD-WX21AC0W1945 size: 298GiB (320GB) capabilities: partitioned partitioned:dos configuration: ansiversion=5 signature=77e3ed41 *-volume:0 description: Windows NTFS volume physical id: 1 bus info: scsi@0:0.0.0,1 logical name: /dev/sda1 version: 3.1 serial: aa69-51c0 size: 98MiB capacity: 100MiB capabilities: primary bootable ntfs initialized configuration: clustersize=4096 created=2012-04-03 02:00:15 filesystem=ntfs label=System Reserved state=clean *-volume:1 description: Windows NTFS volume physical id: 2 bus info: scsi@0:0.0.0,2 logical name: /dev/sda2 version: 3.1 serial: 9854ff5c-1dea-a147-84a6-624e758f44b8 size: 48GiB capacity: 48GiB capabilities: primary ntfs initialized configuration: clustersize=4096 created=2012-04-10 13:55:31 filesystem=ntfs modified_by_chkdsk=true mounted_on_nt4=true resize_log_file=true state=dirty upgrade_on_mount=true *-volume:2 description: Extended partition physical id: 3 bus info: scsi@0:0.0.0,3 logical name: /dev/sda3 size: 48GiB capacity: 48GiB capabilities: primary extended partitioned partitioned:extended *-logicalvolume:0 description: Linux swap / Solaris partition physical id: 5 logical name: /dev/sda5 capacity: 1952MiB capabilities: nofs *-logicalvolume:1 description: Linux filesystem partition physical id: 6 logical name: /dev/sda6 logical name: / capacity: 46GiB configuration: mount.fstype=ext4 mount.options=rw,relatime,errors=remount-ro,barrier=1,data=ordered state=mounted *-volume:3 description: Windows NTFS volume physical id: 4 bus info: scsi@0:0.0.0,4 logical name: /dev/sda4 logical name: /media/56AA8094AA807273 version: 3.1 serial: 22a29e8d-56c7-9a4a-adea-528103948f6d size: 200GiB capacity: 200GiB capabilities: primary ntfs initialized configuration: clustersize=4096 created=2012-04-02 20:17:15 filesystem=ntfs modified_by_chkdsk=true mount.fstype=fuseblk mount.options=rw,nosuid,nodev,relatime,user_id=0,group_id=0,default_permissions,allow_other,blksize=4096 mounted_on_nt4=true resize_log_file=true state=mounted upgrade_on_mount=true *-cdrom description: DVD-RAM writer product: DVD+-RW TS-L633J vendor: TSSTcorp physical id: 1 bus info: scsi@1:0.0.0 logical name: /dev/cdrom logical name: /dev/cdrw logical name: /dev/dvd logical name: /dev/dvdrw logical name: /dev/scd0 logical name: /dev/sr0 version: D200 capabilities: removable audio cd-r cd-rw dvd dvd-r dvd-ram configuration: ansiversion=5 status=nodisc *-serial UNCLAIMED description: SMBus product: 5 Series/3400 Series Chipset SMBus Controller vendor: Intel Corporation physical id: 1f.3 bus info: pci@0000:00:1f.3 version: 06 width: 64 bits clock: 33MHz configuration: latency=0 resources: memory:fbc05000-fbc050ff ioport:f000(size=32) *-generic UNCLAIMED description: Signal processing controller product: 5 Series/3400 Series Chipset Thermal Subsystem vendor: Intel Corporation physical id: 1f.6 bus info: pci@0000:00:1f.6 version: 06 width: 64 bits clock: 33MHz capabilities: pm msi bus_master cap_list configuration: latency=0 resources: memory:fbc04000-fbc04fff *-scsi physical id: 2 bus info: usb@2:1.1 logical name: scsi15 capabilities: emulated scsi-host configuration: driver=usb-storage *-disk description: SCSI Disk physical id: 0.0.0 bus info: scsi@15:0.0.0 logical name: /dev/sdb I have tried all options like fdisk /dev/sdb , pmount /dev/sdb but nothing is working .Pls guide me

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  • My webserver just got hacked [closed]

    - by billmalarky
    Possible Duplicate: My server's been hacked EMERGENCY My web server just got hacked. It was on a vps so I think it was hacked through another site. When I loaded the homepage it looks like it ran some script. Can anyone tell me if this script is malicious and if I just got screwed by my own website? `<script>var _0x8ae2=["\x68\x74\x74\x70\x3A\x2F\x2F\x7A\x6F\x6E\x65\x2D\x68\x2E\x6F\x72\x67\x2F\x61\x72\x63\x68\x69\x76\x65\x2F\x6E\x6F\x74\x69\x66\x69\x65\x72\x3D\x54\x69\x47\x45\x52\x2D\x4D\x25\x34\x30\x54\x45","\x6F\x70\x65\x6E","\x68\x74\x74\x70\x3A\x2F\x2F\x7A\x6F\x6E\x65\x2D\x68\x2E\x6F\x72\x67\x2F\x61\x72\x63\x68\x69\x76\x65\x2F\x6E\x6F\x74\x69\x66\x69\x65\x72\x3D\x54\x69\x47\x45\x52\x2D\x4D\x25\x34\x30\x54\x45\x2F\x73\x70\x65\x63\x69\x61\x6C\x3D\x31","\x68\x74\x74\x70\x3A\x2F\x2F\x6C\x6D\x67\x74\x66\x79\x2E\x63\x6F\x6D\x2F\x3F\x71\x3D\x48\x61\x63\x6B\x65\x64\x20\x62\x79\x20\x54\x69\x47\x45\x52\x2D\x4D\x25\x34\x30\x54\x45","\x73\x63\x72\x6F\x6C\x6C\x42\x79","\x74\x69\x74\x6C\x65","\x48\x61\x63\x6B\x65\x44\x20\x42\x79\x20\x54\x69\x47\x45\x52\x2D\x4D\x40\x54\x45","\x6F\x6E\x6B\x65\x79\x64\x6F\x77\x6E","\x72\x65\x73\x69\x7A\x65\x54\x6F","\x6D\x6F\x76\x65\x54\x6F","\x6D\x6F\x76\x65\x28\x29","\x72\x6F\x75\x6E\x64","\x66\x67\x43\x6F\x6C\x6F\x72","\x62\x67\x43\x6F\x6C\x6F\x72","\x4C\x4F\x4C","\x61\x76\x61\x69\x6C\x57\x69\x64\x74\x68","\x61\x76\x61\x69\x6C\x48\x65\x69\x67\x68\x74"];function details(){window[_0x8ae2[1]](_0x8ae2[0]);window[_0x8ae2[1]](_0x8ae2[2]);window[_0x8ae2[1]](_0x8ae2[3]);} ;window[_0x8ae2[4]](0,1);if(document[_0x8ae2[5]]==_0x8ae2[6]){function keypressed(){return false;} ;document[_0x8ae2[7]]=keypressed;window[_0x8ae2[8]](0,0);window[_0x8ae2[9]](0,0);setTimeout(_0x8ae2[10],2);var mxm=50;var mym=25;var mx=0;var my=0;var sv=50;var status=1;var szx=0;var szy=0;var c=255;var n=0;var sm=30;var cycle=2;var done=2;function move(){if(status==1){mxm=mxm/1.05;mym=mym/1.05;mx=mx+mxm;my=my-mym;mxm=mxm+(400-mx)/100;mym=mym-(300-my)/100;window[_0x8ae2[9]](mx,my);rmxm=Math[_0x8ae2[11]](mxm/10);rmym=Math[_0x8ae2[11]](mym/10);if(rmxm==0){if(rmym==0){status=2;} ;} ;} ;if(status==2){sv=sv/1.1;scrratio=1+1/3;mx=mx-sv*scrratio/2;my=my-sv/2;szx=szx+sv*scrratio;szy=szy+sv;window[_0x8ae2[9]](mx,my);window[_0x8ae2[8]](szx,szy);if(sv<0.1){status=3;} ;} ;if(status==3){document[_0x8ae2[12]]=0xffffFF;c=c-16;if(c<0){status=8;} ;} ;if(status==4){c=c+16;document[_0x8ae2[13]]=c*65536;document[_0x8ae2[12]]=(255-c)*65536;if(c>239){status=5;} ;} ;if(status==5){c=c-16;document[_0x8ae2[13]]=c*65536;document[_0x8ae2[12]]=(255-c)*65536;if(c<0){status=6;cycle=cycle-1;if(cycle>0){if(done==1){status=7;} else {status=4;} ;} ;} ;} ;if(status==6){document[_0x8ae2[5]]=_0x8ae2[14];alert(_0x8ae2[14]);cycle=2;status=4;done=1;} ;if(status==7){c=c+4;document[_0x8ae2[13]]=c*65536;document[_0x8ae2[12]]=(255-c)*65536;if(c>128){status=8;} ;} ;if(status==8){window[_0x8ae2[9]](0,0);sx=screen[_0x8ae2[15]];sy=screen[_0x8ae2[16]];window[_0x8ae2[8]](sx,sy);status=9;} ;var _0xceebx11=setTimeout(_0x8ae2[10],0.3);} ;} ;</script><body bgcolor="#000000" oncontextmenu="return false;"><p align="center"><span style="font-weight: 700;"><font face="Tahoma" size="5" color="#EEEEEE"><i>Server HackeD<br/><br/>By</i> </font><br/><br/><a href="#" class="name"><script>if (navigator.appName == 'Microsoft Internet Explorer'){document.write('<font face="Arial Black" size="5" color="#FF0000">');}else{document.write('<font face="Arial Black" size="5" color="black" style="text-shadow:#FFFFFF 2px 2px 5px">');}</script><i onclick="details()">TiGER-M@TE</i></font></a></span><br/><br/><script>var l1n3='<img src="data:image/gif;base64,R0lGODlhqAABAOYAAAMDA3d4eAAAAAICAfLy8l5dXaWlpSQlJBwcHBQVFBISEQ0NDbu7u/v8/EJBQePj4/3+/T4+PtjX2Do7OlZWVyEiIjc3N09PT4OEhIB/f/r6+sjIyMTExPb29rS0tHx7fOvr64+Pj4eHh56dnZqZmvT09GVlZejp6dXU1aGhoeXm5khISJKTk93e3hkZGQcHB0RFRBcXF+7u7isqKi4uLmxtbLe3t6ysrXR0dTQ0M87Ozw8QEMvLy6ipqQUFBUxMTAkJCdHS0vDw73BwcQsLCycnJ/j4+JeXl8HBwmFhYVNSU+Dg4Glpadvb2jEwML6+vrCvsB8fH4uLi1pZWgAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAAACH5BAAAAAAALAAAAACoAAEAAAewgBANGkYdJQRCMiAnKg9LLU0SKEE6PBscSE8MNh5QNz0GKSMkRywhUiIYGR8BOEM1TCZJBVMUShc/KzAOERMWOU40M0UHFVEILjEJCjsLREAvPgADAgIDAD4vQEQLOwoJMS4IURUHRTM0TjkWExEOMCs/F0oUUwVJJkw1QzgBHxkYREgJweIIiREpDPS4AcWDDQZPkHDYwENHEBQSmrRY8kDFCRAyhBAo0cGIhgYQAgEAOw==" />'; document.write(l1n3+l1n3);`

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  • Out of memory on MATLAB

    - by Eric Sánchez
    I'm trying to run a script on matlab_2011a, which calculate same means for a climatology of 50 years. When I started to run the script for all the years it worked fine until the iteration 20th, and then appeared the message: Out of memory. Type HELP MEMORY for your options. Then I used clear v1 v2 v3 ... to clear all the variables inside the function, also i used clear train because i saw it in another forum, and these with the modifications or not, I run again the script (since the 21th iteration), and the result is the same message, but curiously sometimes it run a year and then stop. Any ideas about solving this problem?, what I have to clean to run correctly? (in this matlab version there's not the command memory which maybe could help me).

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  • Is anyone doing "real" TDD with Visual-C++, and if yes, how do they do it?

    - by Martin
    Test Driven Development implies writing the test before the code and following a certain cycle: Write Test Check Test (run) Write Production Code Check Test (run) Clean up Production Code Check test (run) As far as I'm concerned, this is only possible if your development solution allows you to very quickly switch between the production and test code, and to execute the test for a certain production code part extremely quickly. Now, while there exist lots of Unit Testing Frameworks for C++ (I'm using Bost.Test atm.) it does seem that there doesn't really exist any decent (for native C++) Visual Studio (Plugin) solution that makes the TDD cycle bearable regardless of framework used. "Bearable" means that it's a one-click action to run a test for a certain cpp file without having to manually set up a separate testing project etc. "Bearable" also means that a simple test starts (linking!) and runs very quickly. So, what tools (plugins) and techniques are out there that make the TDD cycle possible for native C++ development with Visual Studio? Note: I'm fine with free or "commercial" tools. Please: No framework recommendations. (Unless the framework has a dedicated Visual Studio plugin and you want to recommend the plugin.) Edit Note: The answers so far have provided links on how to integrate a Unit Testing framework into Visual Studio. The resources more or less describe how to get the UT framework to compile and get your first Tests running. This is not what this question is about. I'm of the opinion that to really work productively, having the Unit Tests in a manually maintained(!), separate vcproj from your production classes will add so much overhead that TDD "isn't possible". As far as I am aware, you do not add extra "projects" to a Java or C# thing to enable Unit Tests and TDD, and for a good reason. This should be possible with C++ given the right tools, but it seems (this question is about) that there are very little tools for TDD/C++/VS. Googling around, I've found one tool, VisualAssert, that seems to aim in the right direction. However, afaiks, it doesn't seem to be in widespread use (compared to CppUnit, Boost.Test etc.). Edit: I would like to add a comment to the context for this question. I think it does a good summary of outlining (part of) the problem: (comment by Billy ONeal) Visual Studio does not use "build scripts" that are reasonably editable by the user. One project produces one binary. Moreover, Java has the property that Java never builds a complete binary -- the binary you build is just a ZIP of the class files. Therefore it's possible to compile separately then JAR together manually (using e.g. 7z). C++ and C# both actually link their binaries, so generally speaking you can't write a script like that. The closest you can get is to compile everything separately and then do two linkings (one for production, one for testing).

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  • How can I autoclean my gnome main menu?

    - by Bruce Connor
    I like to experiment with lots of different software in my Ubuntu install. Then, every time Ubuntu reaches a new release cycle, I simply do a clean install (instead of upgrading) to get rid of all the extra software (and their respective config files/folders). The only thing I always backup and carry to the next install (besides personal files) are the config files for gnome, so my desktop is always the way I like it. =) The problem with that, is that the different packages I test out never get properly uninstalled, so my gnome main menu is full of broken links referring to software I had in previous installations (which got carried over because I kept the gnome config files). Is there any automated way to go through my gnome main menu and remove any broken links? I know how to manually edit the menu, and I could go through it myself, but I'm looking for some script or package that will clean for me so I wouldn't have to do it manually every release cycle.

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  • Le Cigref et l'Inhesj ouvrent une formation en sécurité informatique, des études sont-elles nécessai

    Le Cigref et l'Inhesj ouvrent une formation en sécurité informatique, des études sont-elles nécessaires dans cette spécialité ? L'Institut national des hautes études de la sécurité et de la justice (Inhesj), en association avec le Cigref (Club informatique des grandes entreprises françaises) à mis au point et ouvert un cycle de spécialisation en sécurité informatique. Une première, qui a pour but de "délivrer les savoir-faire visant l'identification, l'évaluation et la maîtrise de l'ensemble des risques et des malveillances informatiques au sein des entreprises". Le cycle de spécialisation « Sécurité numérique » sera destiné aux cadres d'entreprise et abordera l'ensemble des aspects stratégiques, juridiques...

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  • EJB Lifecycle and Relation to WARs

    - by Adam Tannon
    I've been reading up on EJBs (3.x) and believe I understand the basics. This question is a "call for confirmation" that I have interpreted the Java EE docs correctly and that I understand these fundamental concepts: An EJB is to an App Container as a Web App (WAR) is to a Web Container Just like you deploy a WAR to a Web Container, and that container manages your WAR's life cycle, you deploy an EJB to an App Container, and the container manages your EJB's life cycle When the App Container fires up and deploys an EJB, it is given a unique "identifier" and URL that can be used by JNDI to look up the EJB from another tier (like the web tier) So, when your web app wants to invoke one of your EJB's methods, it looks the EJB up using some kind of service locator (JNDI) and invoke the method that way Am I on-track or way off-base here? Please correct me & clarify for me if any of these are incorrect. Thanks in advance!

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  • Interview : Lancement de HP Service Manager 9, le nouveau produit dévoile ses secrets

    Interview : Lancement de HP Service Manager 9, le nouveau produit dévoile ses secrets A l'occasion du lancement de HP Service Manager 9, HP à répondu à nos questions, pour vous permettre de découvrir plus en profondeur les nouvelles fonctionnalités de ce produit, parmi lesquelles : une nouvelle interface Web 2.0, les outils de gestion du cycle de vie des services, l'approche CMS de la solution, avec UCMDB 9, l'optimisation du processus de gestion des changements et des mises en production et l'automatisation du cycle de vie d'un incident. Katleen Erna : Tout d'abord, pour ceux qui ne connaîtraient pas la suite de services d'assistance informatique HP Service Manager, pouvez-vous nous expliquer en quoi elle consiste ? ...

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  • Using Definition of Done to Drive Agile Maturity

    - by Dylan Smith
    I’ve been an Agile Coach at a lot of different clients over the years, and I want to share an approach I use to help them adopt and mature over time. It’s important to realize that “Agile” is not a black/white yes/no thing. Teams can be varying degrees of agile. I think of this as their agile maturity level. When I coach teams I want them to start out being a little agile, and get more agile as they mature. The approach I teach them is to use the definition of done as a technique to continuously improve their agile maturity over time. We’re probably all familiar with the concept of “Done Done” that represents what *actually* being done a feature means. Not just when a developer says he’s done right after he writes that last line of code that makes the feature kind-of work. Done Done means the coding is done, it’s been tested, installers and deployment packages have been created, user manuals have been updated, architecture docs have been updated, etc. To enable teams to internalize the concept of “Done Done”, they usually get together and come up with their Definition of Done (DoD) that defines all the activities that need to be completed before a feature is considered Done Done. The Done Done technique typically is applied only to features (aka User Stories). What I do is extend this to apply to several concepts such as User Stories, Sprints, Releases (and sometimes Check-Ins). During project kick-off I’ll usually sit down with the team and go through an exercise of creating DoD’s for each of these concepts (Stories/Sprints/Releases). We’ll usually start by just brainstorming a bunch of activities that could end up in these various DoD’s. Here’s some examples: Code Reviews StyleCop FxCop User Manuals Updated Architecture Docs Updated Tested by QA Tested by UAT Installers Created Support Knowledge Base Updated Deployment Instructions (for Ops) written Automated Unit Tests Run Automated Integration Tests Run Then we start by arranging these activities into the place they occur today (e.g. Do you do UAT testing only once per release? every sprint? every feature?). If the team was previously Waterfall most of these activities probably end up in the Release DoD. An extremely mature agile team would probably have most of these activities in the DoD for the User Stories (because an extremely mature agile team will probably do continuous deployment and release every story). So what we need to do as a team, is work to move these activities from their current home (Release DoD) down into the Sprint DoD and eventually into the User Story DoD (and maybe into the lower-level Check-In DoD if we decide to use that). We don’t have to move them all down to User Story immediately, but as a team we figure out what we think we’re capable of moving down to the Sprint cycle, and Story cycle immediately, and that becomes our starting DoD’s. Over time the team makes an effort to continue moving activities down from Release->Sprint->Story as they become more agile and more mature. I try to encourage them to envision a world in which they deploy to production as each User Story is completed. They would need to be updating User Manuals, creating installers, doing UAT testing (typical Release cycle activities) on every single User Story. They may never actually reach that point, but they should envision that, and strive to keep driving the activities down closer to the User Story cycle s they mature. This is a great technique to give a team an easy-to-follow roadmap to mature their agile practices over time. Sure there’s other aspects to maturity outside of this, but it’s a great technique, that’s easy to visualize, to drive agility into the team. Just keep moving those activities (aka “gates”) down the board from Release->Sprint->Story. I’ll try to give an example of what a recent client of mine had for their DoD’s (this is from memory, so probably not 100% accurate): Release Create/Update deployment Instructions For Ops Instructional Videos Updated Run manual regression test suite UAT Testing In this case that meant deploying to an environment shared across the enterprise that mirrored production and asking other business groups to test their own apps to ensure we didn’t break anything outside our system Sprint Deploy to UAT Environment But not necessarily actually request UAT testing occur User Guides updated Sprint Features Video Created In this case we decided to create a video each sprint showing off the progress (video version of Sprint Demo) User Story Manual Test scripts developed and run Tested by BA Deployed in shared QA environment Using automated deployment process Peer Code Review Code Check-In Compiled (warning-free) Passes StyleCop Passes FxCop Create installer packages Run Automated Tests Run Automated Integration Tests PS – One of my clients had a great question when we went through this activity. They said that if a Sprint is by definition done when the end-date rolls around (time-boxed), isn’t a DoD on a sprint meaningless – it’s done on the end-date regardless of whether those other activities are complete or not? My answer is that while that statement is true – the sprint is done regardless when the end date rolls around – if the DoD activities haven’t been completed I would consider the Sprint a failure (similar to not completing what was committed/planned – failure may be too strong a word but you get the idea). In the Retrospective that will become an agenda item to discuss and understand why we weren’t able to complete the activities we agreed would need to be completed each Sprint.

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  • Reminder: WebLogic Global, Virtual Developer Day November 5

    - by jeckels
    Just a quick reminder about the FREE virtual developer day focused on WebLogic (and Coherence) coming on November 5th. This day, with content tailored for developers, will guide you through tooling updates and best practices around creating applications with WebLogic and Coherence as target platforms. We'll also explore advances in how you can manage your build, deploy and ongoing management processes to streamline your application's life cycle. And of course, we'll conclude with some hands-on labs that ensure this isn't all a bunch of made-up stuff - get your hands dirty in the code!November 5, 20139am PT/12pm ETREGISTER NOW We're offering two tracks for your attendance, though of course you're free to attend any session you wish. The first will be for pure developers with sessions around developing for WebLogic with HTML5, processing live events with Coherence, and looking at development tooling. The second is for developers who are involved in the building and management processes as part of the application life cycle. These sessions focus on using Maven for builds, using Chef and Puppet for configuration and more.We look forward to seeing you there - don't forget to invite a friend!

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  • How To Delete Your Skype Call and Chat History

    - by Gopinath
    Just like every other modern application, Skype also records all the communications we exchange using it. It records instant messages, calls, file transfers, SMS, etc. and makes it easy to view using the Conversation tab. If you ever feel like getting rid of these history information, then you need to delete them. Skype provides a single click option to clear all the history from you account, but the feature is buried deep under options menu.Really deep!. To clear history follow the menu Tools –> Options, switch to Privacy Settings tab available on the left side, click on Show advanced options button and finally hit the button Clear history. Ah! You are almost done. Just confirm a popup it displays on screen and your history is vanished from your account. Join us on Facebook to read all our stories right inside your Facebook news feed.

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  • ASUS EeePC Fn+F2 ruins wireless until restart

    - by dawmail333
    I managed to get my wireless working beautifully (ath5k driver working great), and it works over a disable/enable wireless cycle, even a suspend/wakeup cycle (read some people have issues with that). Unfortunately, I discovered that if I press Fn+F2 on my keyboard (Asus EeePC 900HA, so that's the wireless toggle key), wireless then stops working until I restart the computer. How can I fix this? I'm running UNR 10.10 (with Unity turned off tyvm!). I heard something about Jupiter controlling these keys, but what about asus-laptop? How can I fix this behaviour? TIA. (Note, I'm a power user, but still fairly new to Linux. I'm picking up speed though).

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  • January Winnipeg .NET User Group Event

    - by D'Arcy Lussier
    We’ve had some problems with the Winnipeg .NET UG website, but things are getting sorted out and the site should be back up very shortly. In the meantime, here’s info on our January event and how to register. This is also a Microsoft sponsored event, so we’ll have some great swag to give away. As always, pizza will be provided! When: Wednesday, January 26th Where: 17th Floor Conference Room, Richardson Building Session: Taking your Windows Phone Apps to the Next Level with Tombstoning Speaker: Tyler Doerksen, Imaginet Unlike previous versions of Windows Mobile, Windows Phone 7 does not allow 3rd party applications to run in the background. Because of this your application needs to react to various life cycle events to provide the user with a seamless experience. Luckily Silverlight isolated storage has your back. In this session learn about the app life cycle and what storage patterns you can use to keep your users happy. To register for this event, please visit our registration page here.

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  • Reminder: Free, Global, Virtual Developer Day November 5th

    - by jeckels
    Just a quick reminder about the FREE virtual developer day focused on Coherence (and WebLogic) coming on November 5th. This day, with content tailored for developers, will guide you through tooling updates and best practices around creating applications with WebLogic and Coherence as target platforms. We'll also explore advances in how you can manage your build, deploy and ongoing management processes to streamline your application's life cycle. And of course, we'll conclude with some hands-on labs that ensure this isn't all a bunch of made-up stuff - get your hands dirty in the code!November 5, 20139am PT/12pm ETREGISTER NOW We're offering two tracks for your attendance, though of course you're free to attend any session you wish. The first will be for pure developers with sessions around developing for WebLogic with HTML5, processing live events with Coherence, and looking at development tooling. The second is for developers who are involved in the building and management processes as part of the application life cycle. These sessions focus on using Maven for builds, using Chef and Puppet for configuration and more.We look forward to seeing you there - don't forget to invite a friend!

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  • 2-D Lighting Theory

    - by Richard
    I am writing a rogue-like 'zombie' management game. The game map will be similar to Prison Architect. A top-down 50 X 50 grid. I want to implemented a day night cycle and during the night I would like the player to be able to position lights. I would like to be able to lighten and dark to whole map to display the day and night cycle. Then lights would be a circle of light blocked by game entities such as walls, players, trees etc. How would I achieve and what is the standard way of achieving this?

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  • Microsoft veut rendre Visual C++ conforme aux standards C++, la roadmap de Visual Studio 2013 inclut le support complet de C99, C++11 et C++14

    Microsoft veut rendre Visual Studio conforme aux standards C++ la roadmap de Visual Studio 2013 inclut le support complet de C99, C++11 et C++14 Lors de la conférence Build la semaine dernière, Microsoft a publié une préversion de Visual Studio 2013, la prochaine version majeure de son environnement de développement.Cette version sort pratiquement un an après la publication de Visual Studio 2012, montrant la volonté de Microsoft d'adopter un cycle de libération plus rapide pour l'ensemble de ses produits phares.Ce nouveau cycle de publication permet désormais à l'équipe C++ de fournir rapidement une prise en charge des normes C++. Herb Sutter, président du comité C++ et employé chez Microsoft, ...

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