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  • Why does this regular expression for sed break inside Makefile?

    - by jcrocholl
    I'm using GNU Make 3.81, and I have the following rule in my Makefile: jslint : java org.mozilla.javascript.tools.shell.Main jslint.js mango.js \ | sed 's/Lint at line \([0-9]\+\) character \([0-9]\+\)/mango.js:\1:\2/' This works fine if I enter it directly on the command line, but the regular expression does not match if I run it with "make jslint". However, it works if I replace \+ with \{1,\} in the Makefile: jslint : java org.mozilla.javascript.tools.shell.Main jslint.js mango.js \ | sed 's/Lint at line \([0-9]\{1,\}\) character \([0-9]\{1,\}\)/mango.js:\1:\2/' Is there some special meaning to \+ in Makefiles, or is this a bug?

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  • How to Generate a Create Table DDL Script Along With Its Related Tables

    - by Compudicted
    Have you ever wondered when creating table diagrams in SQL Server Management Studio (SSMS) how slickly you can add related tables to it by just right-clicking on the interesting table name? Have you also ever needed to script those related tables including the master one? And you discovered you have dozens of related tables? Or may be no SSMS at your disposal? That was me one day. Well, creativity to the rescue! I Binged and Googled around until I found more or less what I wanted, but it was all involving T-SQL, yeah, a long and convoluted CROSS APPLYs, then I saw a PowerShell solution that I quickly adopted to my needs (I am not referencing any particular author because it was a mashup): 1: ########################################################################################################### 2: # Created by: Arthur Zubarev on Oct 14, 2012 # 3: # Synopsys: Generate file containing the root table CREATE (DDL) script along with all its related tables # 4: ########################################################################################################### 5:   6: [System.Reflection.Assembly]::LoadWithPartialName('Microsoft.SqlServer.SMO') | out-null 7:   8: $RootTableName = "TableName" # The table name, no schema name needed 9:   10: $srv = new-Object Microsoft.SqlServer.Management.Smo.Server("TargetSQLServerName") 11: $conContext = $srv.ConnectionContext 12: $conContext.LoginSecure = $True 13: # In case the integrated security is not used uncomment below 14: #$conContext.Login = "sa" 15: #$conContext.Password = "sapassword" 16: $db = New-Object Microsoft.SqlServer.Management.Smo.Database 17: $db = $srv.Databases.Item("TargetDatabase") 18:   19: $scrp = New-Object Microsoft.SqlServer.Management.Smo.Scripter($srv) 20: $scrp.Options.NoFileGroup = $True 21: $scrp.Options.AppendToFile = $False 22: $scrp.Options.ClusteredIndexes = $False 23: $scrp.Options.DriAll = $False 24: $scrp.Options.ScriptDrops = $False 25: $scrp.Options.IncludeHeaders = $True 26: $scrp.Options.ToFileOnly = $True 27: $scrp.Options.Indexes = $False 28: $scrp.Options.WithDependencies = $True 29: $scrp.Options.FileName = 'C:\TEMP\TargetFileName.SQL' 30:   31: $smoObjects = New-Object Microsoft.SqlServer.Management.Smo.UrnCollection 32: Foreach ($tb in $db.Tables) 33: { 34: Write-Host -foregroundcolor yellow "Table name being processed" $tb.Name 35: 36: If ($tb.IsSystemObject -eq $FALSE -and $tb.Name -eq $RootTableName) # feel free to customize the selection condition 37: { 38: Write-Host -foregroundcolor magenta $tb.Name "table and its related tables added to be scripted." 39: $smoObjects.Add($tb.Urn) 40: } 41: } 42:   43: # The actual act of scripting 44: $sc = $scrp.Script($smoObjects) 45:   46: Write-host -foregroundcolor green $RootTableName "and its related tables have been scripted to the target file." Enjoy!

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  • What is the proper syntax for getting a Makefile to print the output directory of one of its output zip files?

    - by 9exceptionThrower9
    I'm trying to edit an Android Makefile in the hopes of getting it to print out the directory (path) location of one the ZIP files it creates. Ideally, since the build process is long and does many things, I would like for it print out the pathway to the ZIP file to a text file in a different directory I can access later: Pseudo-code idea: # print the desired pathway to output file print(getDirectoryOf(variable-name.zip)) > ~/Desktop/location_of_file.txt The Makefile snippet where I would like to insert this new bit of code is shown below. I am interested in finding the directory of $(name).zip (that is specific file I want to locate): # ----------------------------------------------------------------- # A zip of the directories that map to the target filesystem. # This zip can be used to create an OTA package or filesystem image # as a post-build step. # name := $(TARGET_PRODUCT) ifeq ($(TARGET_BUILD_TYPE),debug) name := $(name)_debug endif name := $(name)-target_files-$(FILE_NAME_TAG) intermediates := $(call intermediates-dir-for,PACKAGING,target_files) BUILT_TARGET_FILES_PACKAGE := $(intermediates)/$(name).zip $(BUILT_TARGET_FILES_PACKAGE): intermediates := $(intermediates) $(BUILT_TARGET_FILES_PACKAGE): \ zip_root := $(intermediates)/$(name) # $(1): Directory to copy # $(2): Location to copy it to # The "ls -A" is to prevent "acp s/* d" from failing if s is empty. define package_files-copy-root if [ -d "$(strip $(1))" -a "$$(ls -A $(1))" ]; then \ mkdir -p $(2) && \ $(ACP) -rd $(strip $(1))/* $(2); \ fi endef

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  • How to strip out a -D for just one file in a gnu makefile?

    - by WilliamKF
    I have '-Wredundant-decls' in my CXXFLAGS but for one file, I want it removed. In my GNU makefile, how can I structure a rule to remove just that part of the CXXFLAGS. I know how to add only for that file, I would do something like this: $O/just_one_file.o: CXXFLAGS += -Wredundant-decls So, ideally I'd do something like this (which doesn't work) to remove it: $O/just_one_file.o: CXXFLAGS -= -Wredundant-decls However, maybe with some $ magic, I can construct some kind of sed or perl script to strip out the -Wredundant-decls and set CXXFLAGS to the stripped value: $O/just_one_file.o: CXXFLAGS = $(shell strip magic here for $CXXFLAGS)

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  • is it possible to run a makefile from java?

    - by Bugzy bug
    Hi guys, i would like to ask if it is possible to run a make file in java? I was searching the internet but only got the examples of generating java make file. My case is different, what if i have makefile, but i just want to run it from java? really sorry for dumb question, but i am lost and dont even know if i can run it or not. thank you very much!

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  • what's the DRY version of the following Makefile targets?

    - by carneades
    I don't know how to execute a command stored as a variable or how to use ifeq inside of a target, so I have a very redundant Makefile at the moment! Ideally I'd like to have just one target (all) which would run the stored command on Mac and run it twice on Linux, once with -m32 and once with -m64. all: echo PLEASE SELECT OS, e.g. make linux exit 1 mac: gcc $(SHARED_OPT) $(GENERAL_CFLAGS) $(PLATFORM_CFLAGS) -o $(BUILD_DIR)$(BUILD_NAME) $(SOURCE) $(LIBRARIES) linux: gcc $(SHARED_OPT) $(GENERAL_CFLAGS) $(PLATFORM_CFLAGS) -o $(BUILD_DIR)$(BUILD_NAME64) $(SOURCE) $(LIBRARIES64) -m64 gcc $(SHARED_OPT) $(GENERAL_CFLAGS) $(PLATFORM_CFLAGS) -o $(BUILD_DIR)$(BUILD_NAME) $(SOURCE) $(LIBRARIES) -m32

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  • Makefile - How to save the .o one directory up?

    - by nunos
    Imagine the following folder structure: project src code.c makefile bin How can I compile code.c to code.o and directly put it inside bin? I know I could compile it to code.o under src and the do "mv code.o ../bin" but that would yield an error if there were compile errors, right? Even if it works that way, is there a better way to do it? Thanks.

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  • Find methods related to testcases in Java

    - by user3623718
    I want to automatically change some methods in the program. These methods contain some compiler error and my program aims to fix these compiler errors. After fixing compiler errors I need to run test cases related to the changed method (or class) to know it is correct and if not which test cases failed. As the programs under investigation are very big, I only need to run test cases related to changes. As an example, if I change one method, then I need to only run test cases related to this method. Therefore, what I need is to programmatically be able to find test cases related to each method, and class. It is also useful if there is a tool that can do that for me. As an example, a tool which creates a matrix shows each test case is related to which method(s) One easy way to do that is to run all test cases and save functions they accessed. However, the problem is at the beginning the input program contains compiler error and it is not possible to run test cases because of these compiler error. Please let me know what is the best way to do that. An API or a tool that I can be used programmatically is the best for me.

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  • Where can I find a tool to convert a VS solution to a gcc makefile?

    - by Tim
    I know about CMake and bakefile already, but that is not what I am looking for. Is there a tool that will generate a makefile given a VC project? (or at least a first attempt at one) so I don't have to do all the work by hand? Alternatively, is there a tool that makes CMake files? Edit: Following the link below leads me to this: http://www.winehq.org/docs/winemaker That is a great help. I have not tried it yet.

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  • How do I use dependencies in a makefile without calling a target?

    - by rassie
    I'm using makefiles to convert an internal file format to an XML file which is sent to other colleagues. They would make changes to the XML file and send it back to us (Don't ask, this needs to be this way ;)). I'd like to use my makefile to update the internal files when this XML changes. So I have these rules: %.internal: $(DATAFILES) # Read changes from XML if any # Create internal representation here %.xml: %.internal # Convert to XML here Now the XML could change because of the workflow described above. But since no data files have changed, make would tell me that file.internal is up-to-date. I would like to avoid making %.internal target phony and a circular dependency on %.xml obviously doesn't work. Any other way I could force make to check for changes in the XML file and re-build %.internal?

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  • How to install Hercules Webcam Deluxe

    - by Cmorales
    I am trying to install a Hercules Webcam Deluxe on my Ubuntu 11.10 (64 bits). I followed this guide: https://help.ubuntu.com/community/Ov51x Step by step, only changing wget http://www.rastageeks.org/downloads/ov51x-jpeg/ov51x-jpeg-1.5.4.tar.gz by 1.5.9, because that is the latest version. I get stacked here: 2.4. Prepare the installation files make 2.5. Compile Compile the modules: sudo make install Because, when I enter that in a terminal, I get this error: make: *** No hay objetivos. Alto. For you, non Spanish-speaking-people, that is roughly translated as: "There are no objectives. Stop" So... what can I do? Thanks Edit: Terminal output: Configurando build-essential (11.5ubuntu1) ... mrpotato@mrsobremesa:~$ wget http://www.rastageeks.org/downloads/ov51x-jpeg/ov51x-jpeg-1.5.9.tar.gz --2011-12-08 03:33:47-- http://www.rastageeks.org/downloads/ov51x-jpeg/ov51x-jpeg-1.5.9.tar.gz Resolviendo www.rastageeks.org... 213.251.174.188 Conectando a www.rastageeks.org|213.251.174.188|:80... conectado. Petición HTTP enviada, esperando respuesta... 200 OK Longitud: 88197 (86K) [application/x-gzip] Guardando en: «ov51x-jpeg-1.5.9.tar.gz.1» 100%[======================================>] 88.197 245K/s en 0,4s 2011-12-08 03:33:47 (245 KB/s) - «ov51x-jpeg-1.5.9.tar.gz.1» guardado [88197/88197] mrpotato@mrsobremesa:~$ tar -xvf ov51x-jpeg-1.5.9.tar.gz ov51x-jpeg-1.5.9/ ov51x-jpeg-1.5.9/test/ ov51x-jpeg-1.5.9/test/Makefile ov51x-jpeg-1.5.9/test/getjpeg.c ov51x-jpeg-1.5.9/Makefile ov51x-jpeg-1.5.9/ov51x-jpeg-core.c ov51x-jpeg-1.5.9/ov518-decomp.c ov51x-jpeg-1.5.9/ov51x-jpeg.h ov51x-jpeg-1.5.9/ov519-decomp.c ov51x-jpeg-1.5.9/ov511-decomp.c ov51x-jpeg-1.5.9/ov7670.h ov51x-jpeg-1.5.9/ChangeLog mrpotato@mrsobremesa:~$ cd ov51x-jpeg-1.5.9 mrpotato@mrsobremesa:~/ov51x-jpeg-1.5.9$ make make: *** No hay objetivos. Alto. mrpotato@mrsobremesa:~/ov51x-jpeg-1.5.9$ sudo make make: *** No hay objetivos. Alto. mrpotato@mrsobremesa:~/ov51x-jpeg-1.5.9$

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  • Writing your own Makefile for OpenBSD ports

    - by The_dude_man
    I have an OpenBSD box running Python 2.6. I want to install py-setuptools, but that package is built against 2.5. I was curious as to what the Makefile for py-setuptools [Someone with rep, fix me please][http://www.openbsd.org/cgi-bin/cvsweb/ports/devel/py-setuptools/Makefile?rev=1.13;content-type=text%2Fx-cvsweb-markup ] looks like, to see if it mentioned anything about Python 2.5 as a dependency. I did not find anything version-dependent. I typed make install in /usr/ports/devel/py-setuptools on a whim, and it blew up because of failed missing Python 2.5 dependency. That is expected. My question is, How do I modify the Makefile to build against Python 2.6 ? I came across this in the man pages [please fix me][http://www.openbsd.org/cgi-bin/man.cgi?query=port-modules&sektion=5&arch=&apropos=0&manpath=OpenBSD+4.6#CORE+MODULES] , but I am still clueless how to specify what version to build against. Also, I dont see anything that actually installs the egg.

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  • "make" and "make install" never work

    - by Nirmik
    I have been trying it from a long time now and this time it got my nerves... The commands make and make install used to install a program from an extracted tar ball never work for some reason... The make command gives me the error- make: *** No targets specified and no makefile found. Stop. and the make install command gives me the error make: *** No rule to make target `install'. Stop. Why are these commands not executing? What should I do to solve this issue?

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  • Configuring thouands of related products in Magento?

    - by Anonymous -
    I'm at a stage with a Magento store I'm developing where I've added all the products (all 6000 of them) and now would like to configure related products to up my conversion rate a bit. I was wondering if there was an extension anybody knew of that functions similarly to this one, with the most current version of Magento (Community Edition, 1.6.1). If not, would anyone be able to provide some pointers for writing a script that will run through each product and add 1-5 related products. I have a fairly basic idea of taking product title text and just doing a simple text similarity query between other product titles for now, just to get some related products up there, but the Magento database isn't making a terribly large amount of sense. Thanks to anyone who can shed some light on this. :)

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  • mpicc hangs when called from makefile; runs fine as single command

    - by user2518579
    i'm trying to compile WRF (doubt that's relevant) and am having a problem where mpicc will hang when run w/ the compile script. icc and mpif90 have no issues. the compile script is executed w/ #!/bin/csh -f just to be verbose, here's an example. i run the script and get here make[3]: Entering directory `/home/jason/wrf/wrf3.5/external/RSL_LITE' mpicc -DMPI2_SUPPORT -DMPI2_THREAD_SUPPORT -DFSEEKO64_OK -w -O3 -DDM_PARALLEL -DMAX_HISTORY=25 -DNMM_CORE=0 -c rsl_bcast.c and hang. so then i run that line by itself jason@server:~/wrf/wrf3.5$ cd /home/jason/wrf/wrf3.5/external/RSL_LITE jason@server:wrf3.5/external/RSL_LITE$ mpicc -DMPI2_SUPPORT -DMPI2_THREAD_SUPPORT -DFSEEKO64_OK -w -O3 -DDM_PARALLEL -DMAX_HISTORY=25 -DNMM_CORE=0 -c rsl_bcast.c jason@server:wrf3.5/external/RSL_LITE$ compiles instantly. starting the compile script again does the exact same thing but on the next file. i have no idea what to do, and this is basically impossible to google for.

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  • Skip makefile dependency generation for certain targets (e.g. `clean`)

    - by Shtééf
    I have several C and C++ projects that all follow a basic structure I've been using for a while now. My source files go in src/*.c, intermediate files in obj/*.[do], and the actual executable in the top level directory. My makefiles follow roughly this template: # The final executable TARGET := something # Source files (without src/) INPUTS := foo.c bar.c baz.c # OBJECTS will contain: obj/foo.o obj/bar.o obj/baz.o OBJECTS := $(INPUTS:%.cpp=obj/%.o) # DEPFILES will contain: obj/foo.d obj/bar.d obj/baz.d DEPFILES := $(OBJECTS:%.o=%.d) all: $(TARGET) obj/%.o: src/%.cpp $(CC) $(CFLAGS) -c -o $@ $< obj/%.d: src/%.cpp $(CC) $(CFLAGS) -M -MF $@ -MT $(@:%.d=%.o) $< $(TARGET): $(OBJECTS) $(LD) $(LDFLAGS) -o $@ $(OBJECTS) .PHONY: clean clean: -rm -f $(OBJECTS) $(DEPFILES) $(RPOFILES) $(TARGET) -include $(DEPFILES) Now I'm at the point where I'm packaging this for a Debian system. I'm using debuild to build the Debian source package, and pbuilder to build the binary package. The debuild step only has to execute the clean target, but even this causes the dependency files to be generated and included. In short, my question is really: Can I somehow prevent make from generating dependencies when all I want is to run the clean target?

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  • Calling Windows commands (e.g. del) from a GNU makefile

    - by Tom
    It does not appear to be possible to call Windows system commands (e.g. del, move, etc) using GNU Make. When the following rule is run, an error is reported del: command not found: clean: del *.o This is presumably because there is no such execuatable as "del". I've also tried running it as an option to cmd but with this only seems to open a new prompt: clean: cmd /C del *.o I'm using GNU Make 3.79.1 that is bundled as part of MSys.

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  • Daily tech links for .net and related technologies - June 14-16, 2010

    - by SanjeevAgarwal
    Daily tech links for .net and related technologies - June 14-16, 2010 Web Development ASP.Net MVC 2 Auto Complete Textbox With Custom View Model Attribute & EditorTemplate - Sean McAlinden Localization with ASP.NET MVC ModelMetadata - Kazi Manzur Rashid Securing Dynamic Data 4 (Replay) - Steve Adding Client-Side Script to an MVC Conditional Validator - Simon Ince jQuery: Storing and retrieving data related to elements - Rebecca Murphey Web Design 48 Examples of Excellent Layout in Web Design...(read more)

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