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• How to fo fluid dynamics like Where's My Water?

  - by Edgar Miranda

  There is a game on the app store called "Where's My Water" that is really fun and uses fluid dynamics in it's gameplay. You can check out a video of the game play here... http://www.youtube.com/watch?v=UnFFWnwOohk. You use your finger to remove dirt from the screen, and then the water just flows to the new area. Anyone know what engine this was made in and how they where able to get the fluid dynamics in there? I'm using the Corona SDK for mobile development and want to do something similar like this (a game with fluid dynamics).

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• Why don't stacks grow upwards (for security)?

  - by AshleysBrain

  This is related to the question 'Why do stacks typically grow downwards?', but more from a security point of view. I'm generally referring to x86. It strikes me as odd that the stack would grow downwards, when buffers are usually written to upwards in memory. For example a typical C++ string has its end at a higher memory address than the beginning. This means that if there's a buffer overflow you're overwriting further up the call stack, which I understand is a security risk, since it opens the possibility of changing return addresses and local variable contents. If the stack grew upwards in memory, wouldn't buffer overflows simply run in to dead memory? Would this improve security? If so, why hasn't it been done? What about x64, do those stacks grow upwards and if not why not?

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• Is there any kind of standard for 8086 multiprocessing?

  - by Earlz

  Back when I made an 8086 emulator I noticed that there was the LOCK prefix intended for synchonization in a multiprocessor environment. Yet the only multitasking I know of for the x86 arch. involves use of the APIC which didn't come around until either the Pentiums or 486s. Was there any kind of standard for 8086 multitasking or was it done by some manufacturer specific extensions to the instruction set and/or special ports? By standard, I mean things like: How do you separate the 2 processors if they both use the same memory? This is impossible without some kind of way to make each processor execute a different piece of code. (or cause an interrupt on only one processor)

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• C inline assembly of x96 fbstp instruction

  - by David HUnter

  Was wondering how to inline a usage of fbstp on a 32 bit I86 architecture. I tried something like int main( ) { double foo = 100.0; long bar = 0; asm( "pushl %1; fbstp %0" : "=m"(bar) : "r"(foo) ); ... But bar is unchanged. I have tried reading everything I can find on this but most example simply do things like add two integers together. I can’t find any that talk about pushing operands onto the stack and what I should be doing when an instruction like fbstp writes 80 bits of data back to memory ( i.e. what C type to use ) and how to specify it in the asm syntax. Also on x86-64 there seems to be a pushq and no pushl but fbstp still exists whereas fbstq does not. Is there some other magic for 64 bit.

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• How is the ">" operator implemented (on 32 bit integers)?

  - by Ron Klein

  Let's say that the environment is x86. How do compilers compile the "" operator on 32 bit integers. Logically, I mean. Without any knowledge of Assembly. Let's say that the high level language code is: int32 x, y; x = 123; y = 456; bool z; z = x > y; What does the compiler do for evaluating the expression x > y? Does it perform something like (assuming that x and y are positive integers): w = sign_of(x - y); if (w == 0) // expression is 'false' else if (w == 1) // expression is 'true' else // expression is 'false' Is there any reference for such information?

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• How to add display resolution fo an LCD in Ubuntu 12.04? xrandr problem

  - by SeregaI

  I am fresh for Ubuntu and Linux in general. I have installed Ubuntu 12.04 and stuck trying to setup correct resolution for my LCD display. The native resolution for the LCD is 1920x1080 here is the output from xrandr: $xrandr Screen 0: minimum 320 x 200, current 1280 x 720, maximum 4096 x 4096 LVDS1 connected 1280x720+0+0 (normal left inverted right x axis y axis) 0mm x 0mm 1280x720 60.0*+ 800x600 60.3 56.2 640x480 59.9 VGA1 disconnected (normal left inverted right x axis y axis) Then I create new modeline: $ cvt 1920 1080 60 1920x1080 59.96 Hz (CVT 2.07M9) hsync: 67.16 kHz; pclk: 173.00 MHz Modeline "1920x1080_60.00" 173.00 1920 2048 2248 2576 1080 1083 1088 1120 -hsync +vsync So far so good. then I create new mode using xrandr: $ xrandr --newmode "1920x1080_60.00" 173.00 1920 2048 2248 2576 1080 1083 1088 1120 -hsync +vsync But for some reason that new mode was created for VGA (VGA1) output instead of LCD output (LVDS1): $ xrandr Screen 0: minimum 320 x 200, current 1280 x 720, maximum 4096 x 4096 LVDS1 connected 1280x720+0+0 (normal left inverted right x axis y axis) 0mm x 0mm 1280x720 60.0*+ 800x600 60.3 56.2 640x480 59.9 VGA1 disconnected (normal left inverted right x axis y axis) 1920x1080_60.00 (0xbc) 173.0MHz <---------- ????!!!!!! h: width 1920 start 2048 end 2248 total 2576 skew 0 clock 67.2KHz v: height 1080 start 1083 end 1088 total 1120 clock 60.0Hz So, if I try to add mode to LVDS1, I get an error: $ xrandr --addmode LVDS1 "1920x1080_60.00" X Error of failed request: BadMatch (invalid parameter attributes) Major opcode of failed request: 149 (RANDR) Minor opcode of failed request: 18 (RRAddOutputMode) Serial number of failed request: 25 Current serial number in output stream: 26 Adding that new mode to VGA1 works fine, but I don't use that VGA1 output.

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• Working with QWords

  - by Glenn1234

  I'm learning and in the course of that working on an assembler conversion which uses QWORDs a lot (x86-32bit). Now my reference material doesn't have anything on working with such values beyond the obvious of splitting them up into the 32-bit registers. I guess they're on the old side. The newer processors have mmx and sse instructions and the like. Would I be served well to look into those instructions for solving this? What is the best way to handle doing work on QWORD values?

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• In what circumstances can large pages produce a speedup ?

  - by timday

  Modern x86 CPUs have the ability to support larger page sizes than the legacy 4K (ie 2MB or 4MB), and there are OS facilities (Linux, Windows) to access this functionality. The Microsoft link above states large pages "increase the efficiency of the translation buffer, which can increase performance for frequently accessed memory". Which isn't very helpful in predicting whether large pages will improve any given situation. I'm interested in concrete, preferably quantified, examples of where moving some program logic (or a whole application) to use huge pages has resulted in some performance improvement. Anyone got any success stories ? There's one particular case I know of myself: using huge pages can dramatically reduce the time needed to fork a large process (presumably as the number of TLB records needing copying is reduced by a factor on the order of 1000). I'm interested in whether huge pages can also benefit more mundane applications though.

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• Le succès de Windows 7 se confirme en entreprise et présage une adoption rapide et massive, selon Fo

  Mise à jour du 27/05/10 Le succès de Windows 7 se confirme en entreprise Et présage une adoption rapide et massive, selon Forrester Nouvelle étude à 500 $ pour le cabinet Forrester... qui accepte néanmoins de livrer quelques conclusions pour 0 Euro. « Corporate Desktop Operating System And Browser Trends, Q2 2009 To Q2 2010 » nous apprend donc que Windows 7 arrive (sic) et que Firefox et Chrome ne cessent de progresser (une constatation déjà fait...

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• Why do virtual memory addresses for linux binaries start at 0x8048000?

  - by muteW

  Disassembling an ELF binary on a Ubuntu x86 system I couldn't help but notice that the code(.text) section starts from the virtual address 0x8048000 and all lower memory addresses seem to be unused. This seems to be rather wasteful and all Google turns up is either folklore involving STACK_TOP or protection against null-pointer dereferences. The latter case looks like it can be fixed by using a single page instead of leaving a 128MB gap. So my question is this - is there a definitive answer to why the layout has been fixed to these values or is it just an arbitrary choice?

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• Good assembly tutorial for windows with eiter fasm or nasm

  - by The new guy

  I have spent the last 3 hours google and bing for a good asm tutorial(x86 variety). I have been on this site for many of these results. Non have really been sufficient. Mainly because while i like learning theory, i learn it best via practice, while for example pc-asm has about 20-30 pages of theroy before anything practical. I was wondering if there was a tutorial or online pdf (or cheap book(<£20)) that i could use that suits my style of learning. Please state if this is not possibke Thank you for your time

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• Obtaining frame pointer in C

  - by assketchum

  I'm trying to get the FP in my C program, I tried two different ways, but they both differ from what I get when I run GDB. The first way I tried, I made a protocol function in C for the Assembly function: int* getEbp(); and my code looks like this: int* ebp = getEbp(); printf("ebp: %08x\n", ebp); // value i get here is 0xbfe2db58 while( esp <= ebp ) esp -= 4; printf( "ebp: %08x, esp" ); //value i get here is 0xbfe2daec My assembly code getEbp: movl %ebp, %eax ret I tried making the prototype function to just return an int, but that also doesn't match up with my GDB output. We are using x86 assembly. EDIT: typos, and my getEsp function looks exactly like the other one: getEsp: movl %esp, %eax ret

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• Assembly Language bug with space character

  - by Bobby

  Having a bit of difficulty getting my input to print once a white space character is inputted. So far, i have it to display the uppercase/lowercase of the input but once i enter a string it doesnt read whats after the white space character. any suggestions? EDIT: intel x86 processor and im using EMU8086 org 100h include 'emu8086.inc' printn "Enter string to convert" mov dx,20 call get_string printn mov bx,di mov ah,0eh mov al,[ds+bx] cmp al, 41h cmp al, 5Ah jle ToLower1 cmp al, 61h cmp al, 7ah jle ToUpper1 ToLower1: add al, 20h int 10h jmp stop1 ToUpper1: sub al, 20h int 10h stop1: inc bx mov al,[ds+bx] cmp al, 41h cmp al, 5Ah jle ToLower2 cmp al, 61h cmp al, 7ah jle ToUpper2 ToLower2: add al, 20h int 10h jmp stop2 ToUpper2: sub al, 20h int 10h stop2: inc bx mov al,[ds+bx] cmp al, 41h cmp al, 5Ah jle ToLower3 cmp al, 61h cmp al, 7ah jle ToUpper3 ToLower3: add al, 20h int 10h jmp stop3 ToUpper3: sub al, 20h int 10h stop3: inc bx mov al,[ds+bx] cmp al, 41h cmp al, 5Ah jle ToLower4 cmp al, 61h cmp al, 7ah jle ToUpper4 ToLower4: add al, 20h int 10h jmp stop4 ToUpper4: sub al, 20h int 10h stop4: inc bx mov al,[ds+bx] cmp al, 41h cmp al, 5Ah jle ToLower5 cmp al, 61h cmp al, 7ah jle ToUpper5 ToLower5: add al, 20h int 10h jmp stop5 ToUpper5: sub al, 20h int 10h stop5: printn hlt define_get_string define_print_string end

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• Will fixed-point arithmetic be worth my trouble?

  - by Thomas

  I'm working on a fluid dynamics Navier-Stokes solver that should run in real time. Hence, performance is important. Right now, I'm looking at a number of tight loops that each account for a significant fraction of the execution time: there is no single bottleneck. Most of these loops do some floating-point arithmetic, but there's a lot of branching in between. The floating-point operations are mostly limited to additions, subtractions, multiplications, divisions and comparisons. All this is done using 32-bit floats. My target platform is x86 with at least SSE1 instructions. (I've verified in the assembler output that the compiler indeed generates SSE instructions.) Most of the floating-point values that I'm working with have a reasonably small upper bound, and precision for near-zero values isn't very important. So the thought occurred to me: maybe switching to fixed-point arithmetic could speed things up? I know the only way to be really sure is to measure it, that might take days, so I'd like to know the odds of success beforehand. Fixed-point was all the rage back in the days of Doom, but I'm not sure where it stands anno 2010. Considering how much silicon is nowadays pumped into floating-point performance, is there a chance that fixed-point arithmetic will still give me a significant speed boost? Does anyone have any real-world experience that may apply to my situation?

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• What AOP tools exist for doing aspect-oriented programming at the assembly language level against x8

  - by JohnnySoftware

  Looking for a tool I can use to do aspect-oriented programming at the assembly language level. For experimentation purposes, I would like the code weaver to operate native application level executable and dynamic link libraries. I have already done object-oriented AOP. I know assembly language for x86 and so forth. I would like to be able to do logging and other sorts of things using the familiar before/after/around constructs. I would like to be able to specify certain instructions or sequences/patterns of consecutive instructions as what to do a pointcut on since assembly/machine language is not exactly the most semantically rich computer language on the planet. If debugger and linker symbols are available, naturally, I would like to be able to use them to identify subroutines' entry points , branch/call/jump target addresses, symbolic data addresses, etc. I would like the ability to send notifications out to other diagnostic tools. Thus, support for sending data through connection-oriented sockets and datagrams is highly desirable. So is normal logging to files, UI, etc. This can be done using the action part of an aspect to make a function call, but then there are portability issues so the tool needs to support a flexible, well-abstracted logging/notifying mechanism with a clean, simple yet flexible. The goal is rapid-QA. The idea is to be able to share aspect source code braodly within communties as well as publicly. So, there needs to be a declarative security policy file that users can share. This insures that nothing untoward that is hidden directly or indirectly in an aspect source file slips by the execution manager. The policy file format needs to be simple to read, write, modify, understand, type-in, edit, and generate. Sort of like Java .policy files. Think the exact opposite of anything resembling XML Schema files and you get the idea. Is there such a tool in existence already?

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• using in-line asm to write a for loop with 2 comparisons

  - by aCuria

  I want to convert the for loop in the following code into assembly but i am not sure how to start. An explanation of how to do it and why it works would be appreciated. I am using VS2010, C++, writing for the x86. The code is as follows: for (n = 0; norm2 < 4.0 && n < N; ++n) { __asm{ ///a*a - b*b + x fld a // a fmul st(0), st(0) // aa fld b // b aa fmul st(0), st(0) // bb aa fsub // (aa-bb) // st(0) - st(1) fld x // x (aa-bb) fadd // (aa-bb+x) /// 2.0*a*b + y; fld d // d (aa-bb+x) fld a // d a (aa-bb+x) fmul // ad (aa-bb+x) fld b // b ad (aa-bb+x) fmul // abd (aa-bb+x) fld y // y adb (aa-bb+x) fadd // b:(adb+y) a:(aa-bb+x) fld st(0) //b b:(adb+y) a:(aa-bb+x) fmul st(0), st(0) // bb b:(adb+y) a:(aa-bb+x) fld st(2) // a bb b:(adb+y) a:(aa-bb+x) fmul st(0), st(0) // aa bb b:(adb+y) a:(aa-bb+x) fadd // aa+bb b:(adb+y) a:(aa-bb+x) fstp norm2 // store aa+bb to norm2, st(0) is popped. fstp b fstp a } }

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• Recursion in assembly?

  - by Davis

  I'm trying to get a better grasp of assembly, and I am a little confused about how to recursively call functions when I have to deal with registers, popping/pushing, etc. I am embedding x86 assembly in C++. Here I am trying to make a method which given an array of integers will build a linked list containing these integers in the order they appear in the array. I am doing this by calling a recursive function: insertElem (struct elem *head, struct elem *newElem, int data) -head: head of the list -data: the number that will be inserted at the end of a list -newElem: points to the location in memory where I will store the new element (data field) My problem is that I keep overwriting the registers instead of a typical linked list. For example, if I give it an array {2,3,1,8,3,9} my linked-list will return the first element (head) and only the last element, because the elements keep overwriting each other after head is no longer null. So here my linked list looks something like: 2--9 instead of 2--3--1--8--3--9 I feel like I don't have a grasp on how to organize and handle the registers. newElem is in EBX and just keeps getting rewritten. Thanks in advance!

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• Flushing writes in buffer of Memory Controller to DDR device

  - by Rohit

  At some point in my code, I need to push the writes in my code all the way to the DIMM or DDR device. My requirement is to ensure the write reaches the row,ban,column of the DDR device on the DIMM. I need to read what I've written to the main memory. I do not want caching to get me the value. Instead after writing I want to fetch this value from main memory(DIMM's). So far I've been using Intel's x86 instruction wbinvd(write back and invalidate cache). However this means the caches and TLB are flushed. Write-back requests go to the main memory. However, there is a reasonable amount of time this data might reside in the write buffer of the Memory Controller( Intel calls it integrated memory controller or IMC). The Memory Controller might take some more time depending on the algorithm that runs in the Memory Controller to handle writes. Is there a way I force all existing or pending writes in the write buffer of the memory controller to the DRAM devices ?? What I am looking for is something more direct and more low-level than wbinvd. If you could point me to right documents or specs that describe this I would be grateful. Generally, the IMC has a several registers which can be written or read from. From looking at the specs for that for the chipset I could not find anything useful. Thanks for taking the time to read this.

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• Is Oracle Ready to Dump AMD From Sun's x86 Server Lineup?

  Sun traditionally offered both AMD and Intel processors in its x86 server lineup. Now, it's looking like AMD's Opteron won't make the cut under Oracle's ownership.

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• Surface Pro sera commercialisée entre 899$ et 999$, la tablette x86 de Microsoft officiellement disponible en janvier 2013

  Microsoft dévoile Surface deux modèles de tablettes Windows 8 ARM et Intel Microsoft a ouvert le bal des dispositifs sous Windows 8, et annoncé officiellement le lancement de deux tablettes sous le système d'exploitation. L'OS entièrement repensé, avec une nouvelle interface utilisateur, un support des architectures ARM et plusieurs autres nouveautés est l'occasion pour l'éditeur de se lancer pour la première fois dans la construction de ses propres dispositifs sous Windows. Baptisés Microsoft Surface, les deux modèles de tablettes sur deux puces différentes (ARM et X86) se positionnent comme de sérieux concurrents à l'iPad d'Apple qui domine largement le marché actuellement.

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• How to get the most out of the book 'Practical Reverse Engineering: x86, x64, ARM, Windows Kernel, Reversing Tools, and Obfuscation'? [on hold]

  - by user3565816

  I was reading the book Practical Reverse Engineering: x86, x64, ARM, Windows Kernel, Reversing Tools, and Obfuscation by Bruce Dang et. al, as I am interested in learning about Reverse Engineering. However I found that most of what I was reading made very little sense to me and I felt confused. So my question is, what material should I go through first before returning to this book so that I can get the most out of it? Thanks in advance for your assistance.

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• Does OEM license of x86 Windows 7 extend to the x64 version?

  - by Michael Teper

  I bought a laptop that came preinstalled with 2GB of RAM and Windows 7 Professional x86. I upgraded to 8GB RAM, and naturally want to install the x64 version of Windows. The laptop came without media, with the option to create a bootable restore disc, which is, of course Win7 x86. Question 1: does my Win7 license cover both x86 and x64 versions? Question 2: is there a legitimate way to acquire x64 install media (e.g. from Microsoft) for a nominal fee? (believe it or not, the laptop manufacturer support had the gall to suggest that I should have bought a differently configured machine in the first place) Thank you!

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• Visual Studio loading the right (x86 or x64) dll!

  - by Richard González Alberto

  Hi, I'm working on visual studio in an x86. I would like to build my application for both x32 and x64. But i need to use the sqlite .net connector wich has a dll for x86 apps and another dll for x64 apps. How do i configure my visual studio to load a reference when my configuration is x64 and another when my configuration is x86? Thanks, Richard.

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• Why Does 64-Bit Windows Need a Separate “Program Files (x86)” Folder?

  - by Jason Fitzpatrick

  If you’re currently using any 64-bit version of Windows you may have noticed there are two “Program Files” folders, one for 64-bit and one for 32-bit apps. Why does Windows need to sub-divide them? Read on to see why. Today’s Question & Answer session comes to us courtesy of SuperUser—a subdivision of Stack Exchange, a community-drive grouping of Q&A web sites. Why Does 64-Bit Windows Need a Separate “Program Files (x86)” Folder? Why Your Android Phone Isn’t Getting Operating System Updates and What You Can Do About It How To Delete, Move, or Rename Locked Files in Windows

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• VS 2010 SP1 installation error: Generic Trust Failure

  - by guybarrette

  I tried to install VS SP1 from the ISO (not the Web Installer) on a machine and ended up with a non successful install with the following error: Generic Trust Failure.   The log file said: Possible transient lock. WinVerifyTrust failed with error: 2148204800 [3/9/2011, 10:6:29]Possible transient lock. WinVerifyTrust failed with error: 2148204800 [3/9/2011, 10:6:30]C:\Dev\VSSP1\VS2010SP1\VC10sp1-KB983509-x86.msp - Signature verification for file VC10sp1-KB983509-x86.msp (C:\Dev\VSSP1\VS2010SP1\VC10sp1-KB983509-x86.msp) failed with error 0x800b0100 (No signature was present in the subject.) [3/9/2011, 10:6:30] C:\Dev\VSSP1\VS2010SP1\VC10sp1-KB983509-x86.msp Signature could not be verified for VC10sp1-KB983509-x86.msp [3/9/2011, 10:6:30]No FileHash provided. Cannot perform FileHash verification for VC10sp1-KB983509-x86.msp [3/9/2011, 10:6:30]File VC10sp1-KB983509-x86.msp (C:\Dev\VSSP1\VS2010SP1\VC10sp1-KB983509-x86.msp), failed authentication. (Error = -2146762496). It is recommended that you delete this file and retry setup again. Since I didn’t want to download the 1.5GB ISO a second time, I tried the Web installer and this time it worked like a charm.  Was the problem with a corrupt download or a file missing a signature I can’t say. var addthis_pub="guybarrette";

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