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  • Segment register, IP register and memory addressing issue!

    - by Zia ur Rahman
    In the following text I asked two questions and I also described that what I know about these question so that you can understand my thinking. Your precious comments about the below text are required. Below is the Detail of 1ST Question As we know that if we have one mega byte memory then we need 20 bits to address this memory. Another thing is each memory cell has a physical address which is of 20 bits in 1Mb memory. IP register in IAPX88 is of 16 bits. Now my point of view is, we can not access the memory at all by the IP register because the memory need 20 bit address to be addressed but the IP register is of 16 bits. If we have a memory of 64k then IP register can access this memory because this memory needs 16 bits to be addressed. But incase of 1mb memory IP can’t.tell me am i right or not if not why? Suppose physical address of memory is 11000000000000000101 Now how can we access this memory location by 16 bits. Below is the detail of Next Question: My next question is , suppose IP register is pointing to memory location, and the segment register is also pointing to a memory location (start of the segment), the memory is of 1MB, how we can access a memory location by these two 16 bit registers tell me the sequence of steps how the 20 bits addressable memory location is accessed . If your answer is, we take the segment value and we shift it left by 4 bits and then add the IP value into it to get the 20 bits address, then this raises another question that is the address bus (the address bus should be 20 bits wide), the registers both the segment register and the IP register are of 16 bits each , now if address bus is 20 bits wide then this means that the address bus is connected to both these registers. If its not the case then another thing that comes into my mind is that both these registers generate a 20 bit address and there would be a register which can store 20 bits and this register would be connected to both these register and the address bus as well.

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  • "call" instruction that seemingly jumps into itself

    - by Checkers
    I have gcc 4 compiling some C++ code into the following (from objdump): 00000030 <func()>: 30: 55 push %ebp 31: 89 e5 mov %esp,%ebp 33: 56 push %esi 34: 31 f6 xor %esi,%esi 36: 53 push %ebx 37: bb 00 00 00 00 mov $0x0,%ebx 3c: 83 ec 40 sub $0x40,%esp 3f: c7 04 24 01 00 00 00 movl $0x1,(%esp) 46: e8 fc ff ff ff call 47 <func()+0x17> 4b: 8d 55 ec lea 0xffffffec(%ebp),%edx 4e: 89 14 24 mov %edx,(%esp) 51: 89 5c 24 04 mov %ebx,0x4(%esp) 55: 89 74 24 08 mov %esi,0x8(%esp) 59: 89 44 24 0c mov %eax,0xc(%esp) ; the rest of the function is omitted I can't understand the operand of call instruction here, why does it call into itself, but with one byte off?

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  • Programatically detect number of physical processors/cores or if hyper-threading is active on Window

    - by HTASSCPP
    I have a multithreaded c++ application that runs on Windows, Mac and a few Linux flavours. To make a long story short: Inorder for it to run at maximum efficiency I have to be able to instantiate a single thread per physical processor/core. Creating more threads than there are physical processors/cores degrades the performance of my program considerably. I can already correctly detect the number of logical processors/cores correctly on all three of these platforms. To be able to detect the number of physical processors/cores correctly I'll have to detect if hyper-treading is supported AND active. My question therefore is if there is a way to detect whether hyperthreading is supported AND ENABLED? If so, how exactly.

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  • Hello World bootloader not working!

    - by Newbie
    Hello. I've been working through the tutorials on this webpage which progressively creates a bootloader that displays Hello World. The 2nd tutorial (where we attempt to get an "A" to be output) works perfectly, and yet the 1st tutorial doesn't work for me at all! (The BIOS completely ignores the floppy disk and boots straight into Windows). This is less of an issue, although any explanations would be appreciated. The real problem is that I can't get the 3rd tutorial to work. Instead on outputting "Hello World", I get an unusual character (and blinking cursor) in the bottom-left corner of the screen. It looks a bit like a smiley face inside a rounded rectangle. Does anyone know how to get Hello World to display as it should?

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  • What's the output object file format of GNU assembler as?

    - by smwikipedia
    I have checked the assembler options of GNU assembler as and I didn't find an option to specify the output object file format. If I am using the following command as -o foobar.o foobar.s What object file format will I get? The as manual says that "The GNU as can be configured to produce several alternative object file formats." But how? How can I change it to a ELF format? Many thanks.

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  • function's return address is different from its supposed value, buffer overflow,

    - by ultrajohn
    Good day everyone! I’m trying to understand how buffer overflow works. I’m doing this for my project in a computer security course I’m taking. Right now, I’m in the process of determining the address of the function’s return address which I’m supposed to change to perform a buffer overflow attack. I’ve written a simple program based from an example I’ve read in the internet. What this program does is it creates an integer pointer that will be made to point to the address of the function return address in the stack. To do this, (granted I understand how a function/program variables get organized in the stack), I add 8 to the buffer variable’ address and set it as the value of ret. I’m not doing anything here that would change the address contained in the location of func’s return address. here's the program: Output of the program when gets excecuted: As you can see, I’m printing the address of the variables buffer and ret. I’ve added an additional statement printing the value of the ret variable (supposed location of func return address, so this should print the address of the next instruction which will get executed after func returns from execution). Here is the dump which shows the supposed address of the instruction to be executed after func returns. (Underlined in green) As you can see, that value is way different from the value printed contained in the variable ret. My question is, why are they different? (of course in the assumption that what I’ve done are all right). Else, what have I done wrong? Is my understanding of the program’s runtime stack wrong? Please, help me understand this. My project is due nextweek and I’ve barely touched it yet. I’m sorry if I’m being demanding, I badly need your help.

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  • assembler - understanding of some lines

    - by user1571682
    with the help of some tutorials, i wrote a little piece of code, to display me a string, after booting from my floppy. my problem is now, that dont understand some lines, were i hope u can help me, or just tell me, if im right. code: mov ax, 07C0h add ax, 288 ; (512 + 4096) / 16 = 288 mov ss, ax mov sp, 4096 mov ax, 07C0h mov ds, ax line: start the program @ the adress 07C0h (could i change this?) Add space for 288 paragraphs to ax ? Space of 4096 bytes for my program (to store variables and stuff?) Go to the start adress ? thanks for your help.

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  • Far jump in ntdll.dll's internal ZwCreateUserProcess

    - by user49164
    I'm trying to understand how the Windows API creates processes so I can create a program to determine where invalid exes fail. I have a program that calls kernel32.CreateProcessA. Following along in OllyDbg, this calls kernel32.CreateProcessInternalA, which calls kernel32.CreateProcessInternalW, which calls ntdll.ZwCreateUserProcess. This function goes: mov eax, 0xAA xor ecx, ecx lea edx, dword ptr [esp+4] call dword ptr fs:[0xC0] add esp, 4 retn 0x2C So I follow the call to fs:[0xC0], which contains a single instruction: jmp far 0x33:0x74BE271E But when I step this instruction, Olly just comes back to ntdll.ZwCreateUserProcess at the add esp, 4 right after the call (which is not at 0x74BE271E). I put a breakpoint at retn 0x2C, and I find that the new process was somehow created during the execution of add esp, 4. So I'm assuming there's some magic involved in the far jump. I tried to change the CS register to 0x33 and EIP to 0x74BE271E instead of actually executing the far jump, but that just gave me an access violation after a few instructions. What's going on here? I need to be able to delve deeper beyond the abstraction of this ZwCreateUserProcess to figure out how exactly Windows creates processes.

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  • Order of the [BITS 16] and [ORG 0x0000] directives

    - by dboarman-FissureStudios
    I am beginning some experimentation in writing a kernel and having fun doing it. I have the basic boot-loader done and the following directives: [BITS 16] [ORG 0x0000] In the kernel tutorial, however, it starts with: [ORG 0x0000] [BITS 16] I was wondering if the order in which these directives are given makes a difference? I am using NASM version 2.06rc2, OpenSUSE 11.2

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  • Read a buffer of unknown size (Console input)

    - by Sanarothe
    Hi. I'm a little behind in my X86 Asm class, and the book is making me want to shoot myself in the face. The examples in the book are insufficient and, honestly, very frustrating because of their massive dependencies upon the author's link library, which I hate. I wanted to learn ASM, not how to call his freaking library, which calls more of his library. Anyway, I'm stuck on a lab that requires console input and output. So far, I've got this for my input: input PROC INVOKE ReadConsole, inputHandle, ADDR buffer, Buf - 2, ADDR bytesRead, 0 mov eax,OFFSET buffer Ret input EndP I need to use the input and output procedures multiple times, so I'm trying to make it abstract. I'm just not sure how to use the data that is set to eax here. My initial idea was to take that string array and manually crawl through it by adding 8 to the offset for each possible digit (Input is integer, and there's a little bit of processing) but this doesn't work out because I don't know how big the input actually is. So, how would you swap the string array into an integer that could be used? Full code: (Haven't done the integer logic or the instruction string output because I'm stuck here.) include c:/irvine/irvine32.inc .data inputHandle HANDLE ? outputHandle HANDLE ? buffer BYTE BufSize DUP(?),0,0 bytesRead DWORD ? str1 BYTE "Enter an integer:",0Dh, 0Ah str2 BYTE "Enter another integer:",0Dh, 0Ah str3 BYTE "The higher of the two integers is: " int1 WORD ? int2 WORD ? int3 WORD ? Buf = 80 .code main PROC call handle push str1 call output call input push str2 call output call input push str3 call output call input main EndP larger PROC Ret larger EndP output PROC INVOKE WriteConsole Ret output EndP handle PROC USES eax INVOKE GetStdHandle, STD_INPUT_HANDLE mov inputHandle,eax INVOKE GetStdHandle, STD_INPUT_HANDLE mov outputHandle,eax Ret handle EndP input PROC INVOKE ReadConsole, inputHandle, ADDR buffer, Buf - 2, ADDR bytesRead, 0 mov eax,OFFSET buffer Ret input EndP END main

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  • GCC emits extra code for boost::shared_ptr dereference

    - by Checkers
    I have the following code: #include <boost/shared_ptr.hpp> struct Foo { int a; }; static int A; void func_shared(const boost::shared_ptr<Foo> &foo) { A = foo->a; } void func_raw(Foo * const foo) { A = foo->a; } I thought the compiler would create identical code, but for shared_ptr version an extra seemingly redundant instruction is emitted. Disassembly of section .text: 00000000 <func_raw(Foo*)>: 0: 55 push ebp 1: 89 e5 mov ebp,esp 3: 8b 45 08 mov eax,DWORD PTR [ebp+8] 6: 5d pop ebp 7: 8b 00 mov eax,DWORD PTR [eax] 9: a3 00 00 00 00 mov ds:0x0,eax e: c3 ret f: 90 nop 00000010 <func_shared(boost::shared_ptr<Foo> const&)>: 10: 55 push ebp 11: 89 e5 mov ebp,esp 13: 8b 45 08 mov eax,DWORD PTR [ebp+8] 16: 5d pop ebp 17: 8b 00 mov eax,DWORD PTR [eax] 19: 8b 00 mov eax,DWORD PTR [eax] 1b: a3 00 00 00 00 mov ds:0x0,eax 20: c3 ret I'm just curious, is this necessary, or it is just an optimizer's shortcoming? Compiling with g++ 4.1.2, -O3 -NDEBUG.

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  • Writing to EEPROM on PIC

    - by JB
    Are there any PIC microcontroller programmers here? I'm learning some PIC microcontroller programming using a pickit2 and the 16F690 chip that came with it. I'm working through trying out the various facilities at the moment. I can sucessfully read a byte from the EEPROM in code if I set the EEPROM vaklue in MPLAB but I don't seem to be able to modify the value using the PIC itsself. Simply nothing happens and I don't read back the modified value, I always get the original which implies to me that the write isn't working? This is my code for that section, am I missing something? I know I'm doing a lot of unnecessary bank switches, I added most of them to ensure that being on the wrong bank wasn't the issue. ; ------------------------------------------------------ ; Now SET the EEPROM location ZERO to 0x08 ; ------------------------------------------------------ BANKSEL EEADR CLRF EEADR ; Set EE Address to zero BANKSEL EEDAT MOVLW 0x08 ; Store the value 0x08 in the EEPROM MOVWF EEDAT BANKSEL EECON1 BSF EECON1, WREN ; Enable writes to the EEPROM BANKSEL EECON2 MOVLW 0x55 ; Do the thing we have to do so MOVWF EECON2 ; that writes can work MOVLW 0xAA MOVWF EECON2 BANKSEL EECON1 BSF EECON1, WR ; And finally perform the write WAIT BTFSC EECON1, WR ; Wait for write to finish GOTO WAIT BANKSEL PORTC ; Just to make sure we are on the right bank

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  • 16 bit processor , memory addressing and memory cells

    - by Zia ur Rahman
    Suppose the accumulater register of the processor is of 16 bit , now we can call this processor as 16 bit processor, that is this processor supports 16 bit addressing. now my question is how we can calculate the number of memory cells that can be addressed by 16 bit addressing? according to my calculation 2 to the power 16 becomes 65055 it means the memory have 65055 cells now if we take 1KB=1000 Bytes then this becomes 65055/1000=65.055 now this means that 65 kilo bytes memory can be used with the processor having 16 bit addressing. now if we take 1KB=1024 Bytes then this becomes 65055/1024=63.5 ,it means that 63 kilo bytes memory can be used with this processor, but people say that 64 kilo bytes memory can be used. Now tell me am i right or wrong and why i am wrong why people say that 64kb memory can be used with the processor having 16 bit addressing?

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  • Why is my boot loader's stack segment at 0x3FF (end of Real Mode IVT)?

    - by Laurimann
    Title says it all. "address 0x500 is the last one used by the BIOS" - en.wikipedia.org/wiki/Master_boot_record "00000000-000003FF Real Mode IVT (Interrupt Vector Table)" - wiki.osdev.org/Memory_Map_%28x86%29 So can you tell me why NASM places my .com file's stack pointer to 0x3FF while my instruction pointer starts at 0x7c00? To me the most intuitive place for SP would be right below 0x7c00. Thanks.

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  • When is assembler faster than C?

    - by Adam Bellaire
    One of the stated reasons for knowing assembler is that, on occasion, it can be employed to write code that will be more performant than writing that code in a higher-level language, C in particular. However, I've also heard it stated many times that although that's not entirely false, the cases where assembler can actually be used to generate more performant code are both extremely rare and require expert knowledge of and experience with assembler. This question doesn't even get into the fact that assembler instructions will be machine-specific and non-portable, or any of the other aspects of assembler. There are plenty of good reasons for knowing assembler besides this one, of course, but this is meant to be a specific question soliciting examples and data, not an extended discourse on assembler versus higher-level languages. Can anyone provide some specific examples of cases where assembler will be faster than well-written C code using a modern compiler, and can you support that claim with profiling evidence? I am pretty confident these cases exist, but I really want to know exactly how esoteric these cases are, since it seems to be a point of some contention.

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  • invalid effective address calculation!

    - by Zia ur Rahman
    Hay Dear! Please look at the following program, the error is invalid effective address calculation and i have mentioned that line please tell me why its invalid effective address calculation here is the program [org 0x100] jmp start array1: dw 10,15,20,25,30,35,40,45,50,55 array2: dw 15,10,20,35,40,30,55,50,25,45 start: mov bx,0 mov dx,0 loop: mov ax,[array2+bx] cmp ax,[array1+cx]//here is the error invalid effective address calculation jne NextElementOfArray1 NextElementOfArray2: add bx,2 cmp bx,20 je end mov cx,0 jmp loop NextElementOfArray1: add cx,2 cmp cx,20 je NextElementOfArray2 jmp loop end: mov ax,0x4c00 int 0x21

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  • ARMv6 FIQ, acknowledge interrupt

    - by fastmonkeywheels
    I'm working with an i.mx35 armv6 core processor. I have Interrupt 62 configured as a FIQ with my handler installed and being called. My handler at the moment just toggles an output pin so I can test latency with a scope. With the code below, once I trigger the FIQ it continues forever as fast as it can, apparently not being acknowledged. I'm triggering the FIQ by means of the Interrupt Force Register so I'm assured that the source isn't triggering it this fast. If I disable Interrupt 62 in the AVIC in my FIQ routine the interrupt only triggers once. I have read the sections on the VIC Port in the ARM1136JF-S and ARM1136J-S Technical Reference Manual and it covers proper exit procedure. I'm only having one FIQ handler so I have no need to branch. The line that I don't understand is: STR R0, [R8,#AckFinished] I'm not sure what AckFinished is supposed to be or what this command is supposed to do. My FIQ handler is below: ldr r9, IOMUX_ADDR12 ldr r8, [r9] orr r8, #0x08 @ top LED str r8,[r9] @turn on LED bic r8, #0x08 @ top LED str r8,[r9] @turn off LED subs pc, r14, #4 IOMUX_ADDR12: .word 0xFC2A4000 @remapped IOMUX addr My handler returns just fine and normal system operation resumes if I disable it after the first go, otherwise it triggers constantly and the system appears to hang. Do you think my assumption is right that the core isn't acknowledging the AVIC or could there be another cause of this FIQ triggering?

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  • IA-32: Pushing a byte onto a stack isn't possible on Pentium, why?

    - by Tim Green
    Hi, I've come to learn that you cannot push a byte directly onto the Intel Pentium's stack, can anyone explain this to me please? The reason that I've been given is because the esp register is word-addressable (or, that is the assumption in our model) and it must be an "even address". I would have assumed decrementing the value of some 32-bit binary number wouldn't mess with the alignment of the register, but apparently I don't understand enough. I have tried some NASM tests and come up that if I declare a variable (bite db 123) and push it on to the stack, esp is decremented by 4 (indicating that it pushed 32-bits?). But, "push byte bite" (sorry for my choice of variable names) will result in a kind error: test.asm:10: error: Unsupported non-32-bit ELF relocation Any words of wisdom would be greatly appreciated during this troubled time. I am first year undergraduate so sorry for my naivety in any of this. Tim

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