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• Write a maximum of two instructions to clear, set and complement some bits in the AL register

  - by Nick

  You are required to write a maximum of two instructions in assembly to do the following: Clear bits 0 and 7 of register AL, i.e. make them 0 Set bits 3 and 4 of register AL, i.e. make them 1. Complement bits 1 and 5 of register AL. Keep all other bits in the register AL as is without changing their values.

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• What is the max possible size of an 32x32px .ico file?

  - by cvack

  Titles says it all. I'm making a favicon.ico script, and i need to know the max amount of bits possible.

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• What is the best way to do Bit Field manipulation in Python?

  - by ZebZiggle

  I'm reading some MPEG Transport Stream protocol over UDP and it has some funky bitfields in it (length 13 for example). I'm using the "struct" library to do the broad unpacking, but is there a simple way to say "Grab the next 13 bits" rather than have to hand-tweak the bit manipulation? I'd like something like the way C does bit fields (without having to revert to C). Suggestions?

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• Set a C++ bitset from a binary input steam

  - by Jon

  I have an input stream from a binary file. I want to create a bitset for the first 5 bits of the stream. Here is the code I have so far: ifstream is; is.open ("bin_file.out", ios::binary ); bitset<5> first_five_bits; is >> first_five_bits; // always is set to default 00000

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• In C, would !~b ever be faster than b == 0xff ?

  - by James Morris

  From a long time ago I have a memory which has stuck with me that says comparisons against zero are faster than any other value (ahem Z80). In some C code I'm writing I want to skip values which have all their bits set. Currently the type of these values is char but may change. I have two different alternatives to perform the test: if (!~b) /* skip */ and if (b == 0xff) /* skip */ Apart from the latter making the assumption that b is an 8bit char whereas the former does not, would the former ever be faster due to the old compare to zero optimization trick, or are the CPUs of today way beyond this kind of thing?

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• copying files from one windows server to another

  - by Saju Pillai

  I have to copy a file from a windows 2008 server to one or more windows 2008 servers. I have accounts on the target machines with enough privileges to let me use powershell remoting and use wmi. The remote machines do not run ftp, ssh or similar file transfer mechanisms. I am not allowed to install software or run new services on the target server. I can run services on the source server. The file copy action must be initiated from the source server. i.e. I cannot manually logon to the target machines and initiate the copy - though an automated way to do this is acceptable. Is it possible to use WMI or PowerShell Remoting to push or pull the file from the source to the target ? Is it possible to invoke some sort of built in http client or invoke the BITS service/agent on the remote servers to pull files from the source server ? Other suggestions please.

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• Is this a valid implementation of the repository pattern?

  - by user1578653

  I've been reading up about the repository pattern, with a view to implementing it in my own application. Almost all examples I've found on the internet use some kind of existing framework rather than showing how to implement it 'from scratch'. Here's my first thoughts of how I might implement it - I was wondering if anyone could advise me on whether this is correct? I have two tables, named CONTAINERS and BITS. Each CONTAINER can contain any number of BITs. I represent them as two classes: class Container{ private $bits; private $id; //...and a property for each column in the table... public function __construct(){ $this->bits = array(); } public function addBit($bit){ $this->bits[] = $bit; } //...getters and setters... } class Bit{ //some properties, methods etc... } Each class will have a property for each column in its respective table. I then have a couple of 'repositories' which handle things to do with saving/retrieving these objects from the database: //repository to control saving/retrieving Containers from the database class ContainerRepository{ //inject the bit repository for use later public function __construct($bitRepo){ $this->bitRepo = $bitRepo; } public function getById($id){ //talk directly to Oracle here to all column data into the object //get all the bits in the container $bits = $this->bitRepo->getByContainerId($id); foreach($bits as $bit){ $container->addBit($bit); } //return an instance of Container } public function persist($container){ //talk directly to Oracle here to save it to the database //if its ID is NULL, create a new container in database, otherwise update the existing one //use BitRepository to save each of the Bits inside the Container $bitRepo = $this->bitRepo; foreach($container->bits as $bit){ $bitRepo->persist($bit); } } } //repository to control saving/retrieving Bits from the database class BitRepository{ public function getById($id){} public function getByContainerId($containerId){} public function persist($bit){} } Therefore, the code I would use to get an instance of Container from the database would be: $bitRepo = new BitRepository(); $containerRepo = new ContainerRepository($bitRepo); $container = $containerRepo->getById($id); Or to create a new one and save to the database: $bitRepo = new BitRepository(); $containerRepo = new ContainerRepository($bitRepo); $container = new Container(); $container->setSomeProperty(1); $bit = new Bit(); $container->addBit($bit); $containerRepo->persist($container); Can someone advise me as to whether I have implemented this pattern correctly? Thanks!

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• Segment register, IP register and memory addressing issue!

  - by Zia ur Rahman

  In the following text I asked two questions and I also described that what I know about these question so that you can understand my thinking. Your precious comments about the below text are required. Below is the Detail of 1ST Question As we know that if we have one mega byte memory then we need 20 bits to address this memory. Another thing is each memory cell has a physical address which is of 20 bits in 1Mb memory. IP register in IAPX88 is of 16 bits. Now my point of view is, we can not access the memory at all by the IP register because the memory need 20 bit address to be addressed but the IP register is of 16 bits. If we have a memory of 64k then IP register can access this memory because this memory needs 16 bits to be addressed. But incase of 1mb memory IP can’t.tell me am i right or not if not why? Suppose physical address of memory is 11000000000000000101 Now how can we access this memory location by 16 bits. Below is the detail of Next Question: My next question is , suppose IP register is pointing to memory location, and the segment register is also pointing to a memory location (start of the segment), the memory is of 1MB, how we can access a memory location by these two 16 bit registers tell me the sequence of steps how the 20 bits addressable memory location is accessed . If your answer is, we take the segment value and we shift it left by 4 bits and then add the IP value into it to get the 20 bits address, then this raises another question that is the address bus (the address bus should be 20 bits wide), the registers both the segment register and the IP register are of 16 bits each , now if address bus is 20 bits wide then this means that the address bus is connected to both these registers. If its not the case then another thing that comes into my mind is that both these registers generate a 20 bit address and there would be a register which can store 20 bits and this register would be connected to both these register and the address bus as well.

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• UTF-8 bit representation

  - by Yanick Rochon

  I'm learning about UTF-8 standards and this is what I'm learning : Definition and bytes used UTF-8 binary representation Meaning 0xxxxxxx 1 byte for 1 à 7 bits chars 110xxxxx 10xxxxxx 2 bytes for 8 à 11 bits chars 1110xxxx 10xxxxxx 10xxxxxx 3 bytes for 12 à 16 bits chars 11110xxx 10xxxxxx 10xxxxxx 10xxxxxx 4 bytes for 17 à 21 bits chars And I'm wondering, why 2 bytes UTF-8 code is not 10xxxxxx instead, thus gaining 1 bit all the way up to 22 bits with a 4 bytes UTF-8 code? The way it is right now, 64 possible values are lost (from 1000000 to 10111111). I'm not trying to argue the standards, but I'm wondering why this is so? ** EDIT ** Even, why isn't it UTF-8 binary representation Meaning 0xxxxxxx 1 byte for 1 à 7 bits chars 110xxxxx xxxxxxxx 2 bytes for 8 à 13 bits chars 1110xxxx xxxxxxxx xxxxxxxx 3 bytes for 14 à 20 bits chars 11110xxx xxxxxxxx xxxxxxxx xxxxxxxx 4 bytes for 21 à 27 bits chars ...? Thanks!

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• /usr/include/stdc-predef.h:30:26: fatal error: bits/predefs.h: No such file or directory

  - by G_T

  Im trying to locally install a program which is written in C++. I have downloaded the program and am attempting to use the "make" command to compile the program as the programs instructions dictate. However when I do I get this error: /usr/include/stdc-predef.h:30:26: fatal error: bits/predefs.h: No such file or directory compilation terminated. Looking around on the internet some people seem to address this problem by sudo apt-get install libc6-dev-i386 I checked to see if this package was installed and it was not. When I try to install it I get E: Unable to locate package libc6-dev-i386 I have already run sudo apt get update Im sure this is a rookie question but any help is appreciated, I'm running 13.10 32-bit.

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• Best algorithm to count the number of set bits in a 32-bit integer?

  - by Matt Howells

  8 bits representing the number 7 look like this: 00000111 Three bits are set. What is the best algorithm to determine the number of set bits in a 32-bit integer?

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• Finding N contiguous zero bits in an integer to the left of the MSB position of another integer

  - by James Morris

  The problem is: given an integer val1 find the position of the highest bit set (Most Significant Bit) then, given a second integer val2 find a contiguous region of unset bits, with the minimum number of zero bits given by width to the left of the position (ie, in the higher bits). Here is the C code for my solution: typedef unsigned int t; unsigned const t_bits = sizeof(t) * CHAR_BIT; _Bool test_fit_within_left_of_msb( unsigned width, t val1, t val2, unsigned* offset_result) { unsigned offbit = 0; unsigned msb = 0; t mask; t b; while(val1 >>= 1) ++msb; while(offbit + width < t_bits - msb) { mask = (((t)1 << width) - 1) << (t_bits - width - offbit); b = val2 & mask; if (!b) { *offset_result = offbit; return true; } if (offbit++) /* this conditional bothers me! */ b <<= offbit - 1; while(b <<= 1) offbit++; } return false; } Aside from faster ways of finding the MSB of the first integer, the commented test for a zero offbit seems a bit extraneous, but necessary to skip the highest bit of type t if it is set. I have also implemented similar algorithms but working to the right of the MSB of the first number, so they don't require this seemingly extra condition. How can I get rid of this extra condition, or even, are there far more optimal solutions? Edit: Some background not strictly required. The offset result is a count of bits from the high bit, not from the low bit as maybe expected. This will be part of a wider algorithm which scans a 2D array for a 2D area of zero bits. Here, for testing, the algorithm has been simplified. val1 represents the first integer which does not have all bits set found in a row of the 2D array. From this the 2D version would scan down which is what val2 represents. Here's some output showing success and failure: t_bits:32 t_high: 10000000000000000000000000000000 ( 2147483648 ) --------- ----------------------------------- *** fit within left of msb test *** ----------------------------------- val1: 00000000000000000000000010000000 ( 128 ) val2: 01000001000100000000100100001001 ( 1091569929 ) msb: 7 offbit:0 + width: 8 = 8 mask: 11111111000000000000000000000000 ( 4278190080 ) b: 01000001000000000000000000000000 ( 1090519040 ) offbit:8 + width: 8 = 16 mask: 00000000111111110000000000000000 ( 16711680 ) b: 00000000000100000000000000000000 ( 1048576 ) offbit:12 + width: 8 = 20 mask: 00000000000011111111000000000000 ( 1044480 ) b: 00000000000000000000000000000000 ( 0 ) offbit:12 iters:10 ***** found room for width:8 at offset: 12 ***** ----------------------------------- *** fit within left of msb test *** ----------------------------------- val1: 00000000000000000000000001000000 ( 64 ) val2: 00010000000000001000010001000001 ( 268469313 ) msb: 6 offbit:0 + width: 13 = 13 mask: 11111111111110000000000000000000 ( 4294443008 ) b: 00010000000000000000000000000000 ( 268435456 ) offbit:4 + width: 13 = 17 mask: 00001111111111111000000000000000 ( 268402688 ) b: 00000000000000001000000000000000 ( 32768 ) ***** mask: 00001111111111111000000000000000 ( 268402688 ) offbit:17 iters:15 ***** no room found for width:13 ***** (iters is the count of iterations of the inner while loop)

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• How do make my encryption algorithm encrypt more than 128 bits?

  - by Ranhiru

  OK, now I have coded for an implementation of AES-128 :) It is working fine. It takes in 128 bits, encrypts and returns 128 bits So how do i enhance my function so that it can handle more than 128 bits? How do i make the encryption algorithm handle larger strings? Can the same algorithm be used to encrypt files? :) The function definition is public byte[] Cipher(byte[] input) { }

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• What data-structure/algorithm will allow me to send a list of key/value dictionaries using the least amount of bits?

  - by user12365

  I have server objects that have corresponding client objects. The data to be kept in sync is inside the server object's key/value dictionary. To keep the client objects in sync with the sever objects, I want the server to send the key/value dictionary every frame for each object. What data-structure/algorithm will allow me to send a list of key/value dictionaries using the least amount of bits? Bonus constraint 1: For each type of object, the values of some keys change more often than others. Bonus constraint 2: Memory usage on the server side is relatively expensive.

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• PureBasic 5.00 est sorti : support Cocoa et version 64 bits OS X, nouvel éditeur de fenêtres, et nombreuses fonctions 3D au menu

  La version 5.00 de PureBasic est sortie. On notera le support Cocoa et la version 64 bits pour OS X. Et un nouvel éditeur de fenêtres pour Windows, Linux et OS X. On trouve également la mise à jour des bibliothèques tierces, pas mal de bogues corrigés et bien sûr la bibliothèque 3D grandement améliorée. Voir la liste ci-dessous pour plus de détails. Cette version a nécessité une longue période de test d'après l'équipe de Fantaisie Software, qui travaille déjà sur la suivante. Les versions démos ne sont pas encore en ligne, mais cela ne saurait tarder. Pour ceux qui ont une licence, vous pouvez télécharger PureBasic 5.00 sur votre compte :

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• Java print binary number using bit-wise operator

  - by user69514

  Hi I am creating a method that will take a number and print it along with its binary representation. The problems is that my method prints all 0's for any positive number, and all 1's for any negative number private static void display( int number ){ System.out.print(number + "\t"); int mask = 1 << 31; for(int i=1; i<=32; i++) { if( (mask & number) != 0 ) System.out.print(1); else System.out.print(0); if( (i % 4) == 0 ) System.out.print(" "); } }

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• usb wifi dongle on ubuntu server, cannot install realtek driver RTL 8188cus

  - by Sandro Dzneladze

  I got cheap Ebay wifi dongle from HongKong, Im trying to set it up on my ubuntu server. Occasionally need to move server, so it cannot always be connected to router via lan. Anyhow, usb wifi came with a driver cd. I uploaded files to my home directory and tried to run install script (RTL 8188cus): sudo bash install.sh But I get error: Authentication requested [root] for make driver: make ARCH=x86_64 CROSS_COMPILE= -C /lib/modules/2.6.38-8-server/build M=/home/minime/RTL 8188cus/Linux/driver/rtl8192CU_linux_v2.0.1324.20110126 modules make[1]: Entering directory `/usr/src/linux-headers-2.6.38-8-server' make[1]: *** No rule to make target `8188cus/Linux/driver/rtl8192CU_linux_v2.0.1324.20110126'. Stop. make[1]: Leaving directory `/usr/src/linux-headers-2.6.38-8-server' make: *** [modules] Error 2 Compile make driver error: 2, Please check error Mesg Any ideas what Im doing wrong? There is another driver folder for linux called: RTL 81XX, which doesn't have install.sh at all! I tried to use make command, but I get: make: *** No targets specified and no makefile found. Stop. Any help? this is first time I'm installing driver from source. Im on Ubuntu 11.04 server. lsusb Bus 001 Device 002: ID 0bda:8176 Realtek Semiconductor Corp. lspci -nn 00:00.0 Host bridge [0600]: Intel Corporation N10 Family DMI Bridge [8086:a000] (rev 02) 00:02.0 VGA compatible controller [0300]: Intel Corporation N10 Family Integrated Graphics Controller [8086:a001] (rev 02) 00:1b.0 Audio device [0403]: Intel Corporation N10/ICH 7 Family High Definition Audio Controller [8086:27d8] (rev 02) 00:1c.0 PCI bridge [0604]: Intel Corporation N10/ICH 7 Family PCI Express Port 1 [8086:27d0] (rev 02) 00:1d.0 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #1 [8086:27c8] (rev 02) 00:1d.1 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #2 [8086:27c9] (rev 02) 00:1d.2 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #3 [8086:27ca] (rev 02) 00:1d.3 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB UHCI Controller #4 [8086:27cb] (rev 02) 00:1d.7 USB Controller [0c03]: Intel Corporation N10/ICH 7 Family USB2 EHCI Controller [8086:27cc] (rev 02) 00:1e.0 PCI bridge [0604]: Intel Corporation 82801 Mobile PCI Bridge [8086:2448] (rev e2) 00:1f.0 ISA bridge [0601]: Intel Corporation NM10 Family LPC Controller [8086:27bc] (rev 02) 00:1f.2 IDE interface [0101]: Intel Corporation N10/ICH7 Family SATA IDE Controller [8086:27c0] (rev 02) 00:1f.3 SMBus [0c05]: Intel Corporation N10/ICH 7 Family SMBus Controller [8086:27da] (rev 02) 01:00.0 Ethernet controller [0200]: Atheros Communications Device [1969:1083] (rev c0) sudo lshw description: Desktop Computer product: To Be Filled By O.E.M. (To Be Filled By O.E.M.) vendor: To Be Filled By O.E.M. version: To Be Filled By O.E.M. serial: To Be Filled By O.E.M. width: 64 bits capabilities: smbios-2.6 dmi-2.6 vsyscall64 vsyscall32 configuration: boot=normal chassis=desktop family=To Be Filled By O.E.M. sku=To Be Filled By O.E.M. uuid=00020003-0004-0005-0006-000700080009 *-core description: Motherboard product: AD525PV3 vendor: ASRock physical id: 0 *-firmware description: BIOS vendor: American Megatrends Inc. physical id: 0 version: P1.20 date: 04/01/2011 size: 64KiB capacity: 448KiB capabilities: pci upgrade shadowing cdboot bootselect socketedrom edd int13floppy1200 int13floppy720 int13floppy2880 int5printscreen int9keyboard int14serial int17printer int10video acpi usb ls120boot zipboot biosbootspecification netboot *-cpu description: CPU product: Intel(R) Atom(TM) CPU D525 @ 1.80GHz vendor: Intel Corp. physical id: 4 bus info: cpu@0 version: Intel(R) Atom(TM) CPU D525 @ 1.80GHz serial: To Be Filled By O.E.M. slot: CPUSocket size: 1800MHz capacity: 1800MHz width: 64 bits clock: 200MHz capabilities: x86-64 fpu fpu_exception wp vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx constant_tsc arch_perfmon pebs bts rep_good nopl aperfmperf pni dtes64 monitor ds_cpl tm2 ssse3 cx16 xtpr pdcm movbe lahf_lm configuration: cores=2 enabledcores=2 threads=4 *-cache:0 description: L1 cache physical id: 5 slot: L1-Cache size: 48KiB capacity: 48KiB capabilities: internal write-back data *-cache:1 description: L2 cache physical id: 6 slot: L2-Cache size: 1MiB capacity: 1MiB capabilities: internal write-back unified *-memory description: System Memory physical id: c slot: System board or motherboard size: 2GiB *-bank:0 description: SODIMM DDR2 Synchronous 800 MHz (1.2 ns) product: ModulePartNumber00 vendor: Manufacturer00 physical id: 0 serial: SerNum00 slot: DIMM0 size: 2GiB width: 64 bits clock: 800MHz (1.2ns) *-bank:1 description: DIMM [empty] product: ModulePartNumber01 vendor: Manufacturer01 physical id: 1 serial: SerNum01 slot: DIMM1 *-pci description: Host bridge product: N10 Family DMI Bridge vendor: Intel Corporation physical id: 100 bus info: pci@0000:00:00.0 version: 02 width: 32 bits clock: 33MHz configuration: driver=agpgart-intel resources: irq:0 *-display description: VGA compatible controller product: N10 Family Integrated Graphics Controller vendor: Intel Corporation physical id: 2 bus info: pci@0000:00:02.0 version: 02 width: 32 bits clock: 33MHz capabilities: msi pm vga_controller bus_master cap_list rom configuration: driver=i915 latency=0 resources: irq:41 memory:fea80000-feafffff ioport:dc00(size=8) memory:e0000000-efffffff memory:fe900000-fe9fffff *-multimedia description: Audio device product: N10/ICH 7 Family High Definition Audio Controller vendor: Intel Corporation physical id: 1b bus info: pci@0000:00:1b.0 version: 02 width: 64 bits clock: 33MHz capabilities: pm msi pciexpress bus_master cap_list configuration: driver=HDA Intel latency=0 resources: irq:43 memory:fea78000-fea7bfff *-pci:0 description: PCI bridge product: N10/ICH 7 Family PCI Express Port 1 vendor: Intel Corporation physical id: 1c bus info: pci@0000:00:1c.0 version: 02 width: 32 bits clock: 33MHz capabilities: pci pciexpress msi pm normal_decode bus_master cap_list configuration: driver=pcieport resources: irq:40 ioport:e000(size=4096) memory:feb00000-febfffff ioport:80000000(size=2097152) *-network description: Ethernet interface product: Atheros Communications vendor: Atheros Communications physical id: 0 bus info: pci@0000:01:00.0 logical name: eth0 version: c0 serial: XX size: 100Mbit/s capacity: 1Gbit/s width: 64 bits clock: 33MHz capabilities: pm msi pciexpress vpd bus_master cap_list ethernet physical tp 10bt 10bt-fd 100bt 100bt-fd 1000bt-fd autonegotiation configuration: autonegotiation=on broadcast=yes driver=atl1c driverversion=1.0.1.0-NAPI duplex=full firmware=N/A ip=192.168.1.99 latency=0 link=yes multicast=yes port=twisted pair speed=100Mbit/s resources: irq:42 memory:febc0000-febfffff ioport:ec00(size=128) *-usb:0 description: USB Controller product: N10/ICH 7 Family USB UHCI Controller #1 vendor: Intel Corporation physical id: 1d bus info: pci@0000:00:1d.0 version: 02 width: 32 bits clock: 33MHz capabilities: uhci bus_master configuration: driver=uhci_hcd latency=0 resources: irq:23 ioport:d880(size=32) *-usb:1 description: USB Controller product: N10/ICH 7 Family USB UHCI Controller #2 vendor: Intel Corporation physical id: 1d.1 bus info: pci@0000:00:1d.1 version: 02 width: 32 bits clock: 33MHz capabilities: uhci bus_master configuration: driver=uhci_hcd latency=0 resources: irq:19 ioport:d800(size=32) *-usb:2 description: USB Controller product: N10/ICH 7 Family USB UHCI Controller #3 vendor: Intel Corporation physical id: 1d.2 bus info: pci@0000:00:1d.2 version: 02 width: 32 bits clock: 33MHz capabilities: uhci bus_master configuration: driver=uhci_hcd latency=0 resources: irq:18 ioport:d480(size=32) *-usb:3 description: USB Controller product: N10/ICH 7 Family USB UHCI Controller #4 vendor: Intel Corporation physical id: 1d.3 bus info: pci@0000:00:1d.3 version: 02 width: 32 bits clock: 33MHz capabilities: uhci bus_master configuration: driver=uhci_hcd latency=0 resources: irq:16 ioport:d400(size=32) *-usb:4 description: USB Controller product: N10/ICH 7 Family USB2 EHCI Controller vendor: Intel Corporation physical id: 1d.7 bus info: pci@0000:00:1d.7 version: 02 width: 32 bits clock: 33MHz capabilities: pm debug ehci bus_master cap_list configuration: driver=ehci_hcd latency=0 resources: irq:23 memory:fea77c00-fea77fff *-pci:1 description: PCI bridge product: 82801 Mobile PCI Bridge vendor: Intel Corporation physical id: 1e bus info: pci@0000:00:1e.0 version: e2 width: 32 bits clock: 33MHz capabilities: pci subtractive_decode bus_master cap_list *-isa description: ISA bridge product: NM10 Family LPC Controller vendor: Intel Corporation physical id: 1f bus info: pci@0000:00:1f.0 version: 02 width: 32 bits clock: 33MHz capabilities: isa bus_master cap_list configuration: latency=0 *-ide description: IDE interface product: N10/ICH7 Family SATA IDE Controller vendor: Intel Corporation physical id: 1f.2 bus info: pci@0000:00:1f.2 logical name: scsi0 version: 02 width: 32 bits clock: 66MHz capabilities: ide pm bus_master cap_list emulated configuration: driver=ata_piix latency=0 resources: irq:19 ioport:1f0(size=8) ioport:3f6 ioport:170(size=8) ioport:376 ioport:ff90(size=16) memory:80200000-802003ff *-disk description: ATA Disk product: WDC WD10TPVT-11U vendor: Western Digital physical id: 0.0.0 bus info: scsi@0:0.0.0 logical name: /dev/sda version: 01.0 serial: WD-WXC1A80P0314 size: 931GiB (1TB) capabilities: partitioned partitioned:dos configuration: ansiversion=5 signature=00088c47 *-volume:0 description: EXT4 volume vendor: Linux physical id: 1 bus info: scsi@0:0.0.0,1 logical name: /dev/sda1 logical name: /media/private version: 1.0 serial: 042daf2d-350c-4640-a76a-4554c9d98c59 size: 300GiB capacity: 300GiB capabilities: primary journaled extended_attributes large_files huge_files dir_nlink recover extents ext4 ext2 initialized configuration: created=2011-11-06 11:05:03 filesystem=ext4 label=Private lastmountpoint=/media/private modified=2012-04-13 20:01:16 mount.fstype=ext4 mount.options=rw,relatime,barrier=1,stripe=1,data=ordered mounted=2012-04-13 20:01:16 state=mounted *-volume:1 description: Extended partition physical id: 2 bus info: scsi@0:0.0.0,2 logical name: /dev/sda2 size: 625GiB capacity: 625GiB capabilities: primary extended partitioned partitioned:extended *-logicalvolume:0 description: Linux filesystem partition physical id: 5 logical name: /dev/sda5 logical name: /media/storage capacity: 600GiB configuration: mount.fstype=ext4 mount.options=rw,relatime,barrier=1,stripe=1,data=ordered state=mounted *-logicalvolume:1 description: Linux filesystem partition physical id: 6 logical name: /dev/sda6 logical name: /media/dropbox capacity: 24GiB configuration: mount.fstype=ext4 mount.options=rw,relatime,barrier=1,stripe=1,data=ordered state=mounted *-volume:2 description: EXT4 volume vendor: Linux physical id: 3 bus info: scsi@0:0.0.0,3 logical name: /dev/sda3 logical name: /media/www version: 1.0 serial: 9b0a27b4-05d8-40d5-bfc7-4aeba198db7b size: 2570MiB capacity: 2570MiB capabilities: primary journaled extended_attributes large_files huge_files dir_nlink recover extents ext4 ext2 initialized configuration: created=2011-11-06 11:05:11 filesystem=ext4 label=www lastmountpoint=/media/www modified=2012-04-15 11:31:12 mount.fstype=ext4 mount.options=rw,relatime,barrier=1,stripe=1,data=ordered mounted=2012-04-15 11:31:12 state=mounted *-volume:3 description: Linux swap volume physical id: 4 bus info: scsi@0:0.0.0,4 logical name: /dev/sda4 version: 1 serial: 6ed1130e-3aad-4fa6-890b-77e729121e3b size: 4098MiB capacity: 4098MiB capabilities: primary nofs swap initialized configuration: filesystem=swap pagesize=4096 *-serial UNCLAIMED description: SMBus product: N10/ICH 7 Family SMBus Controller vendor: Intel Corporation physical id: 1f.3 bus info: pci@0000:00:1f.3 version: 02 width: 32 bits clock: 33MHz configuration: latency=0 resources: ioport:400(size=32) *-scsi physical id: 1 bus info: usb@1:4 logical name: scsi2 capabilities: emulated scsi-host configuration: driver=usb-storage *-disk description: SCSI Disk physical id: 0.0.0 bus info: scsi@2:0.0.0 logical name: /dev/sdb size: 3864MiB (4051MB) capabilities: partitioned partitioned:dos configuration: signature=000b4c55 *-volume description: EXT4 volume vendor: Linux physical id: 1 bus info: scsi@2:0.0.0,1 logical name: /dev/sdb1 logical name: / version: 1.0 serial: 33926e39-4685-4f63-b83c-f2a67824b69a size: 3862MiB capacity: 3862MiB capabilities: primary bootable journaled extended_attributes large_files huge_files dir_nlink recover extents ext4 ext2 initialized configuration: created=2011-10-11 14:03:46 filesystem=ext4 lastmountpoint=/ modified=2012-03-19 11:47:29 mount.fstype=ext4 mount.options=rw,noatime,errors=remount-ro,barrier=1,data=ordered mounted=2012-04-15 11:31:11 state=mounted rfkill list all Doesnt show anything! dmesg | grep -i firmware [ 0.715481] pci 0000:00:1f.0: [Firmware Bug]: TigerPoint LPC.BM_STS cleared

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• Filling a byte array in Java

  - by Corleone

  Hey all! For part of a project I'm working on I am implementing a RTPpacket where I have to fill the header array of byte with RTP header fields. //size of the RTP header: static int HEADER_SIZE = 12; // bytes //Fields that compose the RTP header public int Version; // 2 bits public int Padding; // 1 bit public int Extension; // 1 bit public int CC; // 4 bits public int Marker; // 1 bit public int PayloadType; // 7 bits public int SequenceNumber; // 16 bits public int TimeStamp; // 32 bits public int Ssrc; // 32 bits //Bitstream of the RTP header public byte[] header = new byte[ HEADER_SIZE ]; This was my approach: /* * bits 0-1: Version * bit 2: Padding * bit 3: Extension * bits 4-7: CC */ header[0] = new Integer( (Version << 6)|(Padding << 5)|(Extension << 6)|CC ).byteValue(); /* * bit 0: Marker * bits 1-7: PayloadType */ header[1] = new Integer( (Marker << 7)|PayloadType ).byteValue(); /* SequenceNumber takes 2 bytes = 16 bits */ header[2] = new Integer( SequenceNumber >> 8 ).byteValue(); header[3] = new Integer( SequenceNumber ).byteValue(); /* TimeStamp takes 4 bytes = 32 bits */ for ( int i = 0; i < 4; i++ ) header[7-i] = new Integer( TimeStamp >> (8*i) ).byteValue(); /* Ssrc takes 4 bytes = 32 bits */ for ( int i = 0; i < 4; i++ ) header[11-i] = new Integer( Ssrc >> (8*i) ).byteValue(); Any other, maybe 'better' ways to do this?

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• What is the format of DXGI_FORMAT_D24_UNORM_S8_UINT?

  - by bobobobo

  I'm trying to read the values in a depth texture of type DXGI_FORMAT_D24_UNORM_S8_UINT. I know this means "24 bits for depth, 8 bits for stencil" "A 32-bit z-buffer format that supports 24 bits for depth and 8 bits for stencil.", but how do you interpret those 24 bits? It's clearly not going to be a 32-bit int, and it's not going to be a 32-bit float. If it is an integer value, how "far away" is a value of "1" in the depth texture?

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• How to insert zeros between bits in a bitmap?

  - by anatolyg

  I have some performance-heavy code that performs bit manipulations. It can be reduced to the following well-defined problem: Given a 13-bit bitmap, construct a 26-bit bitmap that contains the original bits spaced at even positions. To illustrate: 0000000000000000000abcdefghijklm (input, 32 bits) 0000000a0b0c0d0e0f0g0h0i0j0k0l0m (output, 32 bits) I currently have it implemented in the following way in C: if (input & (1 << 12)) output |= 1 << 24; if (input & (1 << 11)) output |= 1 << 22; if (input & (1 << 10)) output |= 1 << 20; ... My compiler (MS Visual Studio) turned this into the following: test eax,1000h jne 0064F5EC or edx,1000000h ... (repeated 13 times with minor differences in constants) I wonder whether i can make it any faster. I would like to have my code written in C, but switching to assembly language is possible. Can i use some MMX/SSE instructions to process all bits at once? Maybe i can use multiplication? (multiply by 0x11111111 or some other magical constant) Would it be better to use condition-set instruction (SETcc) instead of conditional-jump instruction? If yes, how can i make the compiler produce such code for me? Any other idea how to make it faster? Any idea how to do the inverse bitmap transformation (i have to implement it too, bit it's less critical)?

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• Is it okay to truncate a SHA256 hash to 128 bits?

  - by Sunny Hirai

  MD5 and SHA-1 hashes have weaknesses against collision attacks. SHA256 does not but it outputs 256 bits. Can I safely take the first or last 128 bits and use that as the hash? I know it will be weaker (because it has less bits) but otherwise will it work? Basically I want to use this to uniquely identify files in a file system that might one day contain a trillion files. I'm aware of the birthday problem and a 128 bit hash should yield about a 1 in a trillion chance on a trillion files that there would be two different files with the same hash. I can live with those odds. What I can't live with is if somebody could easily, deliberately, insert a new file with the same hash and the same beginning characters of the file. I believe in MD5 and SHA1 this is possible.

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• how to Calculate number of address bits needed for memory?

  - by leon

  Hi I am preparing my exam for computer system. I don't quite understand how to calculate the number of address bits needed for the memory. For example, Suppose that a 1G x 32-bit main memory is built using 256M x 4-bit RAM chips and this memory is word-addressable. What is the number of address bits needed for a memory module? What is the number of address bits needed for the full memory? And what about If the memory is byte addressable, what would be the solutions? Many thanks

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• How many bits for sequence number using Go-Back-N protocol.

  - by Mike

  Hi Everyone, I'm a regular over at Stack Overflow (Software developer) that is trying to get through a networking course. I got a homework problem I'd like to have a sanity check on. Here is what I got. Q: A 3000-km-long T1 trunk is used to transmit 64-byte frames using Go-Back-N protocol. If the propagation speed is 6 microseconds/km, how many bits should the sequence numbers be? My Answer: For this questions what we need to do is lay the base knowledge. What we are trying to find is the size of the largest sequence number we should us using Go-Back-N. To figure this out we need to figure out how many packets can fit into our link at a time and then subtract one from that number. This will ensure that we never have two packets with the same sequence number at the same time in the link. Length of link: 3,000km Speed: 6 microseconds / km Frame size: 64 bytes T1 transmission speed: 1544kb/s (http://ckp.made-it.com/t1234.html) Propagation time = 6 microseconds / km * 3000 km = 18,000 microseconds (18ms). Convert 1544kb to bytes = 1544 * 1024 = 1581056 bytes Transmission time = 64 bytes / 1581056bytes / second = 0.000040479 seconds (0.4ms) So then if we take the 18ms propagation time and divide it by the 0.4ms transmission time we will see that we are going to be able to stuff ( 18 / 0.4) 45 packets into the link at a time. That means that our sequence number should be 2 ^ 45 bits long! Am I going in the right direction with this? Thanks, Mike

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• Why Virtual Box won't give me option to create 64 bits guests?

  - by Eduardo Born

  My host is x64 bits Windows 8.1. I downloaded the latest Virtual Box (4.3) and I'm trying to create a VM with a 64 bits Ubuntu OS (ubuntu-12.04.3-desktop-amd64). When I go to New VM wizard, it doesn't give me option to select "Ubuntu (x64)" as I have seen in other people's screenshots, only just "Ubuntu". As a result, the ISO can't boot. I tried in another PC and Virtual Box gives the x64 variants to most listed OS... Control Panel shows x64 OS, x64 processor. My host laptop is a Sony Vaio VPCZ22UGX/N, Intel® Core™ i7-2640M processor. CPUz shows Vx-t is available on my processor, of course. Here is what I tried so far: I enabled IO APIC as required in the docs. I have virtualization enabled in the BIOS. It works fine in VMware. Check that Hyper-V is not running or even installed on my Windows. Same for VMware. I also tried running the command: VBoxManage modifyvm [vmname] --longmode on for that VM, but no change.. I think the issue is really that I can't select x64 variant of the Ubuntu OS for that VM. Other people seem to indicate that's a requirement, but I don't get that option for some reason. I spent a lot of time and can't find what's wrong... Anyone knows what could be missing here? Thank you very much!! Eduardo

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• Fastest way to represent a collection of bits in PHP?

  - by Piskvor

  What is a good way to represent a collection of bits? I have a set of various on/off toggles (thousands of them) and need to store and retrieve their state. The naïve implementation would be an array of booleans, but I'm wondering if there's a better way (better in terms of access speed and/or memory requirements). I've found this BitArray implementation, but it's limited to 32 bits, which is not enough for this case.

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